BUGS

Critical

  Arithmetic/logic have not been tested with non power-of-two widths.
    - Except Enc(), required by Statemachine. This one is guaranteed to work.
    - Log2 has been shown not to work.
    - Now part of standard testing, but this doesn't have full coverage.

Must Fix

  The primary mechanism by which errors in designs are reported is by the
  program crashing. More defensive coding is needed, including design validation
  techniques. Ideally, it should be considered a bug in CHDL if optimization,
  simulation or netlist writing crashes after validation has been performed.

  techmap.cpp: insert_reg_inverters() -- this creates duplicate registers that
  will not be successfully techmapped but still remain in the design with no
  successors.

  Overload of operator= for nodes breaks STL stuff that uses it. Consider
  vector::erase. A "safeErase" is in opt.cpp now, and there isn't really an
  easy permanent fix since retroactive assignment and node-as-reference are
  really powerful things. One option may be to (ugh) have a global flag that
  toggles "magic" (our current model) vs "normal" (the type expected by the C++
  STL) assignment.

Nuisance