design-verification

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Design Verification of Flash, UART, and SDRAM controller for a 32 bit embedded RISC microprocessor using cocotb.

python flash makefile verification uart risc testbench sdram sdram-controller cocotb cocotb-testing design-verification

Basic UVM Testbench to verify AXI stream spec design. Added a wishbone BFM to mimic Wishbone design.

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