From 67a9751e94751220427f68fea9fe152c9c84e282 Mon Sep 17 00:00:00 2001 From: leg7 Date: Tue, 26 Mar 2024 16:30:53 +0100 Subject: [PATCH 1/4] [25][Grammar]: Fix typo/grammar --- book_src/Operating Systems From 0 to 1.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/book_src/Operating Systems From 0 to 1.txt b/book_src/Operating Systems From 0 to 1.txt index 2435791..73463d9 100644 --- a/book_src/Operating Systems From 0 to 1.txt +++ b/book_src/Operating Systems From 0 to 1.txt @@ -1409,7 +1409,8 @@ useless software. In reverse, software can do everything hardware easier way to use the hardware. In reality, even though all languages are equivalent in power, -not all of them are capable of express programs of each other. +not all of them are capable of expressing each other's programs +effectively. Programming languages vary between two ends of a spectrum: high level and low level. From fc50d6927bbc823f5bad281a1592c8956160d504 Mon Sep 17 00:00:00 2001 From: leg7 Date: Tue, 26 Mar 2024 16:52:50 +0100 Subject: [PATCH 2/4] [37][Typo]: remove unnecessary 'an' --- book_src/Operating Systems From 0 to 1.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/book_src/Operating Systems From 0 to 1.txt b/book_src/Operating Systems From 0 to 1.txt index 73463d9..6677711 100644 --- a/book_src/Operating Systems From 0 to 1.txt +++ b/book_src/Operating Systems From 0 to 1.txt @@ -1828,7 +1828,7 @@ resources. [margin: Field Programmable Gate Array ]Field Programmable Gate ArrayField Gate Programmable Array (FPGA -FPGA) is a hardware an array of reconfigurable gates that makes +FPGA) is a hardware array of reconfigurable gates that makes circuit structure programmable after it is shipped away from the factory[footnote: This is why it is called Field Gate Programmable Array. It is From fbf40b3f360f1f3f0fc09a4c48af8fc7b8275b9a Mon Sep 17 00:00:00 2001 From: leg7 Date: Tue, 26 Mar 2024 17:18:53 +0100 Subject: [PATCH 3/4] [43][Grammar]: odd phrasing --- book_src/Operating Systems From 0 to 1.txt | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/book_src/Operating Systems From 0 to 1.txt b/book_src/Operating Systems From 0 to 1.txt index 6677711..54bef5d 100644 --- a/book_src/Operating Systems From 0 to 1.txt +++ b/book_src/Operating Systems From 0 to 1.txt @@ -2069,10 +2069,10 @@ form of machine language) are stored and retrieved to be executed by the CPU; memory also stores data needed by some software. Memory in a Von Neumann machine does not distinguish between which bytes are data and which bytes are software instructions. It's up to -the software to decide, and if somehow data bytes are fetched and -executed as instructions, CPU still does it if such bytes -represent valid instructions, but will produce undesirable -results. To a CPU, there's no code and data; both are merely +the software to decide. If somehow data bytes are fetched, the +CPU will execute them if such bytes represent valid instructions, +but will produce undesirable results. +To a CPU, there's no code and data; both are merely different types of instructions for it to act on: one tells it how to do something in a specific manner, and one is necessary materials for it to carry out such an action. From 25438ca6fb2428b7089cb15351d2024d82e8a75e Mon Sep 17 00:00:00 2001 From: leg7 Date: Tue, 26 Mar 2024 17:21:27 +0100 Subject: [PATCH 4/4] [43][Grammar]: Use plural and not possesive --- book_src/Operating Systems From 0 to 1.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/book_src/Operating Systems From 0 to 1.txt b/book_src/Operating Systems From 0 to 1.txt index 54bef5d..d6f8c9f 100644 --- a/book_src/Operating Systems From 0 to 1.txt +++ b/book_src/Operating Systems From 0 to 1.txt @@ -2081,7 +2081,7 @@ RAM is controlled by a device called a memory controllermemory controller . Currently, most processors have this device embedded, so the CPU has a dedicated memory bus connecting the processor to the RAM. On older CPUs[footnote: -Prior to the CPU's produced in 2009 +Prior to the CPUs produced in 2009 ], however, this device was located in a chip also known as MCH or Memory Controller HubMemory Controller Hub. In this case, the CPU does not communicate directly with the RAM, but with the MCH