From 01f55547bf5df681d56da7271e842ce94bff1d42 Mon Sep 17 00:00:00 2001 From: Tobias Markus Date: Thu, 26 Mar 2015 15:10:01 +0100 Subject: [PATCH] Implemeted edge triggered counter - Added edge_trigger function to rfgfunctions.tcl - Implemented edge_trigger in RegisterFile Generator - Implemented edge_trigger in rfs_to_rfg tool --- .../address-hierarchical.tm | 8 -- .../registerfile_template.tcl | 31 ++++- tcl/rfgfunctions.tcl | 1 + xsl/rfs-to-rfg.xsl | 114 +++++++++--------- 4 files changed, 88 insertions(+), 66 deletions(-) diff --git a/tcl/address-hierarchical/address-hierarchical.tm b/tcl/address-hierarchical/address-hierarchical.tm index 9280caf..e156d13 100755 --- a/tcl/address-hierarchical/address-hierarchical.tm +++ b/tcl/address-hierarchical/address-hierarchical.tm @@ -244,9 +244,6 @@ namespace eval osys::rfg::address::hierarchical { set blockAddress 0 foreach it $value { - ::puts "Debug Addressing: [$it name]" - ::puts "current: $currentAddress" - ::puts "BaseAddress: $baseAddress" if {$it==$key} { continue } @@ -255,16 +252,11 @@ namespace eval osys::rfg::address::hierarchical { set itSize [sizeOf $it] if {$itSize == 0} { - ::puts "Current position aligner: $currentAddress" - ::puts "Aligment: [$it aligment]" if {$currentAddress == 0} { set blockAddress [$it aligment] } else { - ::puts "Else" - ::puts "[expr int($currentAddress/[$it aligment]+1)]" set blockAddress [expr int($currentAddress/[$it aligment]+1)*[$it aligment]] } - ::puts "Block Address Aligner $blockAddress" set currentAddress $blockAddress } else { diff --git a/tcl/generator-verilog/registerfile_template.tcl b/tcl/generator-verilog/registerfile_template.tcl index b16c578..724b6d2 100644 --- a/tcl/generator-verilog/registerfile_template.tcl +++ b/tcl/generator-verilog/registerfile_template.tcl @@ -61,8 +61,11 @@ odfi::closures::oproc writeRegisterInterface {it} { $it onAttributes {hardware.osys::rfg::software_written} { output [getName $it]_written [find_internalRF $it $rf] } - - input [getName $it]_countup wire + $it onAttributes {hardware.osys::rfg::edge_trigger} { + input [getName $it]_edge wire + } otherwise { + input [getName $it]_countup wire + } } otherwise { @@ -198,7 +201,7 @@ odfi::closures::oproc writeRegisterInternalSigs {it} { } otherwise { $it onEachField { - ::if {[$it name] != "Reserved"} { + if {[$it name] != "Reserved"} { $it onAttributes {hardware.osys::rfg::counter} { ## Check if this is equivilant @@ -211,8 +214,12 @@ odfi::closures::oproc writeRegisterInternalSigs {it} { reg [getName $it]_load_value [$it width] } } + $it onAttributes {hardware.osys::rfg::edge_trigger} { + reg [getName $it]_countup + reg [getName $it]_edge_last + } - ::if {![$it hasAttribute hardware.osys::rfg::ro] && \ + if {![$it hasAttribute hardware.osys::rfg::ro] && \ ![$it hasAttribute hardware.osys::rfg::rw]} { wire [getName $it] [$it width] } @@ -415,6 +422,11 @@ odfi::closures::oproc writeRegisterReset {object} { } } + $it onAttributes {hardware.osys::rfg::edge_trigger} { + vputs "[getName $it]_edge_last <= 1'b0" + vputs "[getName $it]_countup <= 1'b0" + } + } ohterwise { if {[$it name] != "Reserved"} { vputs "[getName $it] <= [$it reset]" @@ -457,6 +469,17 @@ odfi::closures::oproc writeRegisterWrite {object} { } incr offset [$it width] + + $it onAttributes {hardware.osys::rfg::edge_trigger} { + set obj $it + vif "[getName $obj]_edge != [getName $obj]_edge_last" { + vputs "[getName $obj]_countup <= 1'b1" + vputs "[getName $obj]_edge_last <= [getName $obj]_edge" + } + velse { + vputs "[getName $obj]_countup <= 1'b0" + } + } } } diff --git a/tcl/rfgfunctions.tcl b/tcl/rfgfunctions.tcl index 73dccd4..ec8dec6 100755 --- a/tcl/rfgfunctions.tcl +++ b/tcl/rfgfunctions.tcl @@ -45,6 +45,7 @@ attributeFunction ::internal attributeFunction ::clear attributeFunction ::write_clear attributeFunction ::shared_bus +attributeFunction ::edge_trigger ## Addressing attributeFunction ::relative_address diff --git a/xsl/rfs-to-rfg.xsl b/xsl/rfs-to-rfg.xsl index e6ad4c6..ed73e19 100755 --- a/xsl/rfs-to-rfg.xsl +++ b/xsl/rfs-to-rfg.xsl @@ -109,7 +109,7 @@ registerFile { - depth [expr pow(2,)] + depth [expr int(pow(2,))] @@ -134,32 +134,36 @@ registerFile { - counter + counter + + + + edge_trigger + + + - rreinit + rreinit + + - software_written - - + software_written + + - no_wen - - + no_wen + + - external - - + external - + } - - - } @@ -272,80 +276,82 @@ registerFile { width $ width - - - + + reset $ reset - - - - + + software { - + - write_clear + write_clear - write_xor + write_xor - + } - - - - + + hardware { - - - + + - counter + counter + + + + + edge_trigger + + - rreinit + rreinit + + - software_written - - + software_written + + - no_wen + no_wen - + - clear - + clear + - + - sticky - + sticky + - - } - - - - + +} + + } - + + @@ -429,4 +435,4 @@ registerFile { - +