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RegisterFile with one RAM and software rw permission causes verilog error #13

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TM90 opened this issue Nov 13, 2014 · 1 comment
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TM90 commented Nov 13, 2014

If you are generating a registerfile with just one RAM and software rw access and no hardware rights, the output verilog will have a syntax error because of a comma error in the blackbox definition.

.rf description causing the error:

registerFile ramRF {
    ramBlock TestRAM {
        width 16
        depth 32
        software rw
    }
}
@TM90 TM90 added the bug label Nov 13, 2014
@TM90 TM90 self-assigned this Nov 13, 2014
@TM90 TM90 added this to the v1.2.0 milestone Nov 13, 2014
@TM90 TM90 mentioned this issue Mar 19, 2015
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TM90 commented Mar 20, 2015

Fixed with Pull Request Iss26

@TM90 TM90 closed this as completed Mar 20, 2015
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