From 433c116f4679e2d9fd53abe5976ce092564543af Mon Sep 17 00:00:00 2001 From: Hiroo HAYASHI <24754036+hirooih@users.noreply.github.com> Date: Wed, 2 Aug 2023 22:53:25 +0900 Subject: [PATCH] Verilog: support validator - Use NONE for intensional fails. - Use KNOWN-INVALIDATION for fails by svlint. Signed-off-by: Hiroo HAYASHI <24754036+hirooih@users.noreply.github.com> --- .../systemverilog-assertion.d/validator | 1 + .../systemverilog-assignment.d/validator | 1 + .../systemverilog-checker.d/validator | 1 + .../systemverilog-directive.d/validator | 1 + .../systemverilog-github3457.d/validator | 1 + .../systemverilog-github646.d/validator | 1 + .../systemverilog-net-var.d/validator | 1 + Units/parser-verilog.r/validator | 1 + .../verilog-github624.d/validator | 1 + .../verilog-memleak.d/validator | 1 + misc/validators/validator-svlint | 35 +++++++++++++++++++ 11 files changed, 45 insertions(+) create mode 100644 Units/parser-verilog.r/systemverilog-assertion.d/validator create mode 100644 Units/parser-verilog.r/systemverilog-assignment.d/validator create mode 100644 Units/parser-verilog.r/systemverilog-checker.d/validator create mode 100644 Units/parser-verilog.r/systemverilog-directive.d/validator create mode 100644 Units/parser-verilog.r/systemverilog-github3457.d/validator create mode 100644 Units/parser-verilog.r/systemverilog-github646.d/validator create mode 100644 Units/parser-verilog.r/systemverilog-net-var.d/validator create mode 100644 Units/parser-verilog.r/validator create mode 100644 Units/parser-verilog.r/verilog-github624.d/validator create mode 100644 Units/parser-verilog.r/verilog-memleak.d/validator create mode 100755 misc/validators/validator-svlint diff --git a/Units/parser-verilog.r/systemverilog-assertion.d/validator b/Units/parser-verilog.r/systemverilog-assertion.d/validator new file mode 100644 index 0000000000..3b656016ee --- /dev/null +++ b/Units/parser-verilog.r/systemverilog-assertion.d/validator @@ -0,0 +1 @@ +KNOWN-INVALIDATION diff --git a/Units/parser-verilog.r/systemverilog-assignment.d/validator b/Units/parser-verilog.r/systemverilog-assignment.d/validator new file mode 100644 index 0000000000..3b656016ee --- /dev/null +++ b/Units/parser-verilog.r/systemverilog-assignment.d/validator @@ -0,0 +1 @@ +KNOWN-INVALIDATION diff --git a/Units/parser-verilog.r/systemverilog-checker.d/validator b/Units/parser-verilog.r/systemverilog-checker.d/validator new file mode 100644 index 0000000000..3b656016ee --- /dev/null +++ b/Units/parser-verilog.r/systemverilog-checker.d/validator @@ -0,0 +1 @@ +KNOWN-INVALIDATION diff --git a/Units/parser-verilog.r/systemverilog-directive.d/validator b/Units/parser-verilog.r/systemverilog-directive.d/validator new file mode 100644 index 0000000000..3b656016ee --- /dev/null +++ b/Units/parser-verilog.r/systemverilog-directive.d/validator @@ -0,0 +1 @@ +KNOWN-INVALIDATION diff --git a/Units/parser-verilog.r/systemverilog-github3457.d/validator b/Units/parser-verilog.r/systemverilog-github3457.d/validator new file mode 100644 index 0000000000..3b656016ee --- /dev/null +++ b/Units/parser-verilog.r/systemverilog-github3457.d/validator @@ -0,0 +1 @@ +KNOWN-INVALIDATION diff --git a/Units/parser-verilog.r/systemverilog-github646.d/validator b/Units/parser-verilog.r/systemverilog-github646.d/validator new file mode 100644 index 0000000000..7a2d8207ae --- /dev/null +++ b/Units/parser-verilog.r/systemverilog-github646.d/validator @@ -0,0 +1 @@ +NONE diff --git a/Units/parser-verilog.r/systemverilog-net-var.d/validator b/Units/parser-verilog.r/systemverilog-net-var.d/validator new file mode 100644 index 0000000000..3b656016ee --- /dev/null +++ b/Units/parser-verilog.r/systemverilog-net-var.d/validator @@ -0,0 +1 @@ +KNOWN-INVALIDATION diff --git a/Units/parser-verilog.r/validator b/Units/parser-verilog.r/validator new file mode 100644 index 0000000000..706db08f29 --- /dev/null +++ b/Units/parser-verilog.r/validator @@ -0,0 +1 @@ +svlint diff --git a/Units/parser-verilog.r/verilog-github624.d/validator b/Units/parser-verilog.r/verilog-github624.d/validator new file mode 100644 index 0000000000..7a2d8207ae --- /dev/null +++ b/Units/parser-verilog.r/verilog-github624.d/validator @@ -0,0 +1 @@ +NONE diff --git a/Units/parser-verilog.r/verilog-memleak.d/validator b/Units/parser-verilog.r/verilog-memleak.d/validator new file mode 100644 index 0000000000..7a2d8207ae --- /dev/null +++ b/Units/parser-verilog.r/verilog-memleak.d/validator @@ -0,0 +1 @@ +NONE diff --git a/misc/validators/validator-svlint b/misc/validators/validator-svlint new file mode 100755 index 0000000000..8245c1565f --- /dev/null +++ b/misc/validators/validator-svlint @@ -0,0 +1,35 @@ +# -*- sh -*- +# validator-svlint - validating Verilog/SystemVerilog input files with svlint +# https://github.com/dalance/svlint +# +# Copyright (c) 2023 Masatake YAMATO +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, +# USA. +# +action=$1 +input="$2" +cmd=svlint +flags="--ignore-include" +case "$action" in + is_runnable) + type $cmd > /dev/null 2>&1 + exit $? + ;; + validate) + $cmd $flags "$input" > /dev/null + exit $? + ;; +esac