diff --git a/cmd/tools/repeat.v b/cmd/tools/repeat.v
index e22f6206f30b58..0624b189120ea9 100644
--- a/cmd/tools/repeat.v
+++ b/cmd/tools/repeat.v
@@ -87,8 +87,8 @@ fn new_aints(ovals []int, extreme_mins int, extreme_maxs int) Aints {
 		nmaxs: extreme_maxs
 	}
 	mut sum := i64(0)
-	mut imin := math.max_i32
-	mut imax := -math.max_i32
+	mut imin := int(math.max_i32)
+	mut imax := int(-math.max_i32)
 	// discard the extremes:
 	mut vals := []int{}
 	for x in ovals {
diff --git a/vlib/v/ast/types.v b/vlib/v/ast/types.v
index 037ea5643cd4b3..3ed16095fdb528 100644
--- a/vlib/v/ast/types.v
+++ b/vlib/v/ast/types.v
@@ -609,7 +609,7 @@ pub const (
 	signed_integer_type_idxs   = [char_type_idx, i8_type_idx, i16_type_idx, int_type_idx,
 		i64_type_idx, i32_type_idx, isize_type_idx]
 	unsigned_integer_type_idxs = [u8_type_idx, u16_type_idx, u32_type_idx, u64_type_idx,
-		usize_type_idx, i32_type_idx]
+		usize_type_idx]
 	// C will promote any type smaller than int to int in an expression
 	int_promoted_type_idxs     = [char_type_idx, i8_type_idx, i16_type_idx, u8_type_idx, u16_type_idx]
 	float_type_idxs            = [f32_type_idx, f64_type_idx, float_literal_type_idx]
diff --git a/vlib/v/builder/nativebuilder/nativebuilder.v b/vlib/v/builder/nativebuilder/nativebuilder.v
index 790eea454d38b5..b442f0a00f3f48 100644
--- a/vlib/v/builder/nativebuilder/nativebuilder.v
+++ b/vlib/v/builder/nativebuilder/nativebuilder.v
@@ -58,6 +58,8 @@ pub fn build_native(mut b builder.Builder, v_files []string, out_file string) {
 			eprintln('Error: Only arm64 and amd64 are supported by V')
 		}
 	}
-	b.stats_lines, b.stats_bytes = native.gen(b.parsed_files, b.table, out_file, b.pref)
+	stats_lines, stats_bytes := native.gen(b.parsed_files, b.table, out_file, b.pref)
+	b.stats_lines = int(stats_lines)
+	b.stats_bytes = int(stats_bytes)
 	util.timing_measure('Native GEN')
 }
diff --git a/vlib/v/checker/tests/compare_unsigned_signed.out b/vlib/v/checker/tests/compare_unsigned_signed.out
index ca8bb7a6e582d2..f6d33308039aab 100644
--- a/vlib/v/checker/tests/compare_unsigned_signed.out
+++ b/vlib/v/checker/tests/compare_unsigned_signed.out
@@ -6,7 +6,7 @@ vlib/v/checker/tests/compare_unsigned_signed.vv:2:14: error: unsigned integer ca
     4 |     }
 vlib/v/checker/tests/compare_unsigned_signed.vv:6:5: error: unsigned integer cannot be compared with negative value
     4 |     }
-    5 | 
+    5 |
     6 |     if -1 > u32(1) {
       |        ~~
     7 |         println('unexpected')
@@ -23,10 +23,10 @@ vlib/v/checker/tests/compare_unsigned_signed.vv:11:6: error: negative value cann
    10 |     _ = u8(-1) == -1 // false!
    11 |     _ = -1 == u16(-1) // false!
       |         ~~
-   12 |     
+   12 |
    13 |     // smaller unsigned == signed, OK
 vlib/v/checker/tests/compare_unsigned_signed.vv:18:12: error: `i8` cannot be compared with `u16`
-   16 |     
+   16 |
    17 |     // smaller signed == unsigned, NG
    18 |     _ = i8(0) == u16(0)
       |               ~~
diff --git a/vlib/v/checker/tests/compare_unsigned_signed.vv b/vlib/v/checker/tests/compare_unsigned_signed.vv
index 34a96acf4823d1..17e1f5acd9d980 100644
--- a/vlib/v/checker/tests/compare_unsigned_signed.vv
+++ b/vlib/v/checker/tests/compare_unsigned_signed.vv
@@ -9,11 +9,11 @@ fn main() {
 	// unsigned == literal
 	_ = u8(-1) == -1 // false!
 	_ = -1 == u16(-1) // false!
-	
+
 	// smaller unsigned == signed, OK
 	_ = u16(-1) == int(-1)
 	_ = int(-1) != u8(-1)
-	
+
 	// smaller signed == unsigned, NG
 	_ = i8(0) == u16(0)
 	_ = i16(0) != u32(0)
diff --git a/vlib/v/gen/native/amd64.v b/vlib/v/gen/native/amd64.v
index 8c7c3c40f2ba32..08443345320d06 100644
--- a/vlib/v/gen/native/amd64.v
+++ b/vlib/v/gen/native/amd64.v
@@ -126,7 +126,7 @@ fn (mut c Amd64) main_reg() Register {
 	return Amd64Register.rax
 }
 
-fn (mut c Amd64) address_size() int {
+fn (mut c Amd64) address_size() i32 {
 	return 8
 }
 
@@ -298,7 +298,7 @@ fn (mut c Amd64) cmp_var_reg(var Var, reg Register, config VarConfig) {
 			c.g.write8(0x39)
 			offset := var.offset - config.offset
 			is_far_var := offset > 0x80 || offset < -0x7f
-			c.g.write8(if is_far_var { 0x85 } else { 0x45 })
+			c.g.write8(if is_far_var { i32(0x85) } else { i32(0x45) })
 			if is_far_var {
 				c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 			} else {
@@ -312,7 +312,7 @@ fn (mut c Amd64) cmp_var_reg(var Var, reg Register, config VarConfig) {
 	}
 }
 
-fn (mut c Amd64) cmp_var(var Var, val int, config VarConfig) {
+fn (mut c Amd64) cmp_var(var Var, val i32, config VarConfig) {
 	match var {
 		ast.Ident {
 			var_object := c.g.get_var_from_ident(var)
@@ -334,7 +334,7 @@ fn (mut c Amd64) cmp_var(var Var, val int, config VarConfig) {
 			c.g.write8(0x81) // 83 for 1 byte?
 			offset := var.offset - config.offset
 			is_far_var := offset > 0x80 || offset < -0x7f
-			c.g.write8(if is_far_var { 0xbd } else { 0x7d })
+			c.g.write8(if is_far_var { i32(0xbd) } else { i32(0x7d) })
 			if is_far_var {
 				c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 			} else {
@@ -372,7 +372,7 @@ fn (mut c Amd64) dec_var(var Var, config VarConfig) {
 			c.g.write8(0x81) // 83 for 1 byte
 			offset := var.offset - config.offset
 			is_far_var := offset > 0x80 || offset < -0x7f
-			c.g.write8(if is_far_var { 0xad } else { 0x6d })
+			c.g.write8(if is_far_var { i32(0xad) } else { i32(0x6d) })
 			if is_far_var {
 				c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 			} else {
@@ -410,7 +410,7 @@ fn (mut c Amd64) inc_var(var Var, config VarConfig) {
 			c.g.write8(0x81) // 83 for 1 byte
 			offset := var.offset - config.offset
 			is_far_var := offset > 0x80 || offset < -0x7f
-			c.g.write8(if is_far_var { 0x85 } else { 0x45 })
+			c.g.write8(if is_far_var { i32(0x85) } else { i32(0x45) })
 			if is_far_var {
 				c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 			} else {
@@ -454,7 +454,7 @@ fn (op JumpOp) amd64() u16 {
 	}
 }
 
-fn (mut c Amd64) cjmp(op JumpOp) int {
+fn (mut c Amd64) cjmp(op JumpOp) i32 {
 	c.g.write16(op.amd64())
 	pos := c.g.pos()
 	c.g.write32(placeholder)
@@ -462,7 +462,7 @@ fn (mut c Amd64) cjmp(op JumpOp) int {
 	return i32(pos)
 }
 
-fn (mut c Amd64) jmp(addr int) i32 {
+fn (mut c Amd64) jmp(addr i32) i32 {
 	c.g.write8(0xe9)
 	pos := c.g.pos()
 	c.g.write32(addr) // 0xffffff
@@ -566,7 +566,7 @@ fn (mut c Amd64) mov_deref(r Register, rptr Register, typ ast.Type) {
 	reg := r as Amd64Register
 	regptr := rptr as Amd64Register
 	size := c.g.get_type_size(typ)
-	if size !in [1, 2, 4, 8] {
+	if int(size) !in [1, 2, 4, 8] {
 		c.g.n_error('Invalid size on dereferencing')
 	}
 	is_signed := !typ.is_any_kind_of_pointer() && typ.is_signed()
@@ -601,7 +601,7 @@ fn (mut c Amd64) mov_store(regptr Amd64Register, reg Amd64Register, size Size) {
 	if size == ._64 {
 		c.g.write8(0x48 + i32(reg) / 8 * 4 + i32(regptr) / 8)
 	}
-	c.g.write8(if size == ._8 { 0x88 } else { 0x89 })
+	c.g.write8(if size == ._8 { i32(0x88) } else { i32(0x89) })
 	c.g.write8(i32(reg) % 8 * 8 + i32(regptr) % 8)
 	c.g.println('mov [${regptr}], ${reg}')
 }
@@ -634,13 +634,13 @@ fn (mut c Amd64) mov_reg_to_var(var Var, r Register, config VarConfig) {
 				&& i32(reg) <= i32(Amd64Register.r15)
 
 			if raw_type.is_any_kind_of_pointer() || typ.is_any_kind_of_pointer() {
-				c.g.write16(0x8948 + if is_extended_register { 4 } else { 0 })
+				c.g.write16(0x8948 + if is_extended_register { i32(4) } else { i32(0) })
 				size_str = 'QWORD'
 			} else {
 				match typ {
 					ast.i64_type_idx, ast.u64_type_idx, ast.isize_type_idx, ast.usize_type_idx,
 					ast.int_literal_type_idx {
-						c.g.write16(0x8948 + if is_extended_register { 4 } else { 0 })
+						c.g.write16(0x8948 + if is_extended_register { i32(4) } else { i32(0) })
 						size_str = 'QWORD'
 					}
 					ast.int_type_idx, ast.u32_type_idx, ast.rune_type_idx {
@@ -679,7 +679,7 @@ fn (mut c Amd64) mov_reg_to_var(var Var, r Register, config VarConfig) {
 					}
 				}
 			}
-			far_var_offset := if is_far_var { 0x40 } else { 0 }
+			far_var_offset := if is_far_var { i32(0x40) } else { i32(0) }
 			match reg {
 				.eax, .rax, .r8 { c.g.write8(0x45 + far_var_offset) }
 				.rbx { c.g.write8(0x5d + far_var_offset) }
@@ -694,7 +694,7 @@ fn (mut c Amd64) mov_reg_to_var(var Var, r Register, config VarConfig) {
 			} else {
 				c.g.write8((0xff - offset + 1) % 0x100)
 			}
-			c.g.println('mov ${size_str} PTR [rbp-${offset.hex2()}],${reg}')
+			c.g.println('mov ${size_str} PTR [rbp-${int(offset).hex2()}],${reg}')
 		}
 		GlobalVar {
 			// TODO
@@ -702,7 +702,7 @@ fn (mut c Amd64) mov_reg_to_var(var Var, r Register, config VarConfig) {
 	}
 }
 
-fn (mut c Amd64) mov_int_to_var(var Var, integer int, config VarConfig) {
+fn (mut c Amd64) mov_int_to_var(var Var, integer i32, config VarConfig) {
 	match var {
 		ast.Ident {
 			var_object := c.g.get_var_from_ident(var)
@@ -726,52 +726,52 @@ fn (mut c Amd64) mov_int_to_var(var Var, integer int, config VarConfig) {
 			match typ {
 				ast.i8_type_idx, ast.u8_type_idx, ast.char_type_idx {
 					c.g.write8(0xc6)
-					c.g.write8(if is_far_var { 0x85 } else { 0x45 })
+					c.g.write8(if is_far_var { i32(0x85) } else { i32(0x45) })
 					if is_far_var {
 						c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 					} else {
 						c.g.write8((0xff - offset + 1) % 0x100)
 					}
 					c.g.write8(u8(integer))
-					c.g.println('mov BYTE PTR[rbp-${offset.hex2()}], ${integer}')
+					c.g.println('mov BYTE PTR[rbp-${int(offset).hex2()}], ${integer}')
 				}
 				ast.i16_type_idx, ast.u16_type_idx {
 					c.g.write16(0xc766)
-					c.g.write8(if is_far_var { 0x85 } else { 0x45 })
+					c.g.write8(if is_far_var { i32(0x85) } else { i32(0x45) })
 					if is_far_var {
 						c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 					} else {
 						c.g.write8((0xff - offset + 1) % 0x100)
 					}
 					c.g.write16(u16(integer))
-					c.g.println('mov WORD PTR[rbp-${offset.hex2()}], ${integer}')
+					c.g.println('mov WORD PTR[rbp-${int(offset).hex2()}], ${integer}')
 				}
 				ast.int_type_idx, ast.u32_type_idx, ast.rune_type_idx {
 					c.g.write8(0xc7)
-					c.g.write8(if is_far_var { 0x85 } else { 0x45 })
+					c.g.write8(if is_far_var { i32(0x85) } else { i32(0x45) })
 					if is_far_var {
 						c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 					} else {
 						c.g.write8((0xff - offset + 1) % 0x100)
 					}
 					c.g.write32(integer)
-					c.g.println('mov DWORD PTR[rbp-${offset.hex2()}], ${integer}')
+					c.g.println('mov DWORD PTR[rbp-${int(offset).hex2()}], ${integer}')
 				}
 				ast.i64_type_idx, ast.u64_type_idx, ast.isize_type_idx, ast.usize_type_idx,
 				ast.int_literal_type_idx {
 					c.g.write8(0x48)
 					c.g.write8(0xc7)
-					c.g.write8(if is_far_var { 0x85 } else { 0x45 })
+					c.g.write8(if is_far_var { i32(0x85) } else { i32(0x45) })
 					if is_far_var {
 						c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 					} else {
 						c.g.write8((0xff - offset + 1) % 0x100)
 					}
 					c.g.write32(integer)
-					c.g.println('mov QWORD PTR[rbp-${offset.hex2()}], ${integer}')
+					c.g.println('mov QWORD PTR[rbp-${int(offset).hex2()}], ${integer}')
 				}
 				else {
-					c.g.n_error('unhandled mov int type: ${typ}')
+					c.g.n_error('unhandled mov i32 type: ${typ}')
 				}
 			}
 		}
@@ -781,7 +781,7 @@ fn (mut c Amd64) mov_int_to_var(var Var, integer int, config VarConfig) {
 	}
 }
 
-fn (mut c Amd64) lea_var_to_reg(r Register, var_offset int) {
+fn (mut c Amd64) lea_var_to_reg(r Register, var_offset i32) {
 	reg := r as Amd64Register
 
 	is_far_var := var_offset > 0x80 || var_offset < -0x7f
@@ -792,7 +792,7 @@ fn (mut c Amd64) lea_var_to_reg(r Register, var_offset int) {
 		else {}
 	}
 	c.g.write8(0x8d)
-	far_var_offset := if is_far_var { 0x40 } else { 0 }
+	far_var_offset := if is_far_var { i32(0x40) } else { i32(0) }
 	match reg {
 		.eax, .rax { c.g.write8(0x45 + far_var_offset) }
 		.edi, .rdi { c.g.write8(0x7d + far_var_offset) }
@@ -807,7 +807,7 @@ fn (mut c Amd64) lea_var_to_reg(r Register, var_offset int) {
 	} else {
 		c.g.write8((0xff - var_offset + 1) % 0x100)
 	}
-	c.g.println('lea ${reg}, [rbp-${var_offset.hex2()}]')
+	c.g.println('lea ${reg}, [rbp-${int(var_offset).hex2()}]')
 }
 
 fn (mut c Amd64) mov_var_to_reg(reg Register, var Var, config VarConfig) {
@@ -870,7 +870,7 @@ fn (mut c Amd64) mov_var_to_reg(reg Register, var Var, config VarConfig) {
 					'mov', 'QWORD'
 				}
 			}
-			far_var_offset := if is_far_var { 0x40 } else { 0 }
+			far_var_offset := if is_far_var { i32(0x40) } else { i32(0) }
 			match reg as Amd64Register {
 				.eax, .rax { c.g.write8(0x45 + far_var_offset) }
 				.edi, .rdi { c.g.write8(0x7d + far_var_offset) }
@@ -885,7 +885,7 @@ fn (mut c Amd64) mov_var_to_reg(reg Register, var Var, config VarConfig) {
 			} else {
 				c.g.write8((0xff - offset + 1) % 0x100)
 			}
-			c.g.println('${instruction} ${reg}, ${size_str} PTR [rbp-${offset.hex2()}]')
+			c.g.println('${instruction} ${reg}, ${size_str} PTR [rbp-${int(offset).hex2()}]')
 		}
 		GlobalVar {
 			// TODO
@@ -897,15 +897,15 @@ fn (mut c Amd64) mov_extend_reg(a Amd64Register, b Amd64Register, typ ast.Type)
 	size := c.g.get_type_size(typ)
 	is_signed := !typ.is_any_kind_of_pointer() && typ.is_signed()
 
-	if size in [1, 2, 4] {
+	if int(size) in [1, 2, 4] {
 		if size == 4 && !is_signed {
-			c.g.write8(0x40 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-				if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
+			c.g.write8(0x40 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+				if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 			c.g.write8(0x89)
 		} else {
-			c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-				if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
-			if size in [1, 2] {
+			c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+				if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
+			if int(size) in [1, 2] {
 				c.g.write8(0x0f)
 			}
 			c.g.write8(match true {
@@ -922,15 +922,15 @@ fn (mut c Amd64) mov_extend_reg(a Amd64Register, b Amd64Register, typ ast.Type)
 	}
 }
 
-fn (mut c Amd64) call_addr_at(addr int, at i64) i64 {
+fn (mut c Amd64) call_addr_at(addr i32, at i64) i64 {
 	// Need to calculate the difference between current position (position after the e8 call)
 	// and the function to call.f
 	// +5 is to get the posistion "e8 xx xx xx xx"
 	// Not sure about the -1.
-	return 0xffffffff - (at + 5 - addr - 1)
+	return 0xffffffff - (at + 5 - i64(addr) - 1)
 }
 
-fn (mut c Amd64) call(addr int) i64 {
+fn (mut c Amd64) call(addr i32) i64 {
 	rel := c.call_addr_at(addr, c.g.pos())
 	c_addr := c.g.pos()
 	// println('call addr=$addr.hex2() rel_addr=$rel.hex2() pos=$g.buf.len')
@@ -942,14 +942,14 @@ fn (mut c Amd64) call(addr int) i64 {
 	return c_addr
 }
 
-fn (mut c Amd64) patch_relative_jmp(pos int, addr i64) {
+fn (mut c Amd64) patch_relative_jmp(pos i32, addr i64) {
 	// Update jmp or cjmp address.
 	// The value is the relative address, difference between current position and the location
 	// after `jxx 00 00 00 00`
-	c.g.write32_at(pos, i32(addr - pos - 4))
+	c.g.write32_at(i64(pos), i32(addr) - pos - 4)
 }
 
-fn (mut c Amd64) extern_call(addr int) {
+fn (mut c Amd64) extern_call(addr i32) {
 	match c.g.pref.os {
 		.linux {
 			c.g.write8(0xff)
@@ -969,7 +969,7 @@ fn (mut c Amd64) extern_call(addr int) {
 			c.g.write8(0xff)
 			c.g.write8(0x15)
 			c.g.write32(addr)
-			c.g.println('call QWORD [rip + 0xffffffff${addr.hex()}]')
+			c.g.println('call QWORD [rip + 0xffffffff${int(addr).hex()}]')
 		}
 		else {
 			c.g.n_error('extern calls not implemented for ${c.g.pref.os}')
@@ -988,10 +988,10 @@ fn (mut c Amd64) gen_syscall(node ast.CallExpr) {
 		}
 		match expr {
 			ast.IntegerLiteral {
-				c.mov(ra[i], expr.val.int())
+				c.mov(ra[i], i32(expr.val.int()))
 			}
 			ast.BoolLiteral {
-				c.mov(ra[i], if expr.val { 1 } else { 0 })
+				c.mov(ra[i], if expr.val { i32(1) } else { i32(0) })
 			}
 			ast.SelectorExpr {
 				mut done := false
@@ -1073,15 +1073,15 @@ pub fn (mut c Amd64) pop(reg Amd64Register) {
 	c.g.stack_depth--
 }
 
-pub fn (mut c Amd64) sub8(reg Amd64Register, val int) {
+pub fn (mut c Amd64) sub8(reg Amd64Register, val i32) {
 	c.g.write8(0x48)
 	c.g.write8(0x83)
 	c.g.write8(0xe8 + i32(reg)) // TODO rax is different?
 	c.g.write8(val)
-	c.g.println('sub8 ${reg},${val.hex2()}')
+	c.g.println('sub8 ${reg},${int(val).hex2()}')
 }
 
-pub fn (mut c Amd64) sub(reg Amd64Register, val int) {
+pub fn (mut c Amd64) sub(reg Amd64Register, val i32) {
 	c.g.write8(0x48)
 	if reg == .rax {
 		c.g.write8(0x2d)
@@ -1090,10 +1090,10 @@ pub fn (mut c Amd64) sub(reg Amd64Register, val int) {
 		c.g.write8(0xe8 + i32(reg))
 	}
 	c.g.write32(val)
-	c.g.println('sub ${reg},${val.hex2()}')
+	c.g.println('sub ${reg},${int(val).hex2()}')
 }
 
-pub fn (mut c Amd64) add(r Register, val int) {
+pub fn (mut c Amd64) add(r Register, val i32) {
 	reg := r as Amd64Register
 	c.g.write8(0x48)
 	if reg == .rax {
@@ -1103,43 +1103,43 @@ pub fn (mut c Amd64) add(r Register, val int) {
 		c.g.write8(0xc0 + i32(reg))
 	}
 	c.g.write32(val)
-	c.g.println('add ${reg},${val.hex2()}')
+	c.g.println('add ${reg},${int(val).hex2()}')
 }
 
-pub fn (mut c Amd64) add8(reg Amd64Register, val int) {
+pub fn (mut c Amd64) add8(reg Amd64Register, val i32) {
 	c.g.write8(0x48)
 	c.g.write8(0x83)
 	c.g.write8(0xc0 + i32(reg))
 	c.g.write8(val)
-	c.g.println('add8 ${reg},${val.hex2()}')
+	c.g.println('add8 ${reg},${int(val).hex2()}')
 }
 
 fn (mut c Amd64) bitand_reg(a Amd64Register, b Amd64Register) {
-	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-		if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
+	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+		if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 	c.g.write8(0x21)
 	c.g.write8(0xc0 + i32(a) % 8 + i32(b) % 8 * 8)
 	c.g.println('and ${a}, ${b}')
 }
 
 fn (mut c Amd64) bitor_reg(a Amd64Register, b Amd64Register) {
-	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-		if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
+	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+		if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 	c.g.write8(0x09)
 	c.g.write8(0xc0 + i32(a) % 8 + i32(b) % 8 * 8)
 	c.g.println('or ${a}, ${b}')
 }
 
 fn (mut c Amd64) bitxor_reg(a Amd64Register, b Amd64Register) {
-	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-		if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
+	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+		if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 	c.g.write8(0x31)
 	c.g.write8(0xc0 + i32(a) % 8 + i32(b) % 8 * 8)
 	c.g.println('xor ${a}, ${b}')
 }
 
 fn (mut c Amd64) bitnot_reg(a Amd64Register) {
-	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 })
+	c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) })
 	c.g.write8(0xf7)
 	c.g.write8(0xd0 + i32(a) % 8)
 	c.g.println('not ${a}')
@@ -1149,7 +1149,7 @@ fn (mut c Amd64) shl_reg(a Amd64Register, b Amd64Register) {
 	if b != .rcx {
 		c.mov_reg(Amd64Register.rcx, b)
 	}
-	c.g.write8(if i32(a) >= i32(Amd64Register.r8) { 0x49 } else { 0x48 })
+	c.g.write8(if i32(a) >= i32(Amd64Register.r8) { i32(0x49) } else { i32(0x48) })
 	c.g.write8(0xd3)
 	c.g.write8(0xe0 + i32(a) % 8)
 	c.g.println('shl ${a}, ${b}')
@@ -1159,7 +1159,7 @@ fn (mut c Amd64) sar_reg(a Amd64Register, b Amd64Register) {
 	if b != .rcx {
 		c.mov_reg(Amd64Register.rcx, b)
 	}
-	c.g.write8(if i32(a) > 7 { 0x49 } else { 0x48 })
+	c.g.write8(if i32(a) > 7 { i32(0x49) } else { i32(0x48) })
 	c.g.write8(0xd3)
 	c.g.write8(0xf8 + i32(a) % 8)
 	c.g.println('sar ${a}, ${b}')
@@ -1169,7 +1169,7 @@ fn (mut c Amd64) shr_reg(a Amd64Register, b Amd64Register) {
 	if b != .rcx {
 		c.mov_reg(Amd64Register.rcx, b)
 	}
-	c.g.write8(if i32(a) > 7 { 0x49 } else { 0x48 })
+	c.g.write8(if i32(a) > 7 { i32(0x49) } else { i32(0x48) })
 	c.g.write8(0xd3)
 	c.g.write8(0xe8 + i32(a) % 8)
 	c.g.println('shr ${a}, ${b}')
@@ -1202,7 +1202,7 @@ fn (mut c Amd64) leave() {
 }
 
 // not used?
-pub fn (mut c Amd64) var_zero(vo int, size int) {
+pub fn (mut c Amd64) var_zero(vo i32, size i32) {
 	c.mov32(.rcx, size)
 	c.lea_var_to_reg(Amd64Register.rdi, vo)
 	c.g.write8(0xb0)
@@ -1234,7 +1234,7 @@ pub fn (mut c Amd64) cld_repne_scasb() {
 	c.g.println('repne scasb')
 }
 
-pub fn (mut c Amd64) xor(r Amd64Register, v int) {
+pub fn (mut c Amd64) xor(r Amd64Register, v i32) {
 	if v == -1 {
 		match r {
 			.rcx {
@@ -1254,8 +1254,8 @@ pub fn (mut c Amd64) xor(r Amd64Register, v int) {
 }
 
 pub fn (mut c Amd64) test_reg(r Amd64Register) {
-	c.g.write8(0x48 + if i32(r) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-		if i32(r) >= i32(Amd64Register.r8) { 4 } else { 0 })
+	c.g.write8(0x48 + if i32(r) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+		if i32(r) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 	c.g.write8(0x85)
 	c.g.write8(0xc0 + i32(r) % 8 + i32(r) % 8 * 8)
 	c.g.println('test ${r}, ${r}')
@@ -1279,7 +1279,8 @@ pub fn (mut c Amd64) get_dllcall_addr(import_addr i64) i64 {
 	// return i32(-(0xe00 + c.g.pos() + 2) + import_addr)
 	// return i32(c.g.code_start_pos + import_addr)
 	text_section := c.g.get_pe_section('.text') or { c.g.n_error('no .text section generated') }
-	return 0xfffffffa - (c.g.pos() - c.g.code_start_pos + text_section.header.virtual_address - import_addr)
+	return 0xfffffffa - (i64(c.g.pos()) - i64(c.g.code_start_pos) +
+		i64(text_section.header.virtual_address) - import_addr)
 }
 
 pub fn (mut c Amd64) dllcall(symbol string) {
@@ -1294,7 +1295,7 @@ pub fn (mut c Amd64) dllcall(symbol string) {
 	c.extern_call(i32(call_addr))
 }
 
-fn (mut c Amd64) gen_print(s string, fd int) {
+fn (mut c Amd64) gen_print(s string, fd i32) {
 	if c.g.pref.os == .windows {
 		c.sub(.rsp, 0x38)
 		c.mov(Amd64Register.rcx, -10 - fd)
@@ -1302,7 +1303,7 @@ fn (mut c Amd64) gen_print(s string, fd int) {
 		c.mov_reg(Amd64Register.rcx, Amd64Register.rax)
 		// c.mov64(Amd64Register.rdx, c.g.allocate_string(s, 3))
 		c.lea(.rdx, c.g.allocate_string(s, 3, .abs64))
-		c.mov(Amd64Register.r8, s.len) // string length
+		c.mov(Amd64Register.r8, i32(s.len)) // string length
 		c.g.write([u8(0x4c), 0x8d, 0x4c, 0x24, 0x20])
 		c.g.println('lea r9, [rsp + 0x20]')
 		c.g.write([u8(0x48), 0xc7, 0x44, 0x24, 0x20])
@@ -1313,12 +1314,12 @@ fn (mut c Amd64) gen_print(s string, fd int) {
 		c.mov(Amd64Register.eax, c.g.nsyscall(.write))
 		c.mov(Amd64Register.edi, fd)
 		c.learel(Amd64Register.rsi, c.g.allocate_string(s, 3, .rel32)) // for rsi its 2
-		c.mov(Amd64Register.edx, s.len) // len
+		c.mov(Amd64Register.edx, i32(s.len)) // len
 		c.syscall()
 	}
 }
 
-pub fn (mut c Amd64) gen_print_reg(r Register, n int, fd int) {
+pub fn (mut c Amd64) gen_print_reg(r Register, n i32, fd i32) {
 	str_reg := if c.g.pref.os == .windows { Amd64Register.rdx } else { Amd64Register.rsi }
 	len_reg := if c.g.pref.os == .windows { Amd64Register.r8 } else { Amd64Register.rdx }
 	c.mov_reg(str_reg, r)
@@ -1387,7 +1388,7 @@ fn (mut c Amd64) relpc(dst Amd64Register, src Amd64Register) {
 	}
 }
 
-fn (mut c Amd64) learel(reg Register, val int) {
+fn (mut c Amd64) learel(reg Register, val i32) {
 	c.g.write8(0x48)
 	c.g.write8(0x8d)
 	match reg as Amd64Register {
@@ -1408,7 +1409,7 @@ fn (mut c Amd64) learel(reg Register, val int) {
 	c.g.println('lea ${reg}, rip + ${val}')
 }
 
-fn (mut c Amd64) lea(reg Amd64Register, val int) {
+fn (mut c Amd64) lea(reg Amd64Register, val i32) {
 	c.g.write8(0x48)
 	c.g.write8(0x8d)
 	c.g.write8(0x15)
@@ -1484,7 +1485,7 @@ fn (mut c Amd64) clear_reg(reg Amd64Register) {
 	c.g.println('xor ${reg}, ${reg}')
 }
 
-fn (mut c Amd64) mov(r Register, val int) {
+fn (mut c Amd64) mov(r Register, val i32) {
 	reg := r as Amd64Register
 	match val {
 		-1 {
@@ -1613,8 +1614,8 @@ fn (mut c Amd64) mod_reg(a Amd64Register, b Amd64Register) {
 
 fn (mut c Amd64) sub_reg(a Amd64Register, b Amd64Register) {
 	if i32(a) <= i32(Amd64Register.r15) && i32(b) <= i32(Amd64Register.r15) {
-		c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-			if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
+		c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+			if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 		c.g.write8(0x29)
 		c.g.write8(0xc0 + i32(a) % 8 + i32(b) % 8 * 8)
 	} else {
@@ -1625,8 +1626,8 @@ fn (mut c Amd64) sub_reg(a Amd64Register, b Amd64Register) {
 
 fn (mut c Amd64) add_reg(a Amd64Register, b Amd64Register) {
 	if i32(a) <= i32(Amd64Register.r15) && i32(b) <= i32(Amd64Register.r15) {
-		c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-			if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
+		c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+			if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 		c.g.write8(0x01)
 		c.g.write8(0xc0 + i32(a) % 8 + i32(b) % 8 * 8)
 	} else {
@@ -1639,8 +1640,8 @@ fn (mut c Amd64) mov_reg(a_reg Register, b_reg Register) {
 	a := a_reg as Amd64Register
 	b := b_reg as Amd64Register
 	if i32(a) <= i32(Amd64Register.r15) && i32(b) <= i32(Amd64Register.r15) {
-		c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { 1 } else { 0 } +
-			if i32(b) >= i32(Amd64Register.r8) { 4 } else { 0 })
+		c.g.write8(0x48 + if i32(a) >= i32(Amd64Register.r8) { i32(1) } else { i32(0) } +
+			if i32(b) >= i32(Amd64Register.r8) { i32(4) } else { i32(0) })
 		c.g.write8(0x89)
 		c.g.write8(0xc0 + i32(a) % 8 + i32(b) % 8 * 8)
 	} else {
@@ -1656,7 +1657,7 @@ fn (mut c Amd64) add_store(a Amd64Register, b Amd64Register, size Size) {
 	if size == ._64 {
 		c.g.write8(0x48 + i32(b) / 8 * 4 + i32(a) / 8)
 	}
-	c.g.write8(if size == ._8 { 0x00 } else { 0x01 })
+	c.g.write8(if size == ._8 { i32(0x00) } else { i32(0x01) })
 	c.g.write8(i32(b) % 8 * 8 + i32(a) % 8)
 	c.g.println('add [${a}], ${b}')
 }
@@ -1668,7 +1669,7 @@ fn (mut c Amd64) sub_store(a Amd64Register, b Amd64Register, size Size) {
 	if size == ._64 {
 		c.g.write8(0x48 + i32(b) / 8 * 4 + i32(a) / 8)
 	}
-	c.g.write8(if size == ._8 { 0x28 } else { 0x29 })
+	c.g.write8(if size == ._8 { i32(0x28) } else { i32(0x29) })
 	c.g.write8(i32(b) % 8 * 8 + i32(a) % 8)
 	c.g.println('sub [${a}], ${b}')
 }
@@ -1683,7 +1684,7 @@ fn (mut c Amd64) mul_store(a Amd64Register, b Amd64Register, size Size) {
 			c.g.write8(0x48 + i32(b) / 8 * 4 + i32(a) / 8)
 		}
 		c.g.write16(0xaf0f)
-		c.g.write8(int(b) % 8 * 8 + int(a) % 8)
+		c.g.write8(i32(b) % 8 * 8 + i32(a) % 8)
 		c.g.println('imul ${b}, [${a}]')
 		c.mov_store(a, b, size)
 	}
@@ -1719,14 +1720,14 @@ pub fn (mut c Amd64) call_fn(node ast.CallExpr) {
 	}
 	addr := c.g.fn_addr[n]
 
-	mut reg_args := []int{}
-	mut ssereg_args := []int{}
-	mut stack_args := []int{}
+	mut reg_args := []i32{}
+	mut ssereg_args := []i32{}
+	mut stack_args := []i32{}
 	mut args := []ast.CallArg{cap: node.args.len + 2}
 
 	ts := c.g.table.sym(node.return_type)
 	return_size := c.g.get_type_size(node.return_type)
-	mut return_pos := -1
+	mut return_pos := i32(-1)
 	mut is_struct_return := false
 	if ts.kind in [.struct_, .multi_return] {
 		return_pos = c.g.allocate_by_type('', node.return_type)
@@ -1762,28 +1763,28 @@ pub fn (mut c Amd64) call_fn(node ast.CallExpr) {
 	mut ssereg_left := c.fn_arg_sse_registers.len
 	for i, size in args_size {
 		if is_floats[i] && ssereg_left > 0 {
-			ssereg_args << i
+			ssereg_args << i32(i)
 			ssereg_left--
 			continue
 		}
 		if reg_left > 0 {
 			if size <= 8 {
-				reg_args << i
+				reg_args << i32(i)
 				reg_left--
 				continue
 			} else if size <= 16 && reg_left > 1 {
-				reg_args << i
+				reg_args << i32(i)
 				reg_left -= 2
 				continue
 			}
 		}
-		stack_args << i
+		stack_args << i32(i)
 	}
-	reg_size := arrays.fold(reg_args.map((args_size[it] + 7) / 8), 0, fn (acc int, elem int) int {
-		return acc + elem
+	reg_size := arrays.fold(reg_args.map((args_size[it] + 7) / 8), 0, fn (acc int, elem i32) int {
+		return acc + int(elem)
 	})
-	stack_size := arrays.fold(stack_args.map((args_size[it] + 7) / 8), 0, fn (acc int, elem int) int {
-		return acc + elem
+	stack_size := arrays.fold(stack_args.map((args_size[it] + 7) / 8), 0, fn (acc int, elem i32) int {
+		return acc + int(elem)
 	})
 
 	// not aligned now XOR pushed args will be odd
@@ -1824,7 +1825,8 @@ pub fn (mut c Amd64) call_fn(node ast.CallExpr) {
 			}
 		}
 		if is_floats[i] {
-			if args_size[i] == 8 && node.expected_arg_types[i + args_offset] == ast.f32_type_idx {
+			if args_size[i] == 8
+				&& node.expected_arg_types[int(i) + args_offset] == ast.f32_type_idx {
 				c.g.write32(0xc05a0ff2)
 				c.g.println('cvtsd2ss xmm0, xmm0')
 			}
@@ -1855,7 +1857,7 @@ pub fn (mut c Amd64) call_fn(node ast.CallExpr) {
 	for i in 0 .. ssereg_args.len {
 		c.pop_sse(c.fn_arg_sse_registers[i])
 	}
-	c.mov(Amd64Register.rax, ssereg_args.len)
+	c.mov(Amd64Register.rax, i32(ssereg_args.len))
 	if node.name in c.g.extern_symbols {
 		if c.g.pref.os == .windows {
 			mut symbol := node.name
@@ -1940,7 +1942,7 @@ fn (mut c Amd64) call_builtin(name Builtin) i64 {
 	return call_addr
 }
 
-fn (mut c Amd64) assign_struct_var(ident_var IdentVar, typ ast.Type, s int) {
+fn (mut c Amd64) assign_struct_var(ident_var IdentVar, typ ast.Type, s i32) {
 	// struct types bigger are passed around as a pointer in rax.
 	// we need to dereference and copy the contents one after the other
 	if ident_var !is LocalVar {
@@ -1951,7 +1953,7 @@ fn (mut c Amd64) assign_struct_var(ident_var IdentVar, typ ast.Type, s int) {
 
 	mut size := s
 
-	mut offset := 0
+	mut offset := i32(0)
 	for size >= 8 {
 		c.mov_deref(Amd64Register.rbx, Amd64Register.rax, ast.u64_type_idx)
 		c.mov_reg_to_var(var, Amd64Register.rbx,
@@ -2017,7 +2019,7 @@ fn (mut c Amd64) assign_var(var IdentVar, raw_type ast.Type) {
 	} else if info is ast.Struct && !typ.is_any_kind_of_pointer()
 		&& !raw_type.is_any_kind_of_pointer() {
 		c.assign_struct_var(var, typ, size)
-	} else if size in [1, 2, 4, 8] {
+	} else if int(size) in [1, 2, 4, 8] {
 		match var {
 			LocalVar { c.mov_reg_to_var(var as LocalVar, Amd64Register.rax) }
 			GlobalVar { c.mov_reg_to_var(var as GlobalVar, Amd64Register.rax) }
@@ -2028,37 +2030,37 @@ fn (mut c Amd64) assign_var(var IdentVar, raw_type ast.Type) {
 	}
 }
 
-fn (mut c Amd64) assign_int(node ast.AssignStmt, i int, name string, ident ast.Ident, int_lit ast.IntegerLiteral) {
+fn (mut c Amd64) assign_int(node ast.AssignStmt, i i32, name string, ident ast.Ident, int_lit ast.IntegerLiteral) {
 	match node.op {
 		.plus_assign {
 			c.mov_var_to_reg(Amd64Register.rax, ident)
-			c.add(Amd64Register.rax, int_lit.val.int())
+			c.add(Amd64Register.rax, i32(int_lit.val.int()))
 			c.mov_reg_to_var(ident, Amd64Register.rax)
 		}
 		.minus_assign {
 			c.mov_var_to_reg(Amd64Register.rax, ident)
-			c.sub(.rax, int_lit.val.int())
+			c.sub(.rax, i32(int_lit.val.int()))
 			c.mov_reg_to_var(ident, Amd64Register.rax)
 		}
 		.mult_assign {
 			c.mov_var_to_reg(Amd64Register.rax, ident)
-			c.mov64(Amd64Register.rdx, int_lit.val.int())
+			c.mov64(Amd64Register.rdx, i64(int_lit.val.int()))
 			c.mul_reg(.rax, .rdx)
 			c.mov_reg_to_var(ident, Amd64Register.rax)
 		}
 		.div_assign {
 			c.mov_var_to_reg(Amd64Register.rax, ident)
-			c.mov64(Amd64Register.rdx, int_lit.val.int())
+			c.mov64(Amd64Register.rdx, i64(int_lit.val.int()))
 			c.div_reg(.rax, .rdx)
 			c.mov_reg_to_var(ident, Amd64Register.rax)
 		}
 		.decl_assign {
-			c.allocate_var(name, 8, int_lit.val.int())
+			c.allocate_var(name, 8, i32(int_lit.val.int()))
 		}
 		.assign {
 			match node.left[i] {
 				ast.Ident {
-					c.mov(Amd64Register.rax, int_lit.val.int())
+					c.mov(Amd64Register.rax, i32(int_lit.val.int()))
 					c.mov_reg_to_var(ident, Amd64Register.rax)
 				}
 				else {
@@ -2074,7 +2076,7 @@ fn (mut c Amd64) assign_int(node ast.AssignStmt, i int, name string, ident ast.I
 	}
 }
 
-fn (mut c Amd64) assign_right_expr(node ast.AssignStmt, i int, right ast.Expr, name string, ident ast.Ident) {
+fn (mut c Amd64) assign_right_expr(node ast.AssignStmt, i i32, right ast.Expr, name string, ident ast.Ident) {
 	match right {
 		ast.IntegerLiteral {
 			c.assign_int(node, i, name, ident, right)
@@ -2184,7 +2186,7 @@ fn (mut c Amd64) assign_right_expr(node ast.AssignStmt, i int, right ast.Expr, n
 			.minus_assign { c.sub_reg(.rbx, .rax) }
 			.div_assign { c.div_reg(.rbx, .rax) }
 			.mult_assign { c.mul_reg(.rbx, .rax) }
-			else { c.g.n_error('unexpected assignment operator ${node.op} for int') }
+			else { c.g.n_error('unexpected assignment operator ${node.op} for i32') }
 		}
 
 		c.mov_reg_to_var(ident, Amd64Register.rbx)
@@ -2203,7 +2205,7 @@ fn (mut c Amd64) assign_right_expr(node ast.AssignStmt, i int, right ast.Expr, n
 			dest := c.g.get_var_offset(var.name)
 			if ie.index is ast.IntegerLiteral {
 				index := ie.index
-				ie_offset := index.val.int() * 8
+				ie_offset := index.val.i32() * 8
 				c.mov_var_to_reg(Amd64Register.rax, var,
 					typ: ast.i64_type_idx
 					offset: ie_offset
@@ -2240,14 +2242,14 @@ fn (mut c Amd64) gen_type_promotion(from ast.Type, to ast.Type, option Amd64Regi
 			}
 			// if castee is in the range of i64
 			prefix, inst := if c.g.get_type_size(to) == 4 {
-				0xf3, 's'
+				i32(0xf3), 's'
 			} else {
-				0xf2, 'd'
+				i32(0xf2), 'd'
 			}
 			c.g.write8(prefix)
-			c.g.write8(0x48 + i32(option.ssereg) / 8 * 4 + i32(option.reg) / 8)
+			c.g.write8(i32(0x48) + i32(option.ssereg) / 8 * 4 + i32(option.reg) / 8)
 			c.g.write16(0x2a0f)
-			c.g.write8(0xc0 + i32(option.ssereg) % 8 * 8 + i32(option.reg) % 8)
+			c.g.write8(i32(0xc0) + i32(option.ssereg) % 8 * 8 + i32(option.reg) % 8)
 			c.g.println('cvtsi2s${inst} ${option.ssereg}, ${option.reg}')
 			addr2 := c.jmp(0)
 			c.g.labels.patches << LabelPatch{
@@ -2263,17 +2265,17 @@ fn (mut c Amd64) gen_type_promotion(from ast.Type, to ast.Type, option Amd64Regi
 			c.g.println('and ebx, 0x1')
 			c.bitor_reg(.rax, .rbx)
 			c.g.write8(prefix)
-			c.g.write8(0x48 + i32(option.ssereg) / 8 * 4 + i32(option.reg) / 8)
+			c.g.write8(i32(0x48) + i32(option.ssereg) / 8 * 4 + i32(option.reg) / 8)
 			c.g.write16(0x2a0f)
-			c.g.write8(0xc0 + i32(option.ssereg) % 8 * 8 + i32(option.reg) % 8)
+			c.g.write8(i32(0xc0) + i32(option.ssereg) % 8 * 8 + i32(option.reg) % 8)
 			c.g.println('cvtsi2s${inst} ${option.ssereg}, ${option.reg}')
 			c.add_sse(option.ssereg, option.ssereg, to)
 			c.g.labels.addrs[label2] = c.g.pos()
 		} else {
 			prefix, inst := if c.g.get_type_size(to) == 4 {
-				0xf3, 's'
+				i32(0xf3), 's'
 			} else {
-				0xf2, 'd'
+				i32(0xf2), 'd'
 			}
 			c.g.write8(prefix)
 			c.g.write8(0x48 + i32(option.ssereg) / 8 * 4 + i32(option.reg) / 8)
@@ -2302,7 +2304,7 @@ fn (mut c Amd64) return_stmt(node ast.Return) {
 			ast.StringLiteral {
 				s = c.g.eval_str_lit_escape_codes(node.exprs[0] as ast.StringLiteral)
 				c.g.expr(node.exprs[0])
-				c.mov64(Amd64Register.rax, c.g.allocate_string(s, 2, .abs64))
+				c.mov64(Amd64Register.rax, i64(c.g.allocate_string(s, 2, .abs64)))
 			}
 			else {
 				c.g.expr(node.exprs[0])
@@ -2433,7 +2435,7 @@ fn (mut c Amd64) return_stmt(node ast.Return) {
 	}
 
 	// jump to return label
-	label := 0
+	label := i32(0)
 	pos := c.jmp(0)
 	c.g.labels.patches << LabelPatch{
 		id: label
@@ -2471,7 +2473,7 @@ fn (mut c Amd64) multi_assign_stmt(node ast.AssignStmt) {
 	}
 	c.mov_reg(Amd64Register.rdx, Amd64Register.rax)
 
-	mut current_offset := 0
+	mut current_offset := i32(0)
 	for i, offset in multi_return.offsets {
 		if node.left[i] is ast.Ident {
 			name := (node.left[i] as ast.Ident).name
@@ -2564,7 +2566,7 @@ fn (mut c Amd64) assign_stmt(node ast.AssignStmt) {
 		// this branch would be removed, but left for compatibility
 		if left is ast.Ident && !typ.is_pure_float() {
 			ident := left as ast.Ident
-			c.assign_right_expr(node, i, right, ident.name, ident)
+			c.assign_right_expr(node, i32(i), right, ident.name, ident)
 			continue
 		}
 		if left is ast.Ident && node.op == .decl_assign {
@@ -2764,7 +2766,7 @@ fn (mut c Amd64) fp_infix_expr(node ast.InfixExpr, left_type ast.Type) {
 	match node.op {
 		.eq, .ne {
 			c.g.write32(0xc1c20ff3)
-			c.g.write8(if node.op == .eq { 0x00 } else { 0x04 })
+			c.g.write8(if node.op == .eq { i32(0x00) } else { i32(0x04) })
 			inst := if node.op == .eq { 'cmpeqss' } else { 'cmpneqss' }
 			c.g.println('${inst} xmm0, xmm1')
 			c.mov_ssereg_to_reg(.rax, .xmm0, ast.f32_type_idx)
@@ -2928,8 +2930,8 @@ fn (mut c Amd64) trap() {
 fn (mut c Amd64) gen_asm_stmt(asm_node ast.AsmStmt) {
 	// inline assembly using vasm
 	c.g.println('// asm inline')
-	mut reg := 0
-	mut imm := 0
+	mut reg := i32(0)
+	mut imm := i32(0)
 	mut regname := ''
 	// dump(asm_node)
 	for t in asm_node.templates {
@@ -2944,20 +2946,20 @@ fn (mut c Amd64) gen_asm_stmt(asm_node ast.AsmStmt) {
 			match a {
 				ast.AsmRegister {
 					regname = a.name
-					reg = native.amd64_cpuregs.index(regname)
+					reg = i32(native.amd64_cpuregs.index(regname))
 					line += a.typ.str()
 				}
 				ast.IntegerLiteral {
 					line += a.val
-					imm = a.val.int()
+					imm = i32(a.val.int())
 				}
 				ast.BoolLiteral {
 					line += a.val.str()
-					imm = if a.val { 1 } else { 0 }
+					imm = if a.val { i32(1) } else { i32(0) }
 				}
 				ast.CharLiteral {
 					line += a.val.str()
-					imm = a.val.int()
+					imm = i32(a.val.int())
 				}
 				/*
 				ast.AsmAddressing {
@@ -3024,7 +3026,7 @@ fn (mut c Amd64) gen_asm_stmt(asm_node ast.AsmStmt) {
 				c.g.write8(byt(imm, 1))
 				c.g.write8(byt(imm, 2))
 				c.g.write8(byt(imm, 3))
-				c.g.println('mov ${reg}, ${imm}')
+				c.g.println('mov ${int(reg)}, ${int(imm)}')
 			}
 			else {
 				c.g.v_error('unsupported instruction ${t.name}', asm_node.pos)
@@ -3033,7 +3035,7 @@ fn (mut c Amd64) gen_asm_stmt(asm_node ast.AsmStmt) {
 	}
 }
 
-fn (mut c Amd64) cjmp_notop(op token.Kind) int {
+fn (mut c Amd64) cjmp_notop(op token.Kind) i32 {
 	return match op {
 		.gt {
 			c.cjmp(.jle)
@@ -3053,7 +3055,7 @@ fn (mut c Amd64) cjmp_notop(op token.Kind) int {
 	}
 }
 
-fn (mut c Amd64) cjmp_op(op token.Kind) int {
+fn (mut c Amd64) cjmp_op(op token.Kind) i32 {
 	return match op {
 		.gt {
 			c.cjmp(.jg)
@@ -3086,9 +3088,9 @@ fn (mut c Amd64) fn_decl(node ast.FnDecl) {
 	c.sub(.rsp, 0)
 
 	// Copy values from registers to local vars (calling convention)
-	mut reg_args := []int{}
-	mut ssereg_args := []int{}
-	mut stack_args := []int{}
+	mut reg_args := []i32{}
+	mut ssereg_args := []i32{}
+	mut stack_args := []i32{}
 	mut params := []ast.Param{cap: node.params.len + 2}
 
 	// The first parameter is an address of returned struct if size > 16
@@ -3112,22 +3114,22 @@ fn (mut c Amd64) fn_decl(node ast.FnDecl) {
 	mut ssereg_left := c.fn_arg_sse_registers.len
 	for i, size in args_size {
 		if is_floats[i] && ssereg_left > 0 {
-			ssereg_args << i
+			ssereg_args << i32(i)
 			ssereg_left--
 			continue
 		}
 		if reg_left > 0 {
 			if size <= 8 {
-				reg_args << i
+				reg_args << i32(i)
 				reg_left--
 				continue
 			} else if size <= 16 && reg_left > 1 {
-				reg_args << i
+				reg_args << i32(i)
 				reg_left -= 2
 				continue
 			}
 		}
-		stack_args << i
+		stack_args << i32(i)
 	}
 
 	// define and copy args on register
@@ -3156,7 +3158,7 @@ fn (mut c Amd64) fn_decl(node ast.FnDecl) {
 		c.mov_ssereg_to_var(LocalVar{ offset: offset, typ: params[i].typ }, c.fn_arg_sse_registers[idx])
 	}
 	// define args on stack
-	mut offset := -2
+	mut offset := i32(-2)
 	for i in stack_args {
 		name := params[i].name
 		c.g.var_offset[name] = offset * 8
@@ -3206,13 +3208,13 @@ pub fn (mut c Amd64) builtin_decl(builtin BuiltinFn) {
 	c.leave()
 }
 
-pub fn (mut c Amd64) allocate_var_two_step(name string, size int, initial_val int) int {
-	// TODO: replace int by i64 or bigger
+pub fn (mut c Amd64) allocate_var_two_step(name string, size i32, initial_val i32) i32 {
+	// TODO: replace i32 by i64 or bigger
 	c.allocate_var(name, size - 8, 0)
 	return c.allocate_var(name, 8, initial_val)
 }
 
-pub fn (mut c Amd64) allocate_var(name string, size int, initial_val int) int {
+pub fn (mut c Amd64) allocate_var(name string, size i32, initial_val i32) i32 {
 	if size > 8 {
 		return c.allocate_var_two_step(name, size, initial_val)
 	}
@@ -3220,40 +3222,40 @@ pub fn (mut c Amd64) allocate_var(name string, size int, initial_val int) int {
 	padding := (size - c.g.stack_var_pos % size) % size
 	n := c.g.stack_var_pos + size + padding
 	is_far_var := n > 0x80 || n < -0x7f
-	far_var_offset := if is_far_var { 0x40 } else { 0 }
+	far_var_offset := if is_far_var { i32(0x40) } else { i32(0) }
 	// `a := 3`  => `mov DWORD [rbp-0x4],0x3`
 	match size {
 		1 {
 			// BYTE
 			c.g.write8(0xc6)
-			c.g.write8(0x45 + far_var_offset)
+			c.g.write8(i32(0x45) + far_var_offset)
 		}
 		2 {
 			// WORD
 			c.g.write8(0x66)
 			c.g.write8(0xc7)
-			c.g.write8(0x45 + far_var_offset)
+			c.g.write8(i32(0x45) + far_var_offset)
 		}
 		4 {
 			// DWORD
 			c.g.write8(0xc7)
-			c.g.write8(0x45 + far_var_offset)
+			c.g.write8(i32(0x45) + far_var_offset)
 		}
 		8 {
 			// QWORD
 			c.g.write8(0x48)
 			c.g.write8(0xc7)
-			c.g.write8(0x45 + far_var_offset)
+			c.g.write8(i32(0x45) + far_var_offset)
 		}
 		else {
-			c.g.n_error('allocate_var: bad size ${size}')
+			c.g.n_error('allocate_var: bad size ${int(size)}')
 		}
 	}
 	// Generate N in `[rbp-N]`
 	if is_far_var {
 		c.g.write32(i32((0xffffffff - i64(n) + 1) % 0x100000000))
 	} else {
-		c.g.write8((0xff - n + 1) % 0x100)
+		c.g.write8(i32((0xff - n + 1) % 0x100))
 	}
 	c.g.stack_var_pos += size + padding
 	c.g.var_offset[name] = c.g.stack_var_pos
@@ -3274,16 +3276,16 @@ pub fn (mut c Amd64) allocate_var(name string, size int, initial_val int) int {
 			c.g.write32(initial_val) // fixme: 64-bit segfaulting
 		}
 		else {
-			c.g.n_error('allocate_var: bad size ${size}')
+			c.g.n_error('allocate_var: bad size ${int(size)}')
 		}
 	}
 
 	// println('allocate_var(size=$size, initial_val=$initial_val)')
-	c.g.println('mov [rbp-${n.hex2()}], ${initial_val} ; Allocate var `${name}`')
+	c.g.println('mov [rbp-${int(n).hex2()}], ${initial_val} ; Allocate var `${name}`')
 	return c.g.stack_var_pos
 }
 
-fn (mut c Amd64) zero_fill(size int, var LocalVar) {
+fn (mut c Amd64) zero_fill(size i32, var LocalVar) {
 	mut left := if size >= 16 {
 		c.mov(Amd64Register.rax, 0)
 		c.mov(Amd64Register.rcx, size / 8)
@@ -3426,7 +3428,7 @@ fn (mut c Amd64) convert_bool_to_string(r Register) {
 	c.g.println('; label ${end_label}')
 }
 
-fn (mut c Amd64) convert_rune_to_string(reg Register, buffer int, var Var, config VarConfig) {
+fn (mut c Amd64) convert_rune_to_string(reg Register, buffer i32, var Var, config VarConfig) {
 	c.lea_var_to_reg(reg, buffer)
 
 	match reg as Amd64Register {
@@ -3608,7 +3610,7 @@ fn (mut c Amd64) reverse_string(r Register) {
 }
 
 fn (mut c Amd64) gen_match_expr(expr ast.MatchExpr) {
-	branch_labels := []int{len: expr.branches.len, init: c.g.labels.new_label() + index * 0} // call new_label for all elements in the array
+	branch_labels := []i32{len: expr.branches.len, init: c.g.labels.new_label() + i32(index * 0)} // call new_label for all elements in the array
 	end_label := c.g.labels.new_label()
 
 	if expr.is_sum_type {
@@ -3618,10 +3620,10 @@ fn (mut c Amd64) gen_match_expr(expr ast.MatchExpr) {
 	}
 	c.push(Amd64Register.rax)
 
-	mut else_label := 0
+	mut else_label := i32(0)
 	for i, branch in expr.branches {
 		if branch.is_else {
-			else_label = branch_labels[i]
+			else_label = branch_labels[int(i)]
 		} else {
 			for cond in branch.exprs {
 				match cond {
@@ -3641,7 +3643,7 @@ fn (mut c Amd64) gen_match_expr(expr ast.MatchExpr) {
 						c.g.println('test bl, bl')
 						then_addr := c.cjmp(.jne)
 						c.g.labels.patches << LabelPatch{
-							id: branch_labels[i]
+							id: branch_labels[int(i)]
 							pos: then_addr
 						}
 						c.push(Amd64Register.rdx)
@@ -3652,7 +3654,7 @@ fn (mut c Amd64) gen_match_expr(expr ast.MatchExpr) {
 						c.cmp_reg(.rax, .rdx)
 						then_addr := c.cjmp(.je)
 						c.g.labels.patches << LabelPatch{
-							id: branch_labels[i]
+							id: branch_labels[int(i)]
 							pos: then_addr
 						}
 						c.push(Amd64Register.rdx)
@@ -3699,20 +3701,20 @@ fn (mut c Amd64) mov_ssereg_to_var(var Var, reg Amd64SSERegister, config VarConf
 			is_far_var := offset > 0x80 || offset < -0x7f
 			typ := c.g.unwrap(if config.typ == 0 { var.typ } else { config.typ })
 
-			far_var_offset := if is_far_var { 0x40 } else { 0 }
-			c.g.write8(if typ == ast.f32_type_idx { 0xf3 } else { 0xf2 })
+			far_var_offset := if is_far_var { i32(0x40) } else { i32(0) }
+			c.g.write8(if typ == ast.f32_type_idx { i32(0xf3) } else { i32(0xf2) })
 			if i32(reg) >= i32(Amd64SSERegister.xmm8) {
 				c.g.write8(0x44)
 			}
 			c.g.write16(0x110f)
-			c.g.write8(0x45 + i32(reg) % 8 * 8 + far_var_offset)
+			c.g.write8(i32(0x45) + i32(reg) % 8 * 8 + far_var_offset)
 			if is_far_var {
 				c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 			} else {
-				c.g.write8((0xff - offset + 1) % 0x100)
+				c.g.write8(i32((0xff - offset + 1) % 0x100))
 			}
 			inst := if typ == ast.f32_type_idx { 'movss' } else { 'movsd' }
-			c.g.println('${inst} [rbp-${offset.hex2()}], ${reg}')
+			c.g.println('${inst} [rbp-${int(offset).hex2()}], ${reg}')
 		}
 		GlobalVar {
 			// TODO
@@ -3743,20 +3745,20 @@ fn (mut c Amd64) mov_var_to_ssereg(reg Amd64SSERegister, var Var, config VarConf
 			is_far_var := offset > 0x80 || offset < -0x7f
 			typ := c.g.unwrap(if config.typ == 0 { var.typ } else { config.typ })
 
-			far_var_offset := if is_far_var { 0x40 } else { 0 }
-			c.g.write8(if typ == ast.f32_type_idx { 0xf3 } else { 0xf2 })
+			far_var_offset := if is_far_var { i32(0x40) } else { i32(0) }
+			c.g.write8(if typ == ast.f32_type_idx { i32(0xf3) } else { i32(0xf2) })
 			if i32(reg) >= i32(Amd64SSERegister.xmm8) {
 				c.g.write8(0x44)
 			}
 			c.g.write16(0x100f)
-			c.g.write8(0x45 + i32(reg) % 8 * 8 + far_var_offset)
+			c.g.write8(i32(0x45) + i32(reg) % 8 * 8 + far_var_offset)
 			if is_far_var {
 				c.g.write32(i32((0xffffffff - i64(offset) + 1) % 0x100000000))
 			} else {
-				c.g.write8((0xff - offset + 1) % 0x100)
+				c.g.write8(i32((0xff - offset + 1) % 0x100))
 			}
 			inst := if typ == ast.f32_type_idx { 'movss' } else { 'movsd' }
-			c.g.println('${inst} ${reg}, [rbp-${offset.hex2()}]')
+			c.g.println('${inst} ${reg}, [rbp-${int(offset).hex2()}]')
 		}
 		GlobalVar {
 			// TODO
@@ -3767,25 +3769,25 @@ fn (mut c Amd64) mov_var_to_ssereg(reg Amd64SSERegister, var Var, config VarConf
 fn (mut c Amd64) mov_ssereg(a Amd64SSERegister, b Amd64SSERegister) {
 	c.g.write8(0xf2)
 	if i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64SSERegister.xmm8) {
-		c.g.write8(0x40 + i32(a) / 8 * 4 + i32(b) / 8)
+		c.g.write8(i32(0x40) + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x100f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	c.g.println('movsd ${a}, ${b}')
 }
 
 fn (mut c Amd64) mov_ssereg_to_reg(a Amd64Register, b Amd64SSERegister, typ ast.Type) {
 	c.g.write8(0x66)
 	rex_base, inst := if typ == ast.f32_type_idx {
-		0x40, 'movd'
+		i32(0x40), 'movd'
 	} else {
-		0x48, 'movq'
+		i32(0x48), 'movq'
 	}
 	if rex_base == 0x48 || i32(a) >= i32(Amd64Register.r8) || i32(b) >= i32(Amd64SSERegister.xmm8) {
 		c.g.write8(rex_base + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x7e0f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	c.g.println('${inst} ${a}, ${b}')
 }
 
@@ -3803,27 +3805,27 @@ fn (mut c Amd64) load_fp(f f64) {
 fn (mut c Amd64) mov_reg_to_ssereg(a Amd64SSERegister, b Amd64Register, typ ast.Type) {
 	c.g.write8(0x66)
 	rex_base, inst := if typ == ast.f32_type_idx {
-		0x40, 'movd'
+		i32(0x40), 'movd'
 	} else {
-		0x48, 'movq'
+		i32(0x48), 'movq'
 	}
 	if rex_base == 0x48 || i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64Register.r8) {
 		c.g.write8(rex_base + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x6e0f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	c.g.println('${inst} ${a}, ${b}')
 }
 
 fn (mut c Amd64) mov_deref_sse(a Amd64SSERegister, b Amd64Register, typ ast.Type) {
 	op, inst, len := if typ == ast.f32_type_idx {
-		0xf3, 'movss', 'DWORD'
+		i32(0xf3), 'movss', 'DWORD'
 	} else {
-		0xf2, 'movsd', 'QWORD'
+		i32(0xf2), 'movsd', 'QWORD'
 	}
 	c.g.write8(op)
 	if i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64Register.r8) {
-		c.g.write8(0x40 + i32(a) / 8 * 4 + i32(b) / 8)
+		c.g.write8(i32(0x40) + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x100f)
 	c.g.write8(i32(a) % 8 * 8 + i32(b) % 8)
@@ -3831,45 +3833,45 @@ fn (mut c Amd64) mov_deref_sse(a Amd64SSERegister, b Amd64Register, typ ast.Type
 }
 
 fn (mut c Amd64) add_sse(a Amd64SSERegister, b Amd64SSERegister, typ ast.Type) {
-	c.g.write8(if typ == ast.f32_type_idx { 0xf3 } else { 0xf2 })
+	c.g.write8(if typ == ast.f32_type_idx { i32(0xf3) } else { i32(0xf2) })
 	if i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64SSERegister.xmm8) {
-		c.g.write8(0x40 + i32(a) / 8 * 4 + i32(b) / 8)
+		c.g.write8(i32(0x40) + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x580f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	inst := if typ == ast.f32_type_idx { 'addss' } else { 'addsd' }
 	c.g.println('${inst} ${a}, ${b}')
 }
 
 fn (mut c Amd64) sub_sse(a Amd64SSERegister, b Amd64SSERegister, typ ast.Type) {
-	c.g.write8(if typ == ast.f32_type_idx { 0xf3 } else { 0xf2 })
+	c.g.write8(if typ == ast.f32_type_idx { i32(0xf3) } else { i32(0xf2) })
 	if i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64SSERegister.xmm8) {
-		c.g.write8(0x40 + i32(a) / 8 * 4 + i32(b) / 8)
+		c.g.write8(i32(0x40) + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x5c0f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	inst := if typ == ast.f32_type_idx { 'subss' } else { 'subsd' }
 	c.g.println('${inst} ${a}, ${b}')
 }
 
 fn (mut c Amd64) mul_sse(a Amd64SSERegister, b Amd64SSERegister, typ ast.Type) {
-	c.g.write8(if typ == ast.f32_type_idx { 0xf3 } else { 0xf2 })
+	c.g.write8(if typ == ast.f32_type_idx { i32(0xf3) } else { i32(0xf2) })
 	if i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64SSERegister.xmm8) {
-		c.g.write8(0x40 + i32(a) / 8 * 4 + i32(b) / 8)
+		c.g.write8(i32(0x40) + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x590f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	inst := if typ == ast.f32_type_idx { 'mulss' } else { 'mulsd' }
 	c.g.println('${inst} ${a}, ${b}')
 }
 
 fn (mut c Amd64) div_sse(a Amd64SSERegister, b Amd64SSERegister, typ ast.Type) {
-	c.g.write8(if typ == ast.f32_type_idx { 0xf3 } else { 0xf2 })
+	c.g.write8(if typ == ast.f32_type_idx { i32(0xf3) } else { i32(0xf2) })
 	if i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64SSERegister.xmm8) {
-		c.g.write8(0x40 + i32(a) / 8 * 4 + i32(b) / 8)
+		c.g.write8(i32(0x40) + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x5e0f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	inst := if typ == ast.f32_type_idx { 'divss' } else { 'divsd' }
 	c.g.println('${inst} ${a}, ${b}')
 }
@@ -3879,10 +3881,10 @@ fn (mut c Amd64) cmp_sse(a Amd64SSERegister, b Amd64SSERegister, typ ast.Type) {
 		c.g.write8(0x66)
 	}
 	if i32(a) >= i32(Amd64SSERegister.xmm8) || i32(b) >= i32(Amd64SSERegister.xmm8) {
-		c.g.write8(0x40 + i32(a) / 8 * 4 + i32(b) / 8)
+		c.g.write8(i32(0x40) + i32(a) / 8 * 4 + i32(b) / 8)
 	}
 	c.g.write16(0x2e0f)
-	c.g.write8(0xc0 + i32(a) % 8 * 8 + i32(b) % 8)
+	c.g.write8(i32(0xc0) + i32(a) % 8 * 8 + i32(b) % 8)
 	inst := if typ == ast.f32_type_idx { 'ucomiss' } else { 'ucomisd' }
 	c.g.println('${inst} ${a}, ${b}')
 }
@@ -3895,7 +3897,7 @@ fn (mut c Amd64) push_sse(reg Amd64SSERegister) {
 		c.g.write8(0x44)
 	}
 	c.g.write16(0x110f)
-	c.g.write8(0x04 + i32(reg) % 8 * 8)
+	c.g.write8(i32(0x04) + i32(reg) % 8 * 8)
 	c.g.write8(0x24)
 	c.g.println('movsd [rsp], ${reg}')
 	c.is_16bit_aligned = !c.is_16bit_aligned
@@ -3909,7 +3911,7 @@ fn (mut c Amd64) pop_sse(reg Amd64SSERegister) {
 		c.g.write8(0x44)
 	}
 	c.g.write16(0x100f)
-	c.g.write8(0x04 + i32(reg) % 8 * 8)
+	c.g.write8(i32(0x04) + i32(reg) % 8 * 8)
 	c.g.write8(0x24)
 	c.g.println('movsd ${reg}, [rsp]')
 	c.g.write32(0x08c48348)
@@ -4080,6 +4082,6 @@ fn (mut c Amd64) cmp_to_stack_top(reg Register) {
 }
 
 // Temporary!
-fn (mut c Amd64) adr(r Arm64Register, delta int) {
+fn (mut c Amd64) adr(r Arm64Register, delta i32) {
 	panic('`adr` instruction not supported with amd64')
 }
diff --git a/vlib/v/gen/native/arm64.v b/vlib/v/gen/native/arm64.v
index 29feba188c5daf..242f0f3c2bb182 100644
--- a/vlib/v/gen/native/arm64.v
+++ b/vlib/v/gen/native/arm64.v
@@ -45,12 +45,12 @@ mut:
 	// arm64 specific stuff for code generation
 }
 
-fn (mut x Arm64) allocate_var(name string, size int, initial_val int) int {
+fn (mut x Arm64) allocate_var(name string, size i32, initial_val i32) i32 {
 	eprintln('TODO: allocating var on arm64 (${name}) = ${size} = ${initial_val}')
 	return 0
 }
 
-fn (mut c Arm64) mov(reg Register, val int) {
+fn (mut c Arm64) mov(reg Register, val i32) {
 	c.mov_arm(reg as Arm64Register, u64(val))
 }
 
@@ -61,9 +61,9 @@ fn (mut c Arm64) mov_arm(reg Arm64Register, val u64) {
 	// println(x & ~m)
 	// println(x & ~(m << 16))
 	// g.write32(0x777777)
-	r := int(reg)
+	r := i32(reg)
 	if r >= 0 && r <= 16 {
-		c.g.write32(int(u32(0xd2800000 + u32(r) + (u32(val) << 5))))
+		c.g.write32(i32(u32(0xd2800000 + u32(r) + (u32(val) << 5))))
 		c.g.println('mov x${r}, ${val}')
 	} else {
 		c.g.n_error('mov_arm unsupported values')
@@ -71,11 +71,11 @@ fn (mut c Arm64) mov_arm(reg Arm64Register, val u64) {
 	/*
 	if 1 ^ (x & ~m) != 0 {
 		// println('yep')
-		g.write32(int(u64(0x52800000) | u64(r) | x << 5))
+		g.write32(i32(u64(0x52800000) | u64(r) | x << 5))
 		g.write32(0x88888888)
-		g.write32(int(u64(0x52800000) | u64(r) | x >> 11))
+		g.write32(i32(u64(0x52800000) | u64(r) | x >> 11))
 	} else if 1 ^ (x & ~(m << 16)) != 0 {
-		// g.write32(int(u64(0x52800000) | u64(r) | x >> 11))
+		// g.write32(i32(u64(0x52800000) | u64(r) | x >> 11))
 		// println('yep2')
 		// g.write32(0x52a00000 | r | val >> 11)
 	}
@@ -88,7 +88,7 @@ fn (mut c Arm64) neg(r Arm64Register) {
 
 fn (mut c Arm64) neg_regs(a Arm64Register, b Arm64Register) {
 	if u32(a) < 0x0f && u32(b) < 0x0f {
-		c.g.write32(int(0xe2600000 | (u32(a) << 16) | u32(b) << 12))
+		c.g.write32(i32(0xe2600000 | (u32(a) << 16) | u32(b) << 12))
 		c.g.println('neg ${a}, ${b}')
 	} else {
 		c.g.n_error('unhandled neg ${a}, ${b}')
@@ -203,7 +203,7 @@ pub fn (mut c Arm64) call_fn(node ast.CallExpr) {
 		match expr {
 			ast.IntegerLiteral {
 				// `foo(2)` => `mov edi,0x2`
-				// c.mov_arm(native.fn_arg_registers[i], expr.val.int())
+				// c.mov_arm(native.fn_arg_registers[i], i32(expr.val.int()))
 			}
 			/*
 			ast.Ident {
@@ -211,7 +211,7 @@ pub fn (mut c Arm64) call_fn(node ast.CallExpr) {
 				var_offset := c.g.get_var_offset(expr.name)
 				if c.g.pref.is_verbose {
 					println('i=$i fn name= $name offset=$var_offset')
-					println(int(native.fn_arg_registers[i]))
+					println(i32(native.fn_arg_registers[i]))
 				}
 				c.g.code_gen.mov_var_to_reg(native.fn_arg_registers[i], var_offset)
 			}
@@ -224,7 +224,7 @@ pub fn (mut c Arm64) call_fn(node ast.CallExpr) {
 	if node.args.len > 6 {
 		c.g.n_error('more than 6 args not allowed for now')
 	}
-	c.call(int(addr))
+	c.call(i32(addr))
 	c.g.println('fn call `${name}()`')
 	// println('call $name $addr')
 }
@@ -255,8 +255,8 @@ fn (mut g Gen) gen_arm64_helloworld() {
 	g.write8(0)
 }
 
-fn (mut c Arm64) adr(r Arm64Register, delta int) {
-	c.g.write32(int(0x10000000 | int(r) | int(u32(delta) << 4)))
+fn (mut c Arm64) adr(r Arm64Register, delta i32) {
+	c.g.write32(i32(0x10000000 | i32(r) | i32(u32(delta) << 4)))
 	c.g.println('adr ${r}, ${delta}')
 }
 
@@ -320,15 +320,15 @@ pub fn (mut c Arm64) gen_arm64_exit(expr ast.Expr) {
 	c.svc()
 }
 
-fn (mut c Arm64) address_size() int {
+fn (mut c Arm64) address_size() i32 {
 	return 8
 }
 
-fn (mut c Arm64) gen_print(s string, fd int) {
+fn (mut c Arm64) gen_print(s string, fd i32) {
 	panic('Arm64.gen_print() is not implemented')
 }
 
-fn (mut c Arm64) gen_print_reg(r Register, n int, fd int) {
+fn (mut c Arm64) gen_print_reg(r Register, n i32, fd i32) {
 	panic('Arm64.gen_print_reg() is not implemented')
 }
 
@@ -336,11 +336,11 @@ fn (mut g Gen) gen_asm_stmt_arm64(asm_node ast.AsmStmt) {
 	g.v_error('The asm statement for arm64 not yet implemented', asm_node.pos)
 }
 
-fn (mut c Arm64) learel(reg Register, val int) {
+fn (mut c Arm64) learel(reg Register, val i32) {
 	panic('Arm64.learel() not implemented')
 }
 
-fn (mut c Arm64) lea_var_to_reg(reg Register, var_offset int) {
+fn (mut c Arm64) lea_var_to_reg(reg Register, var_offset i32) {
 	panic('Arm64.lea_var_to_reg() not implemented')
 }
 
@@ -376,7 +376,7 @@ fn (mut c Arm64) mov64(r Register, val i64) {
 	panic('Arm64.mov64() not implemented')
 }
 
-fn (mut c Arm64) convert_rune_to_string(r Register, buffer int, var Var, config VarConfig) {
+fn (mut c Arm64) convert_rune_to_string(r Register, buffer i32, var Var, config VarConfig) {
 	panic('Arm64.convert_rune_to_string() not implemented')
 }
 
@@ -463,7 +463,7 @@ fn (mut c Arm64) cmp_var_reg(var Var, reg Register, config VarConfig) {
 	panic('Arm64.cmp_var_reg() not implemented')
 }
 
-fn (mut c Arm64) cmp_var(var Var, val int, config VarConfig) {
+fn (mut c Arm64) cmp_var(var Var, val i32, config VarConfig) {
 	panic('Arm64.cmp_var() not implemented')
 }
 
@@ -475,11 +475,11 @@ fn (mut c Arm64) inc_var(var Var, config VarConfig) {
 	panic('Arm64.inc_var() not implemented')
 }
 
-fn (mut c Arm64) cjmp(op JumpOp) int {
+fn (mut c Arm64) cjmp(op JumpOp) i32 {
 	panic('Arm64.cjmp() not implemented')
 }
 
-fn (mut c Arm64) jmp(addr int) int {
+fn (mut c Arm64) jmp(addr i32) i32 {
 	panic('Arm64.jmp() not implemented')
 }
 
@@ -499,19 +499,19 @@ fn (mut c Arm64) mov_reg_to_var(var Var, reg Register, config VarConfig) {
 	panic('Arm64.mov_reg_to_var() not implemented')
 }
 
-fn (mut c Arm64) mov_int_to_var(var Var, integer int, config VarConfig) {
+fn (mut c Arm64) mov_int_to_var(var Var, integer i32, config VarConfig) {
 	panic('Arm64.mov_int_to_var() not implemented')
 }
 
-fn (mut c Arm64) call(addr int) i64 {
+fn (mut c Arm64) call(addr i32) i64 {
 	panic('Arm64.call() not implemented')
 }
 
-fn (mut c Arm64) zero_fill(size int, var LocalVar) {
+fn (mut c Arm64) zero_fill(size i32, var LocalVar) {
 	panic('Arm64.zero_fill() not implemented')
 }
 
-fn (mut c Arm64) call_addr_at(addr int, at i64) i64 {
+fn (mut c Arm64) call_addr_at(addr i32, at i64) i64 {
 	panic('Arm64.call_addr_at() not implemented')
 }
 
@@ -523,7 +523,7 @@ fn (mut c Arm64) push(r Register) {
 	panic('Arm64.push() not implemented')
 }
 
-pub fn (mut c Arm64) add(r Register, val int) {
+pub fn (mut c Arm64) add(r Register, val i32) {
 	panic('Arm64.add() not implemented')
 }
 
@@ -531,6 +531,6 @@ fn (mut c Arm64) mov_deref(reg Register, regptr Register, typ ast.Type) {
 	panic('Arm64.mov_deref() not implemented')
 }
 
-fn (mut c Arm64) patch_relative_jmp(pos int, addr i64) {
+fn (mut c Arm64) patch_relative_jmp(pos i32, addr i64) {
 	panic('Arm64.patch_relative_jmp() not implemented')
 }
diff --git a/vlib/v/gen/native/array.v b/vlib/v/gen/native/array.v
index 9ced5ce9130b80..a5cb39c4180d06 100644
--- a/vlib/v/gen/native/array.v
+++ b/vlib/v/gen/native/array.v
@@ -6,7 +6,7 @@ module native
 /*
 import v.ast
 
-fn (mut g Gen) allocate_raw_array(name string, size int, items int) int {
+fn (mut g Gen) allocate_raw_array(name string, size i32, items i32) i32 {
 	pos := g.code_gen.allocate_var(name, size, items)
 	g.stack_var_pos += (size * items)
 	return pos
@@ -38,7 +38,7 @@ fn (mut g Gen) array_init(var Var, node ast.ArrayInit) {
 	if ts.kind == .array_fixed {
 		g.array_init_fixed(var)
 	} else if len == 0 {
-		// `[]int{len: 6, cap: 10, init: 22}`
+		// `[]i32{len: 6, cap: 10, init: 22}`
 		g.array_init_with_fields(var, node, elem_type)
 	} else {
 		// `[1, 2, 3]`
@@ -50,9 +50,9 @@ fn (mut g Gen) array_init_fixed(var Var) {
 	g.n_error('fixed array initialization not implemented yet')
 }
 
-// `[]int{len: 6, cap: 10, init: 22}`
+// `[]i32{len: 6, cap: 10, init: 22}`
 fn (mut g Gen) array_init_with_fields(var Var, node ast.ArrayInit, elem_type ast.Type) {
-	if node.has_index { // `[]int{len: 5, init: index * index}`
+	if node.has_index { // `[]i32{len: 5, init: index * index}`
 		g.n_error('array initialization with `index` variable not supported')
 	}
 
diff --git a/vlib/v/gen/native/builtins.v b/vlib/v/gen/native/builtins.v
index 44f8e38bbe4619..f86f1ea44c0658 100644
--- a/vlib/v/gen/native/builtins.v
+++ b/vlib/v/gen/native/builtins.v
@@ -68,13 +68,13 @@ pub fn (mut g Gen) generate_builtins() {
 
 		// patch all call addresses where this builtin gets called
 		for call in builtin.calls {
-			rel := g.code_gen.call_addr_at(int(call_addr), call)
-			g.write32_at(call + 1, int(rel))
+			rel := g.code_gen.call_addr_at(i32(call_addr), call)
+			g.write32_at(call + 1, i32(rel))
 		}
 	}
 }
 
-pub fn (mut g Gen) get_builtin_arg_reg(name Builtin, index int) Register {
+pub fn (mut g Gen) get_builtin_arg_reg(name Builtin, index i32) Register {
 	builtin := g.builtins[name] or { panic('undefined builtin function ${name}') }
 	if index >= builtin.arg_regs.len {
 		g.n_error('builtin ${name} does only have ${builtin.arg_regs.len} arguments, requested ${index}')
diff --git a/vlib/v/gen/native/dos.v b/vlib/v/gen/native/dos.v
index 76d357837d7f28..572a07d0cf35be 100644
--- a/vlib/v/gen/native/dos.v
+++ b/vlib/v/gen/native/dos.v
@@ -10,7 +10,7 @@ const (
 
 pub fn (mut g Gen) gen_dos_header() {
 	dos_header := [
-		int(PeMagic.mz),
+		i32(PeMagic.mz),
 		// signature
 		0x80,
 		// bytes on last page of file
diff --git a/vlib/v/gen/native/elf.v b/vlib/v/gen/native/elf.v
index 2c84e27585891b..dcd6b70ff2f27f 100644
--- a/vlib/v/gen/native/elf.v
+++ b/vlib/v/gen/native/elf.v
@@ -140,11 +140,11 @@ mut:
 	ident_abiversion i8  // Further specification of the ABI version.
 	typ              i16 // Object file type.
 	machine          i16 // Target instruction set architecture.
-	version          int // ELF version.
+	version          i32 // ELF version.
 	entry            i64 // Memory address of the entry point.
 	phoff            i64 // Pointer to the start of the program header table.
 	shoff            i64 // Pointer to the start of the section header table.
-	flags            int // Flags.
+	flags            i32 // Flags.
 	ehsize           i16 // Header size.
 	phentsize        i16 // Size of program headers.
 	phnum            i16 // Number of program headers.
@@ -179,11 +179,11 @@ fn (mut g Gen) default_elf_header() ElfHeader {
 fn (mut g Gen) gen_elf_header(h ElfHeader) {
 	g.write('\x7fELF'.bytes())
 	g.println('; \\x7fELF')
-	g.write8(h.ident_class)
-	g.write8(h.ident_data)
-	g.write8(h.ident_version)
-	g.write8(h.ident_osabi)
-	g.write8(h.ident_abiversion)
+	g.write8(i32(h.ident_class))
+	g.write8(i32(h.ident_data))
+	g.write8(i32(h.ident_version))
+	g.write8(i32(h.ident_osabi))
+	g.write8(i32(h.ident_abiversion))
 
 	// padding
 	for _ in 0 .. 7 {
@@ -191,9 +191,9 @@ fn (mut g Gen) gen_elf_header(h ElfHeader) {
 	}
 	g.println('; e_ident')
 
-	g.write16(h.typ)
+	g.write16(i32(h.typ))
 	g.println('; e_type')
-	g.write16(h.machine)
+	g.write16(i32(h.machine))
 	g.println('; e_machine')
 	g.write32(h.version)
 	g.println('; e_version')
@@ -205,17 +205,17 @@ fn (mut g Gen) gen_elf_header(h ElfHeader) {
 	g.println('; e_shoff')
 	g.write32(h.flags)
 	g.println('; e_flags')
-	g.write16(h.ehsize)
+	g.write16(i32(h.ehsize))
 	g.println('; e_ehsize')
-	g.write16(h.phentsize)
+	g.write16(i32(h.phentsize))
 	g.println('; e_phentsize')
-	g.write16(h.phnum)
+	g.write16(i32(h.phnum))
 	g.println('; e_phnum')
-	g.write16(h.shentsize)
+	g.write16(i32(h.shentsize))
 	g.println('; e_shentsize')
-	g.write16(h.shnum)
+	g.write16(i32(h.shnum))
 	g.println('; e_shnum')
-	g.write16(h.shstrndx)
+	g.write16(i32(h.shstrndx))
 	g.println('; e_shstrndx')
 
 	g.println('^^^ ELF header (64)')
@@ -223,8 +223,8 @@ fn (mut g Gen) gen_elf_header(h ElfHeader) {
 
 struct ProgramHeader {
 mut:
-	typ    int // Program header type.
-	flags  int // Segment-independent flags.
+	typ    i32 // Program header type.
+	flags  i32 // Segment-independent flags.
 	offset i64 // Offset of the segment in the file image.
 	vaddr  i64 // Virtual segment address.
 	paddr  i64 // Physical segment address.
@@ -233,7 +233,7 @@ mut:
 	align  i64 // Segment alignment.
 }
 
-fn (mut g Gen) create_program_header(typ int, flags int, align i64) ProgramHeader {
+fn (mut g Gen) create_program_header(typ i32, flags i32, align i64) ProgramHeader {
 	return ProgramHeader{
 		typ: typ
 		flags: flags
@@ -279,14 +279,14 @@ fn (mut g Gen) gen_program_header(p ProgramHeader) {
 
 struct SectionHeader {
 mut:
-	name      int // Offset to name string in .shstrtab.
-	typ       int // Section type.
+	name      i32 // Offset to name string in .shstrtab.
+	typ       i32 // Section type.
 	flags     i64 // Section attributes.
 	addr      i64 // Section address.
 	offset    i64 // Section address offset.
 	size      i64 // Section size.
-	link      int // Section index for associated section types.
-	info      int // Extra section information.
+	link      i32 // Section index for associated section types.
+	info      i32 // Extra section information.
 	addralign i64 // Section Alignment (must be power of two).
 	entsize   i64 // Section entry size.
 
@@ -296,7 +296,7 @@ mut:
 struct SymbolTableSection {
 	str_name string // string name (not generated)
 mut:
-	name  int // Index to name in .strtab.
+	name  i32 // Index to name in .strtab.
 	info  i8  // symbol type and binding attribute.
 	other i8  // Symbol visibility.
 	shndx i16 // Related section header table index.
@@ -341,7 +341,7 @@ mut:
 	addend i64 // Constant addent for computing the value of the relocation field.
 }
 
-fn (mut g Gen) create_rela_section(name string, offset i64, sym int, typ u32, addend i64) RelASection {
+fn (mut g Gen) create_rela_section(name string, offset i64, sym i32, typ u32, addend i64) RelASection {
 	return RelASection{
 		name: name
 		offset: offset
@@ -370,18 +370,18 @@ fn (mut g Gen) create_dynamic_section(tag i64, val i64) DynamicSection {
 
 struct NoteSection {
 mut:
-	namesz int // Length of the name field in bytes.
-	descsz int // Length of the descriptor field in bytes.
-	typ    int // Type of the node
+	namesz i32 // Length of the name field in bytes.
+	descsz i32 // Length of the descriptor field in bytes.
+	typ    i32 // Type of the node
 
 	name []u8 // Name string of the note.
 	desc []u8 // Descripition string of the node, must be aligned by 4 bytes
 }
 
-fn (mut g Gen) create_note_section(typ int, name string, desc string) NoteSection {
+fn (mut g Gen) create_note_section(typ i32, name string, desc string) NoteSection {
 	return NoteSection{
-		namesz: name.len
-		descsz: desc.len
+		namesz: i32(name.len)
+		descsz: i32(desc.len)
 		typ: typ
 		name: name.bytes()
 		desc: desc.bytes()
@@ -446,7 +446,7 @@ mut:
 	data   SectionData = DynSymSection{}
 }
 
-fn (mut g Gen) create_section(name string, typ int, link int, info int, addralign i64, entsize i64, data SectionData) Section {
+fn (mut g Gen) create_section(name string, typ i32, link i32, info i32, addralign i64, entsize i64, data SectionData) Section {
 	return Section{
 		name: name
 		header: SectionHeader{
@@ -462,12 +462,12 @@ fn (mut g Gen) create_section(name string, typ int, link int, info int, addralig
 
 fn (mut g Gen) create_shstrtab(mut sections []Section) {
 	mut names := []string{len: sections.len + 1}
-	mut offset := 1
+	mut offset := i32(1)
 
 	for i, mut section in sections {
 		names[i] = section.name
 		section.header.name = offset
-		offset += section.name.len + 1
+		offset += i32(section.name.len) + 1
 	}
 
 	names[sections.len] = '.shstrtab'
@@ -481,8 +481,8 @@ fn (mut g Gen) create_shstrtab(mut sections []Section) {
 
 fn (mut g Gen) create_symtab(mut sections []Section, mut table []SymbolTableSection) {
 	mut names := []string{len: table.len}
-	mut offset := 1
-	mut local_symbols := 0
+	mut offset := i32(1)
+	mut local_symbols := i32(0)
 
 	for i, mut entry in table {
 		names[i] = entry.str_name
@@ -493,13 +493,13 @@ fn (mut g Gen) create_symtab(mut sections []Section, mut table []SymbolTableSect
 			local_symbols++
 		}
 
-		offset += entry.str_name.len + 1
+		offset += i32(entry.str_name.len + 1)
 	}
 
 	sections << g.create_section('.strtab', native.elf_sht_strtab, 0, 0, 1, 0, g.create_string_table_section(names))
 
 	sections << // index of .strtab
-	g.create_section('.symtab', native.elf_sht_symtab, sections.len - 1, local_symbols,
+	g.create_section('.symtab', native.elf_sht_symtab, i32(sections.len - 1), local_symbols,
 		native.elf_sh_symtab_align, native.elf_sh_symtab_entsize, table)
 }
 
@@ -518,10 +518,10 @@ fn (mut g Gen) create_progbits(name string, flags u64, data []u8) Section {
 	return section
 }
 
-fn (mut g Gen) find_section_header(name string, sections []Section) int {
+fn (mut g Gen) find_section_header(name string, sections []Section) i32 {
 	for i, section in sections {
 		if name == section.name {
-			return i
+			return i32(i)
 		}
 	}
 	return 0
@@ -571,9 +571,9 @@ fn (mut g Gen) gen_symtab_data(section Section, data []SymbolTableSection) {
 		}
 
 		g.write32(symbol.name)
-		g.write8(symbol.info)
-		g.write8(symbol.other)
-		g.write16(symbol.shndx)
+		g.write8(i32(symbol.info))
+		g.write8(i32(symbol.other))
+		g.write16(i32(symbol.shndx))
 		g.write64(symbol.value)
 		g.write64(symbol.size)
 		g.println('; SHT_SYMTAB ${symbol.str_name}')
@@ -683,10 +683,10 @@ fn (mut g Gen) gen_section_data(sections []Section) {
 	}
 }
 
-pub fn (mut g Gen) symtab_get_index(symbols []SymbolTableSection, name string) int {
+pub fn (mut g Gen) symtab_get_index(symbols []SymbolTableSection, name string) i32 {
 	for i, sym in symbols {
 		if sym.str_name == name {
-			return i
+			return i32(i)
 		}
 	}
 	return 0
@@ -751,7 +751,7 @@ pub fn (mut g Gen) generate_linkable_elf_header() {
 	}
 
 	g.code_start_pos = g.pos()
-	g.debug_pos = int(g.pos())
+	g.debug_pos = i32(g.pos())
 	// if g.start_symbol_addr > 0 {
 	//	g.write64_at(g.start_symbol_addr + native.elf_symtab_size - 16, g.code_start_pos)
 	//}
@@ -766,7 +766,7 @@ pub fn (mut g Gen) generate_linkable_elf_header() {
 	g.code_gen.ret()
 	g.println('; return 0')
 
-	g.debug_pos = g.buf.len
+	g.debug_pos = i32(g.buf.len)
 }
 
 pub fn (mut g Gen) generate_simple_elf_header() {
@@ -796,7 +796,7 @@ pub fn (mut g Gen) generate_simple_elf_header() {
 	}
 
 	g.code_start_pos = g.pos()
-	g.debug_pos = int(g.pos())
+	g.debug_pos = i32(g.pos())
 
 	g.code_gen.call(native.placeholder)
 	g.println('; call main.main')
@@ -820,17 +820,17 @@ pub fn (mut g Gen) generate_simple_elf_header() {
 }
 
 pub fn (mut g Gen) elf_string_table() {
-	mut generated := map[string]int{}
+	mut generated := map[string]i32{}
 
 	for _, s in g.strs {
-		pos := generated[s.str] or { g.buf.len }
+		pos := generated[s.str] or { i32(g.buf.len) }
 
 		match s.typ {
 			.abs64 {
-				g.write64_at(s.pos, pos)
+				g.write64_at(i64(s.pos), i64(pos))
 			}
 			.rel32 {
-				g.write32_at(s.pos, pos - s.pos - 4)
+				g.write32_at(i64(s.pos), pos - s.pos - 4)
 			}
 			else {
 				g.n_error('unsupported string reloc type')
@@ -872,7 +872,7 @@ pub fn (mut g Gen) generate_elf_footer() {
 	g.write64_at(g.file_size_pos + 8, file_size)
 	if g.pref.arch == .arm64 {
 		bl_next := u32(0x94000001)
-		g.write32_at(g.code_start_pos, int(bl_next))
+		g.write32_at(g.code_start_pos, i32(bl_next))
 	} else {
 		// amd64
 		// call main function, it's not guaranteed to be the first
@@ -880,7 +880,7 @@ pub fn (mut g Gen) generate_elf_footer() {
 		// now need to replace "0" with a relative address of the main function
 		// +1 is for "e8"
 		// -5 is for "e8 00 00 00 00"
-		g.write32_at(g.code_start_pos + 1, int(g.main_fn_addr - g.code_start_pos) - 5)
+		g.write32_at(g.code_start_pos + 1, i32(g.main_fn_addr - g.code_start_pos) - 5)
 	}
 	g.create_executable()
 }
diff --git a/vlib/v/gen/native/expr.v b/vlib/v/gen/native/expr.v
index 6d0e289c1f62b4..621522612dd06c 100644
--- a/vlib/v/gen/native/expr.v
+++ b/vlib/v/gen/native/expr.v
@@ -15,12 +15,12 @@ fn (mut g Gen) expr(node ast.Expr) {
 			g.expr(node.expr)
 		}
 		ast.ArrayInit {
-			pos := g.allocate_array('_anonarray', 8, node.exprs.len)
+			pos := g.allocate_array('_anonarray', 8, i32(node.exprs.len))
 			g.code_gen.init_array(LocalVar{ offset: pos, typ: node.typ }, node)
 			g.code_gen.lea_var_to_reg(g.code_gen.main_reg(), pos)
 		}
 		ast.BoolLiteral {
-			g.code_gen.mov64(g.code_gen.main_reg(), int(node.val))
+			g.code_gen.mov64(g.code_gen.main_reg(), i64(node.val))
 		}
 		ast.CallExpr {
 			match node.name {
@@ -151,7 +151,7 @@ fn (mut g Gen) local_var_ident(ident ast.Ident, var LocalVar) {
 	}
 }
 
-fn (mut g Gen) condition(expr ast.Expr, neg bool) int {
+fn (mut g Gen) condition(expr ast.Expr, neg bool) i32 {
 	g.expr(expr)
 	g.code_gen.cmp_zero(g.code_gen.main_reg())
 	return g.code_gen.cjmp(if neg { .jne } else { .je })
@@ -167,7 +167,7 @@ fn (mut g Gen) if_expr(node ast.IfExpr) {
 	if node.branches.len == 0 {
 		return
 	}
-	mut endif_label := 0
+	mut endif_label := i32(0)
 	has_endif := node.branches.len > 1
 	if has_endif {
 		endif_label = g.labels.new_label()
@@ -198,7 +198,7 @@ fn (mut g Gen) if_expr(node ast.IfExpr) {
 					id: endif_label
 					pos: jump_addr
 				}
-				g.println('; jump to label ${endif_label}')
+				g.println('; jump to label ${int(endif_label)}')
 			}
 			// println('after if g.pos=$g.pos() jneaddr=$cjmp_addr')
 			g.labels.addrs[label] = g.pos()
@@ -206,8 +206,8 @@ fn (mut g Gen) if_expr(node ast.IfExpr) {
 		}
 	}
 	if has_endif {
-		g.labels.addrs[endif_label] = g.pos()
-		g.println('; label ${endif_label}')
+		g.labels.addrs[int(endif_label)] = g.pos()
+		g.println('; label ${int(endif_label)}')
 	}
 }
 
@@ -294,12 +294,12 @@ fn (mut g Gen) gen_sizeof_expr(node ast.SizeOf) {
 	if ts.language == .v && ts.kind in [.placeholder, .any] {
 		g.v_error('unknown type `${ts.name}`', node.pos)
 	}
-	g.code_gen.mov64(g.code_gen.main_reg(), g.get_type_size(node.typ))
+	g.code_gen.mov64(g.code_gen.main_reg(), i64(g.get_type_size(node.typ)))
 }
 
 fn (mut g Gen) gen_print_from_expr(expr ast.Expr, typ ast.Type, name string) {
 	newline := name in ['println', 'eprintln']
-	fd := if name in ['eprint', 'eprintln'] { 2 } else { 1 }
+	fd := if name in ['eprint', 'eprintln'] { i32(2) } else { i32(1) }
 	match expr {
 		ast.StringLiteral {
 			str := g.eval_str_lit_escape_codes(expr)
diff --git a/vlib/v/gen/native/gen.v b/vlib/v/gen/native/gen.v
index 0b2bf7413bf164..2502d6f99d54b3 100644
--- a/vlib/v/gen/native/gen.v
+++ b/vlib/v/gen/native/gen.v
@@ -25,7 +25,7 @@ mut:
 	code_gen                  CodeGen
 	table                     &ast.Table = unsafe { nil }
 	buf                       []u8
-	sect_header_name_pos      int
+	sect_header_name_pos      i32
 	offset                    i64
 	file_size_pos             i64
 	main_fn_addr              i64
@@ -38,17 +38,17 @@ mut:
 	linker_libs               []string
 	extern_fn_calls           map[i64]string
 	fn_addr                   map[string]i64
-	var_offset                map[string]int // local var stack offset
-	var_alloc_size            map[string]int // local var allocation size
-	stack_var_pos             int
-	stack_depth               int
-	debug_pos                 int
+	var_offset                map[string]i32 // local var stack offset
+	var_alloc_size            map[string]i32 // local var allocation size
+	stack_var_pos             i32
+	stack_depth               i32
+	debug_pos                 i32
 	current_file              &ast.File = unsafe { nil }
 	errors                    []errors.Error
 	warnings                  []errors.Warning
 	syms                      []Symbol
-	size_pos                  []int
-	nlines                    int
+	size_pos                  []i32
+	nlines                    i32
 	callpatches               []CallPatch
 	strs                      []String
 	labels                    &LabelTable = unsafe { nil }
@@ -63,8 +63,8 @@ mut:
 	elf_text_header_addr i64 = -1
 	elf_rela_section     Section
 	// macho specific
-	macho_ncmds   int
-	macho_cmdsize int
+	macho_ncmds   i32
+	macho_cmdsize i32
 	// pe specific
 	pe_coff_hdr_pos    i64
 	pe_opt_hdr_pos     i64
@@ -79,32 +79,32 @@ mut:
 interface CodeGen {
 mut:
 	g &Gen
-	add(r Register, val int)
-	address_size() int
-	adr(r Arm64Register, delta int) // Note: Temporary!
-	allocate_var(name string, size int, initial_val int) int
+	add(r Register, val i32)
+	address_size() i32
+	adr(r Arm64Register, delta i32) // Note: Temporary!
+	allocate_var(name string, size i32, initial_val i32) i32
 	assign_stmt(node ast.AssignStmt) // TODO: make platform-independant
 	builtin_decl(builtin BuiltinFn)
-	call_addr_at(addr int, at i64) i64
+	call_addr_at(addr i32, at i64) i64
 	call_builtin(name Builtin) i64
 	call_fn(node ast.CallExpr)
-	call(addr int) i64
-	cjmp(op JumpOp) int
+	call(addr i32) i64
+	cjmp(op JumpOp) i32
 	cmp_to_stack_top(r Register)
 	cmp_var_reg(var Var, reg Register, config VarConfig)
-	cmp_var(var Var, val int, config VarConfig)
+	cmp_var(var Var, val i32, config VarConfig)
 	cmp_zero(reg Register)
 	convert_bool_to_string(r Register)
 	convert_int_to_string(a Register, b Register)
-	convert_rune_to_string(r Register, buffer int, var Var, config VarConfig)
+	convert_rune_to_string(r Register, buffer i32, var Var, config VarConfig)
 	dec_var(var Var, config VarConfig)
 	fn_decl(node ast.FnDecl)
 	gen_asm_stmt(asm_node ast.AsmStmt)
 	gen_cast_expr(expr ast.CastExpr)
 	gen_exit(expr ast.Expr)
 	gen_match_expr(expr ast.MatchExpr)
-	gen_print_reg(r Register, n int, fd int)
-	gen_print(s string, fd int)
+	gen_print_reg(r Register, n i32, fd i32)
+	gen_print(s string, fd i32)
 	gen_syscall(node ast.CallExpr)
 	inc_var(var Var, config VarConfig)
 	infix_expr(node ast.InfixExpr) // TODO: make platform-independant
@@ -112,22 +112,22 @@ mut:
 	init_struct(var Var, init ast.StructInit)
 	init_array(var Var, init ast.ArrayInit)
 	jmp_back(start i64)
-	jmp(addr int) int
-	lea_var_to_reg(r Register, var_offset int)
-	learel(reg Register, val int)
+	jmp(addr i32) i32
+	lea_var_to_reg(r Register, var_offset i32)
+	learel(reg Register, val i32)
 	leave()
 	load_fp_var(var Var, config VarConfig)
 	load_fp(val f64)
 	main_reg() Register
 	mov_deref(reg Register, regptr Register, typ ast.Type)
-	mov_int_to_var(var Var, integer int, config VarConfig)
+	mov_int_to_var(var Var, integer i32, config VarConfig)
 	mov_reg_to_var(var Var, reg Register, config VarConfig)
 	mov_reg(r1 Register, r2 Register)
 	mov_var_to_reg(reg Register, var Var, config VarConfig)
-	mov(r Register, val int)
+	mov(r Register, val i32)
 	mov64(r Register, val i64)
 	movabs(reg Register, val i64)
-	patch_relative_jmp(pos int, addr i64)
+	patch_relative_jmp(pos i32, addr i64)
 	prefix_expr(node ast.PrefixExpr)
 	push(r Register)
 	ret()
@@ -136,7 +136,7 @@ mut:
 	svc()
 	syscall() // unix syscalls
 	trap()
-	zero_fill(size int, var LocalVar)
+	zero_fill(size i32, var LocalVar)
 }
 
 type Register = Amd64Register | Arm64Register
@@ -162,35 +162,35 @@ enum RelocType {
 
 struct String {
 	str string
-	pos int
+	pos i32
 	typ RelocType
 }
 
 struct CallPatch {
 	name string
-	pos  int
+	pos  i32
 }
 
 struct LabelTable {
 mut:
-	label_id int
+	label_id i32
 	addrs    []i64 = [i64(0)] // register address of label here
 	patches  []LabelPatch // push placeholders
 	branches []BranchLabel
 }
 
 struct LabelPatch {
-	id  int
-	pos int
+	id  i32
+	pos i32
 }
 
 struct BranchLabel {
 	name  string
-	start int
-	end   int
+	start i32
+	end   i32
 }
 
-fn (mut l LabelTable) new_label() int {
+fn (mut l LabelTable) new_label() i32 {
 	l.label_id++
 	l.addrs << 0
 	return l.label_id
@@ -198,19 +198,19 @@ fn (mut l LabelTable) new_label() int {
 
 struct Struct {
 mut:
-	offsets []int
+	offsets []i32
 }
 
 struct Enum {
 mut:
-	fields map[string]int
+	fields map[string]i32
 }
 
 struct MultiReturn {
 mut:
-	offsets []int
-	size    int
-	align   int
+	offsets []i32
+	size    i32
+	align   i32
 }
 
 enum Size {
@@ -222,7 +222,7 @@ enum Size {
 
 // you can use these structs manually if you don't have ast.Ident
 struct LocalVar {
-	offset int // offset from the base pointer
+	offset i32 // offset from the base pointer
 	typ    ast.Type
 	name   string
 }
@@ -231,7 +231,7 @@ struct GlobalVar {}
 
 [params]
 struct VarConfig {
-	offset int      // offset from the variable
+	offset i32      // offset from the variable
 	typ    ast.Type // type of the value you want to process e.g. struct fields.
 }
 
@@ -256,7 +256,7 @@ union F64I64 {
 }
 
 [inline]
-fn byt(n int, s int) u8 {
+fn byt(n i32, s i32) u8 {
 	return u8((n >> (s * 8)) & 0xff)
 }
 
@@ -327,7 +327,7 @@ fn get_backend(arch pref.Arch, target_os pref.OS) !CodeGen {
 	return error('unsupported architecture')
 }
 
-pub fn gen(files []&ast.File, table &ast.Table, out_name string, pref_ &pref.Preferences) (int, int) {
+pub fn gen(files []&ast.File, table &ast.Table, out_name string, pref_ &pref.Preferences) (i32, i32) {
 	exe_name := if pref_.os == .windows && !out_name.ends_with('.exe') {
 		out_name + '.exe'
 	} else {
@@ -369,7 +369,7 @@ pub fn gen(files []&ast.File, table &ast.Table, out_name string, pref_ &pref.Pre
 	g.generate_builtins()
 	g.generate_footer()
 
-	return g.nlines, g.buf.len
+	return g.nlines, i32(g.buf.len)
 }
 
 // used in macho_test.v
@@ -387,7 +387,7 @@ pub fn macho_test_new_gen(p &pref.Preferences, out_name string) &Gen {
 	return &mut g
 }
 
-pub fn (mut g Gen) typ(a int) &ast.TypeSymbol {
+pub fn (mut g Gen) typ(a i32) &ast.TypeSymbol {
 	return g.table.type_symbols[a]
 }
 
@@ -536,18 +536,18 @@ pub fn (mut g Gen) calculate_all_size_align() {
 		if ts.idx == 0 {
 			continue
 		}
-		ts.size = g.get_type_size(ast.new_type(ts.idx))
-		ts.align = g.get_type_align(ast.new_type(ts.idx))
+		ts.size = int(g.get_type_size(ast.new_type(ts.idx)))
+		ts.align = int(g.get_type_align(ast.new_type(ts.idx)))
 	}
 }
 
 pub fn (mut g Gen) calculate_enum_fields() {
 	for name, decl in g.table.enum_decls {
 		mut enum_vals := Enum{}
-		mut value := if decl.is_flag { 1 } else { 0 }
+		mut value := if decl.is_flag { i32(1) } else { i32(0) }
 		for field in decl.fields {
 			if field.has_expr {
-				value = int(g.eval.expr(field.expr, ast.int_type_idx).int_val())
+				value = i32(g.eval.expr(field.expr, ast.int_type_idx).int_val())
 			}
 			enum_vals.fields[field.name] = value
 			if decl.is_flag {
@@ -579,8 +579,8 @@ fn (mut g Gen) write16(n i32) {
 	g.buf << u8(n >> 8)
 }
 
-fn (mut g Gen) read32_at(at i32) int {
-	return int(u32(g.buf[at]) | (u32(g.buf[at + 1]) << 8) | (u32(g.buf[at + 2]) << 16) | (u32(g.buf[
+fn (mut g Gen) read32_at(at i32) i32 {
+	return i32(u32(g.buf[at]) | (u32(g.buf[at + 1]) << 8) | (u32(g.buf[at + 2]) << 16) | (u32(g.buf[
 		at + 3]) << 24))
 }
 
@@ -616,7 +616,7 @@ fn (mut g Gen) write64_at(at i64, n i64) {
 	g.buf[at + 7] = u8(n >> 56)
 }
 
-fn (mut g Gen) write32_at(at i64, n int) {
+fn (mut g Gen) write32_at(at i64, n i32) {
 	// write 4 bytes
 	g.buf[at] = u8(n)
 	g.buf[at + 1] = u8(n >> 8)
@@ -624,7 +624,7 @@ fn (mut g Gen) write32_at(at i64, n int) {
 	g.buf[at + 3] = u8(n >> 24)
 }
 
-fn (mut g Gen) write16_at(at i64, n int) {
+fn (mut g Gen) write16_at(at i64, n i32) {
 	// write 2 bytes
 	g.buf[at] = u8(n)
 	g.buf[at + 1] = u8(n >> 8)
@@ -636,7 +636,7 @@ fn (mut g Gen) read64_at(at i64) i64 {
 		at + 7]) << 56)
 }
 
-pub fn (mut g Gen) zeroes(n int) {
+pub fn (mut g Gen) zeroes(n i32) {
 	for _ in 0 .. n {
 		g.buf << 0
 	}
@@ -644,38 +644,38 @@ pub fn (mut g Gen) zeroes(n int) {
 
 fn (mut g Gen) write_string(s string) {
 	for c in s {
-		g.write8(int(c))
+		g.write8(i32(c))
 	}
 	g.zeroes(1)
 }
 
-fn (mut g Gen) write_string_with_padding(s string, max int) {
+fn (mut g Gen) write_string_with_padding(s string, max i32) {
 	for c in s {
-		g.write8(int(c))
+		g.write8(i32(c))
 	}
-	for _ in 0 .. max - s.len {
+	for _ in 0 .. int(max) - s.len {
 		g.write8(0)
 	}
 }
 
-fn (mut g Gen) pad_to(len int) {
+fn (mut g Gen) pad_to(len i32) {
 	for g.buf.len < len {
 		g.buf << u8(0)
 	}
 }
 
-fn (mut g Gen) align_to(align int) {
-	padded := (g.buf.len + align - 1) & ~(align - 1)
+fn (mut g Gen) align_to(align i32) {
+	padded := (i32(g.buf.len) + align - 1) & ~(align - 1)
 	for g.buf.len < padded {
 		g.buf << u8(0)
 	}
 }
 
-fn (g &Gen) abs_to_rel_addr(addr i64) int {
-	return int(mu.abs(addr - g.buf.len)) - 1
+fn (g &Gen) abs_to_rel_addr(addr i64) i32 {
+	return i32(mu.abs(addr - g.buf.len)) - 1
 }
 
-fn (mut g Gen) try_var_offset(var_name string) int {
+fn (mut g Gen) try_var_offset(var_name string) i32 {
 	offset := g.var_offset[var_name] or { return -1 }
 	if offset == 0 {
 		return -1
@@ -683,7 +683,7 @@ fn (mut g Gen) try_var_offset(var_name string) int {
 	return offset
 }
 
-fn (mut g Gen) get_var_offset(var_name string) int {
+fn (mut g Gen) get_var_offset(var_name string) i32 {
 	r := g.try_var_offset(var_name)
 	if r == -1 {
 		g.n_error('unknown variable `${var_name}`')
@@ -691,7 +691,7 @@ fn (mut g Gen) get_var_offset(var_name string) int {
 	return r
 }
 
-fn (mut g Gen) get_field_offset(in_type ast.Type, name string) int {
+fn (mut g Gen) get_field_offset(in_type ast.Type, name string) i32 {
 	typ := g.unwrap(in_type)
 	ts := g.table.sym(typ)
 	field := ts.find_field(name) or { g.n_error('Could not find field `${name}` on init') }
@@ -704,7 +704,7 @@ fn (mut g Gen) unwrap(typ ast.Type) ast.Type {
 }
 
 // get type size, and calculate size and align and store them to the cache when the type is struct
-fn (mut g Gen) get_type_size(raw_type ast.Type) int {
+fn (mut g Gen) get_type_size(raw_type ast.Type) i32 {
 	// TODO type flags
 	typ := g.unwrap(raw_type)
 	if raw_type.is_any_kind_of_pointer() || typ.is_any_kind_of_pointer() {
@@ -736,10 +736,10 @@ fn (mut g Gen) get_type_size(raw_type ast.Type) int {
 	}
 	ts := g.table.sym(typ)
 	if ts.size != -1 {
-		return ts.size
+		return i32(ts.size)
 	}
-	mut size := 0
-	mut align := 1
+	mut size := i32(0)
+	mut align := i32(1)
 	mut strc := Struct{}
 	match ts.info {
 		ast.Struct {
@@ -776,13 +776,13 @@ fn (mut g Gen) get_type_size(raw_type ast.Type) int {
 		else {}
 	}
 	mut ts_ := g.table.sym(typ)
-	ts_.size = size
-	ts_.align = align
+	ts_.size = int(size)
+	ts_.align = int(align)
 	// g.n_error('unknown type size')
 	return size
 }
 
-fn (mut g Gen) get_type_align(typ ast.Type) int {
+fn (mut g Gen) get_type_align(typ ast.Type) i32 {
 	// also calculate align of a struct
 	size := g.get_type_size(typ)
 	if g.is_register_type(typ) || typ.is_pure_float() {
@@ -790,17 +790,17 @@ fn (mut g Gen) get_type_align(typ ast.Type) int {
 	}
 	ts := g.table.sym(g.unwrap(typ))
 	if ts.align != -1 {
-		return ts.align
+		return i32(ts.align)
 	}
 	// g.n_error('unknown type align')
 	return 0
 }
 
 fn (mut g Gen) get_multi_return(types []ast.Type) MultiReturn {
-	mut size := 0
-	mut align := 1
+	mut size := i32(0)
+	mut align := i32(1)
 	mut ret := MultiReturn{
-		offsets: []int{cap: types.len}
+		offsets: []i32{cap: types.len}
 	}
 	for t in types {
 		t_size := g.get_type_size(t)
@@ -828,7 +828,7 @@ fn (mut g Gen) is_fp_type(typ ast.Type) bool {
 		|| (g.table.sym(typ).info is ast.Alias && g.is_fp_type(g.unwrap(typ)))
 }
 
-fn (mut g Gen) get_sizeof_ident(ident ast.Ident) int {
+fn (mut g Gen) get_sizeof_ident(ident ast.Ident) i32 {
 	typ := match ident.obj {
 		ast.AsmRegister { ast.i64_type_idx }
 		ast.ConstField { ident.obj.typ }
@@ -845,7 +845,7 @@ fn (mut g Gen) get_sizeof_ident(ident ast.Ident) int {
 	return size
 }
 
-fn (mut g Gen) allocate_by_type(name string, typ ast.Type) int {
+fn (mut g Gen) allocate_by_type(name string, typ ast.Type) i32 {
 	size := g.get_type_size(typ)
 	align := g.get_type_align(typ)
 	padding := (align - g.stack_var_pos % align) % align
@@ -856,13 +856,13 @@ fn (mut g Gen) allocate_by_type(name string, typ ast.Type) int {
 	return g.stack_var_pos
 }
 
-fn (mut g Gen) allocate_string(s string, opsize int, typ RelocType) int {
-	str_pos := g.buf.len + opsize
+fn (mut g Gen) allocate_string(s string, opsize i32, typ RelocType) i32 {
+	str_pos := i32(g.buf.len) + opsize
 	g.strs << String{s, str_pos, typ}
 	return str_pos
 }
 
-fn (mut g Gen) allocate_array(name string, size int, items int) int {
+fn (mut g Gen) allocate_array(name string, size i32, items i32) i32 {
 	pos := g.code_gen.allocate_var(name, size, items)
 	g.stack_var_pos += (size * items)
 	return pos
@@ -1014,14 +1014,14 @@ fn (mut g Gen) patch_calls() {
 			g.n_error('fn addr of `${c.name}` = 0')
 			return
 		}
-		last := g.buf.len
-		g.code_gen.call(int(addr + last - c.pos))
+		last := i32(g.buf.len)
+		g.code_gen.call(i32(i32(addr) + last - c.pos))
 		mut patch := []u8{}
 		for last < g.buf.len {
 			patch << g.buf.pop()
 		}
 		for i := 0; i < patch.len; i++ {
-			g.buf[c.pos + i] = patch[patch.len - i - 1]
+			g.buf[int(c.pos) + i] = patch[patch.len - i - 1]
 		}
 	}
 }
@@ -1039,7 +1039,7 @@ fn (mut g Gen) patch_labels() {
 }
 
 fn (mut g Gen) delay_fn_call(name string) {
-	pos := g.buf.len
+	pos := i32(g.buf.len)
 	g.callpatches << CallPatch{name, pos}
 	// do nothing for now
 }
@@ -1087,7 +1087,7 @@ fn (mut g Gen) println(comment string) {
 	if !g.pref.is_verbose {
 		return
 	}
-	addr := g.debug_pos.hex()
+	addr := int(g.debug_pos).hex()
 	mut sb := strings.new_builder(80)
 	// println('$g.debug_pos "$addr"')
 	sb.write_string(term.red(strings.repeat(`0`, 6 - addr.len) + addr + '  '))
@@ -1100,7 +1100,7 @@ fn (mut g Gen) println(comment string) {
 		hexstr := term.blue(gbihex) + ' '
 		sb.write_string(hexstr)
 	}
-	g.debug_pos = g.buf.len
+	g.debug_pos = i32(g.buf.len)
 	//
 	colored := sb.str()
 	plain := term.strip_ansi(colored)
@@ -1175,27 +1175,27 @@ fn (mut g Gen) gen_concat_expr(node ast.ConcatExpr) {
 	g.code_gen.lea_var_to_reg(main_reg, var.offset)
 }
 
-fn (mut g Gen) sym_string_table() int {
-	begin := g.buf.len
+fn (mut g Gen) sym_string_table() i32 {
+	begin := i32(g.buf.len)
 	g.zeroes(1)
 	g.println('')
 	g.println('=== strings ===')
 
-	mut generated := map[string]int{}
+	mut generated := map[string]i32{}
 
 	for _, s in g.strs {
-		pos := generated[s.str] or { g.buf.len }
+		pos := generated[s.str] or { i32(g.buf.len) }
 
 		match s.typ {
 			.rel32 {
-				g.write32_at(s.pos, pos - s.pos - 4)
+				g.write32_at(i64(s.pos), pos - s.pos - 4)
 			}
 			else {
 				if g.pref.os == .windows {
 					// that should be .rel32, not windows-specific
-					g.write32_at(s.pos, pos - s.pos - 4)
+					g.write32_at(i64(s.pos), pos - s.pos - 4)
 				} else {
-					g.write64_at(s.pos, pos + base_addr)
+					g.write64_at(i64(s.pos), i64(pos) + base_addr)
 				}
 			}
 		}
@@ -1208,7 +1208,7 @@ fn (mut g Gen) sym_string_table() int {
 			}
 		}
 	}
-	return g.buf.len - begin
+	return i32(g.buf.len) - begin
 }
 
 const escape_char = u8(`\\`)
diff --git a/vlib/v/gen/native/macho.v b/vlib/v/gen/native/macho.v
index 3eae722eaa6e1f..52a39166bbc1c1 100644
--- a/vlib/v/gen/native/macho.v
+++ b/vlib/v/gen/native/macho.v
@@ -25,22 +25,22 @@ const (
 )
 
 struct Symbol {
-	str_entry  int
-	symbol_typ int
-	section    int
-	desc       int
+	str_entry  i32
+	symbol_typ i32
+	section    i32
+	desc       i32
 	val        i64
 	name       string
 	is_ext     bool
 }
 
 struct Reloc {
-	addr  int
-	pcrel int
-	len   int
-	ext   int
-	typ   int
-	snum  int // symbol index (if ext) or infile section number
+	addr  i32
+	pcrel i32
+	len   i32
+	ext   i32
+	typ   i32
+	snum  i32 // symbol index (if ext) or infile section number
 }
 
 fn (mut g Gen) macho_segment64_pagezero() {
@@ -48,7 +48,7 @@ fn (mut g Gen) macho_segment64_pagezero() {
 	g.write_string_with_padding('__PAGEZERO', 16) // section name
 	g.write64(0) // vmaddr
 	if g.pref.arch == .amd64 {
-		g.write64(g.get_pagesize()) // vmsize
+		g.write64(i64(g.get_pagesize())) // vmsize
 	} else {
 		g.write64(native.base_addr) // vmsize
 	}
@@ -60,10 +60,10 @@ fn (mut g Gen) macho_segment64_pagezero() {
 	g.write32(0) // flags
 }
 
-fn (mut g Gen) macho_add_loadcommand(typ u32, size int) {
+fn (mut g Gen) macho_add_loadcommand(typ u32, size i32) {
 	g.macho_ncmds++
 	g.macho_cmdsize += size
-	g.write32(int(typ))
+	g.write32(i32(typ))
 	g.write32(size)
 }
 
@@ -94,9 +94,9 @@ fn (mut g Gen) macho_segment64_linkedit() {
 	} else {
 		// g.size_pos << g.buf.len
 		// g.write64(native.base_addr + g.get_pagesize()) // vmaddr
-		g.write64(g.get_pagesize() - 0x1000) // vmaddr
+		g.write64(i64(g.get_pagesize()) - 0x1000) // vmaddr
 		g.write64(0) // g.get_pagesize()) // vmsize
-		g.write64(g.get_pagesize()) // fileoff
+		g.write64(i64(g.get_pagesize())) // fileoff
 	}
 	g.write64(0) // filesize
 	g.write32(7) // maxprot
@@ -105,7 +105,7 @@ fn (mut g Gen) macho_segment64_linkedit() {
 	g.write32(0) // flags
 }
 
-fn (mut g Gen) macho_header(ncmds int, bintype int) int {
+fn (mut g Gen) macho_header(ncmds i32, bintype i32) i32 {
 	g.write32(0xfeedfacf) // MH_MAGIC_64
 	if g.pref.arch == .arm64 {
 		g.write32(0x0100000c) // CPU_TYPE_ARM64
@@ -117,7 +117,7 @@ fn (mut g Gen) macho_header(ncmds int, bintype int) int {
 	g.write32(native.mh_execute) // filetype
 	g.write32(ncmds) // ncmds
 
-	cmdsize_offset := g.buf.len
+	cmdsize_offset := i32(g.buf.len)
 	g.write32(0) // size of load commands
 
 	if g.pref.arch == .arm64 {
@@ -129,15 +129,15 @@ fn (mut g Gen) macho_header(ncmds int, bintype int) int {
 	return cmdsize_offset
 }
 
-fn (mut g Gen) macho_segment64_text() []int {
-	mut patch := []int{}
+fn (mut g Gen) macho_segment64_text() []i32 {
+	mut patch := []i32{}
 	g.macho_add_loadcommand(native.lc_segment_64, 152)
 	g.write_string_with_padding('__TEXT', 16) // section name
 	g.write64(native.base_addr) // vmaddr
 
-	g.write64(g.get_pagesize() * 2) // vmsize
+	g.write64(i64(g.get_pagesize()) * 2) // vmsize
 	g.write64(0) // fileoff
-	g.write64(g.get_pagesize() + 63) // filesize
+	g.write64(i64(g.get_pagesize()) + 63) // filesize
 
 	g.write32(7) // maxprot
 	g.write32(5) // initprot
@@ -147,13 +147,13 @@ fn (mut g Gen) macho_segment64_text() []int {
 	g.write_string_with_padding('__text', 16) // section name
 	g.write_string_with_padding('__TEXT', 16) // segment name
 	if g.pref.arch == .arm64 {
-		g.write64(native.base_addr + g.get_pagesize()) // vmaddr
+		g.write64(native.base_addr + i64(g.get_pagesize())) // vmaddr
 		g.write64(0) // vmsize
 		g.write32(0) // offset
 		g.write32(4) // align
 	} else {
-		g.write64(native.base_addr + g.get_pagesize()) // vmaddr
-		patch << g.buf.len
+		g.write64(native.base_addr + i64(g.get_pagesize())) // vmaddr
+		patch << i32(g.buf.len)
 		g.write64(0) // vmsize
 		g.write32(g.get_pagesize()) // offset
 		g.write32(0) // align
@@ -231,7 +231,7 @@ fn (mut g Gen) macho_dylibs() {
 	g.write_string_with_padding('/usr/lib/libSystem.B.dylib', 32)
 }
 
-fn (mut g Gen) macho_main(addr int) {
+fn (mut g Gen) macho_main(addr i32) {
 	g.macho_add_loadcommand(native.lc_main, 24)
 	g.write32(addr) // entrypoint
 	g.write32(0) // initial_stacksize
@@ -239,9 +239,9 @@ fn (mut g Gen) macho_main(addr int) {
 
 pub fn (mut g Gen) generate_macho_header() {
 	pagesize := g.get_pagesize()
-	g.code_start_pos = pagesize
+	g.code_start_pos = i64(pagesize)
 	g.debug_pos = pagesize
-	ncmds := 0 // 9+ 2 -2 -3 -1
+	ncmds := i32(0) // 9+ 2 -2 -3 -1
 	cmdsize_offset := g.macho_header(ncmds, native.mh_execute)
 	g.macho_segment64_pagezero()
 
@@ -254,20 +254,20 @@ pub fn (mut g Gen) generate_macho_header() {
 	g.macho_dylibs()
 	g.macho_main(pagesize)
 
-	g.write32_at(cmdsize_offset, g.buf.len - 24)
-	g.write_nulls(pagesize - g.buf.len)
+	g.write32_at(i64(cmdsize_offset), i32(g.buf.len) - 24)
+	g.write_nulls(pagesize - i32(g.buf.len))
 	g.code_gen.call(0)
 }
 
-fn (mut g Gen) get_pagesize() int {
+fn (mut g Gen) get_pagesize() i32 {
 	if g.pref.arch == .arm64 {
 		return 0x4000 // 16KB
 	}
 	return 0x1000 // 4KB
 }
 
-fn (mut g Gen) write_nulls(len int) {
-	pad := g.get_pagesize() - g.buf.len
+fn (mut g Gen) write_nulls(len i32) {
+	pad := g.get_pagesize() - i32(g.buf.len)
 	for _ in 0 .. pad {
 		g.write8(0)
 	}
@@ -284,7 +284,7 @@ pub fn (mut g Gen) generate_macho_object_header() {
 		g.write32(3) // CPU_SUBTYPE_X64
 	}
 	g.write32(native.mh_object) // MH_OBJECT
-	text_offset := 0x138
+	text_offset := i32(0x138)
 	g.write32(4) // # of load commands
 	g.write32(text_offset - 0x20) // size of load commands // 0x138-0x20
 	// g.write32(0x00002000) // MH_SUBSECTIONS_VIA_SYMBOLS
@@ -296,7 +296,7 @@ pub fn (mut g Gen) generate_macho_object_header() {
 	g.zeroes(16) // segment name
 	g.write64(0) // VM address
 	g.write64(0x25) // VM size
-	g.write64(text_offset) // file offset
+	g.write64(i64(text_offset)) // file offset
 	g.write64(0x25) // file size
 	g.write32(0x7) // max vm protection
 	g.write32(0x7) // initial vm protection
@@ -315,7 +315,7 @@ pub fn (mut g Gen) generate_macho_object_header() {
 	}
 	g.write32(0x160) // relocation offset
 	g.write32(0x1) // # of relocations
-	g.write32(int(native.s_attr_some_instructions | native.s_attr_pure_instructions))
+	g.write32(i32(native.s_attr_some_instructions | native.s_attr_pure_instructions))
 	g.write32(0)
 	g.write32(0)
 	g.write32(0)
@@ -354,7 +354,7 @@ pub fn (mut g Gen) generate_macho_object_header() {
 }
 
 pub fn (mut g Gen) generate_macho_footer() {
-	codesize := g.buf.len - 0x1000
+	codesize := i32(g.buf.len) - 0x1000
 	g.write_relocs()
 	g.sym_table()
 	stringtablesize := g.sym_string_table()
@@ -363,22 +363,22 @@ pub fn (mut g Gen) generate_macho_footer() {
 	for o in g.size_pos {
 		n := g.read32_at(o)
 		// eprintln('$n + $delta')
-		g.write32_at(o, n + delta)
+		g.write32_at(i64(o), n + delta)
 	}
 	g.write64(0)
 	g.macho_patch_header()
 	if g.pref.arch == .amd64 {
-		call_delta := int(g.main_fn_addr - g.code_start_pos) - 5
+		call_delta := i32(g.main_fn_addr - g.code_start_pos) - 5
 		g.write32_at(g.code_start_pos + 1, call_delta)
 		g.create_executable()
 	} else {
-		call_delta := int(g.main_fn_addr - g.code_start_pos)
+		call_delta := i32(g.main_fn_addr - g.code_start_pos)
 		if (call_delta % 4) != 0 || call_delta < 0 {
 			g.n_error('Invalid entrypoint->main delta (${call_delta})')
 		} else {
 			blop := (0x94 << 24) | (call_delta / 4)
-			g.write32_at(g.code_start_pos, int(blop))
-			g.write_nulls(g.get_pagesize() - g.buf.len)
+			g.write32_at(g.code_start_pos, i32(blop))
+			g.write_nulls(g.get_pagesize() - i32(g.buf.len))
 			g.create_executable()
 		}
 	}
@@ -423,13 +423,13 @@ fn (mut g Gen) sym_table_command() {
 		is_ext: false
 	}
 	g.macho_add_loadcommand(native.lc_symtab, native.macho_symcmd_size)
-	sym_table_offset := 0x168
+	sym_table_offset := i32(0x168)
 	g.write32(sym_table_offset)
-	g_syms_len := 4
+	g_syms_len := i32(4)
 	g.write32(g_syms_len)
-	str_offset := 0x1a8
+	str_offset := i32(0x1a8)
 	g.write32(str_offset)
-	str_size := 0x20
+	str_size := i32(0x20)
 	g.write32(str_size)
 }
 
diff --git a/vlib/v/gen/native/pe.v b/vlib/v/gen/native/pe.v
index c7073079dbee2b..5d23e69e281343 100644
--- a/vlib/v/gen/native/pe.v
+++ b/vlib/v/gen/native/pe.v
@@ -59,7 +59,7 @@ const (
 	pe_scn_mem_shared             = 0x10000000
 	pe_scn_mem_execute            = 0x20000000
 	pe_scn_mem_read               = 0x40000000
-	pe_scn_mem_write              = int(u32(0x80000000))
+	pe_scn_mem_write              = i32(u32(0x80000000))
 	// obj files only:
 	pe_scn_align_1bytes           = 0x00100000
 	pe_scn_align_2bytes           = 0x00200000
@@ -139,9 +139,9 @@ fn (mut g Gen) get_pe_machine() PeMachine {
 
 pub fn (mut g Gen) gen_pe_header() {
 	pe_header := [
-		int(PeMagic.pe),
+		i32(PeMagic.pe),
 		0,
-		int(g.get_pe_machine()), // machine
+		i32(g.get_pe_machine()), // machine
 		2, // number of sections
 		0,
 		0, // timestamp
@@ -150,7 +150,7 @@ pub fn (mut g Gen) gen_pe_header() {
 		0, // number of symbols
 		0,
 		native.pe_opt_hdr_size, // 40 // size of optional header
-		int(PeCharacteristics.executable_image),
+		i32(PeCharacteristics.executable_image),
 	]
 
 	// debug descriptions when `-v` is used
@@ -200,36 +200,36 @@ struct Pe32PlusOptionalHeader {
 	magic                      PeMagic
 	major_linker_version       u8
 	minor_linker_version       u8
-	size_of_code               int
-	size_of_initialized_data   int
-	size_of_uninitialized_data int
-	address_of_entry_point     int
-	base_of_code               int
+	size_of_code               i32
+	size_of_initialized_data   i32
+	size_of_uninitialized_data i32
+	address_of_entry_point     i32
+	base_of_code               i32
 	// PE32 ONLY:
 	// base_of_data u32
 	// NT fields
 	// reference: https://learn.microsoft.com/en-us/windows/win32/debug/pe-format?redirectedfrom=MSDN#optional-header-windows-specific-fields-image-only
 	image_base              i64 // u32 for PE32
-	section_alignment       int
-	file_alignment          int
+	section_alignment       i32
+	file_alignment          i32
 	major_os_version        i16
 	minor_os_version        i16
 	major_image_version     i16
 	minor_image_version     i16
 	major_subsystem_version i16
 	minor_subsystem_version i16
-	win32_version_value     int
-	size_of_image           int
-	size_of_headers         int
-	checksum                int
+	win32_version_value     i32
+	size_of_image           i32
+	size_of_headers         i32
+	checksum                i32
 	subsystem               PeSubsystem
 	dll_characteristics     i16
 	size_of_stack_reserve   i64 // u32 for PE32
 	size_of_stack_commit    i64 // u32 for PE32
 	size_of_heap_reserve    i64 // u32 for PE32
 	size_of_heap_commit     i64 // u32 for PE32
-	loader_flags            int // reserved, MUST be zero
-	number_of_rva_and_sizes int
+	loader_flags            i32 // reserved, MUST be zero
+	number_of_rva_and_sizes i32
 }
 
 fn (mut g Gen) get_pe32_plus_optional_header() Pe32PlusOptionalHeader {
@@ -299,7 +299,7 @@ fn (mut g Gen) gen_pe_optional_header(opt_hdr PeOptionalHeader) {
 	g.pe_opt_hdr_pos = g.pos()
 
 	// standard fields
-	g.write16(i16(h.magic))
+	g.write16(i32(h.magic))
 	g.println('; mMagic')
 	g.write8(h.major_linker_version)
 	g.println('; mMajorLinkerVersion')
@@ -325,17 +325,17 @@ fn (mut g Gen) gen_pe_optional_header(opt_hdr PeOptionalHeader) {
 	g.println('; mSectionAlignment')
 	g.write32(h.file_alignment)
 	g.println('; mFileAlignment')
-	g.write16(h.major_os_version)
+	g.write16(i32(h.major_os_version))
 	g.println('; mMajorOperatingSystemVersion')
-	g.write16(h.minor_os_version)
+	g.write16(i32(h.minor_os_version))
 	g.println('; mMinorOperatingSystemVersion')
-	g.write16(h.major_image_version)
+	g.write16(i32(h.major_image_version))
 	g.println('; mMajorImageVersion')
-	g.write16(h.minor_image_version)
+	g.write16(i32(h.minor_image_version))
 	g.println('; mMinorImageVersion')
-	g.write16(h.major_subsystem_version)
+	g.write16(i32(h.major_subsystem_version))
 	g.println('; mMajorSubsystemVersion')
-	g.write16(h.minor_subsystem_version)
+	g.write16(i32(h.minor_subsystem_version))
 	g.println('; mMinorSubsystemVersion')
 	g.write32(h.win32_version_value)
 	g.println('; mWin32VersionValue')
@@ -345,9 +345,9 @@ fn (mut g Gen) gen_pe_optional_header(opt_hdr PeOptionalHeader) {
 	g.println('; mSizeOfHeaders')
 	g.write32(h.checksum)
 	g.println('; mCeckSum')
-	g.write16(int(h.subsystem))
+	g.write16(i32(h.subsystem))
 	g.println('; mSubsystem')
-	g.write16(h.dll_characteristics)
+	g.write16(i32(h.dll_characteristics))
 	g.println('; mDllCharacteristics')
 	g.write64(h.size_of_stack_reserve)
 	g.println('; mSizeOfStackReserve')
@@ -366,8 +366,8 @@ fn (mut g Gen) gen_pe_optional_header(opt_hdr PeOptionalHeader) {
 }
 
 struct PeDataDir {
-	rva  int
-	size int
+	rva  i32
+	size i32
 }
 
 struct PeDataDirs {
@@ -431,15 +431,15 @@ fn (mut g Gen) gen_pe_data_dirs() {
 struct PeSectionHeader {
 	name [8]u8
 mut:
-	virtual_size           int
-	virtual_address        int
-	size_of_raw_data       int
-	pointer_to_raw_data    int
-	pointer_to_relocations int
-	pointer_to_linenumbers int
+	virtual_size           i32
+	virtual_address        i32
+	size_of_raw_data       i32
+	pointer_to_raw_data    i32
+	pointer_to_relocations i32
+	pointer_to_linenumbers i32
 	number_of_relocations  i16
 	number_of_linenumbers  i16
-	characteristics        int
+	characteristics        i32
 }
 
 enum PeSectionHeaderField {
@@ -462,12 +462,12 @@ mut:
 	header_pos i64
 }
 
-fn (mut s PeSection) set_pointer_to_raw_data(mut g Gen, pointer int) {
+fn (mut s PeSection) set_pointer_to_raw_data(mut g Gen, pointer i32) {
 	s.header.pointer_to_raw_data = pointer
 	g.write32_at(s.header_pos + pe_section_header_offsetof(.pointer_to_raw_data), pointer)
 }
 
-fn (mut s PeSection) set_size_of_raw_data(mut g Gen, size int) {
+fn (mut s PeSection) set_size_of_raw_data(mut g Gen, size i32) {
 	if size < s.header.virtual_size {
 		s.set_virtual_size(mut g, size)
 	}
@@ -476,14 +476,14 @@ fn (mut s PeSection) set_size_of_raw_data(mut g Gen, size int) {
 	g.write32_at(s.header_pos + pe_section_header_offsetof(.size_of_raw_data), size)
 }
 
-fn (mut s PeSection) set_virtual_address(mut g Gen, addr int) {
+fn (mut s PeSection) set_virtual_address(mut g Gen, addr i32) {
 	aligned := (addr + native.pe_section_align - 1) & ~(native.pe_section_align - 1)
 
 	s.header.virtual_address = aligned
 	g.write32_at(s.header_pos + pe_section_header_offsetof(.virtual_address), aligned)
 }
 
-fn (mut s PeSection) set_virtual_size(mut g Gen, size int) {
+fn (mut s PeSection) set_virtual_size(mut g Gen, size i32) {
 	aligned := (size + native.pe_section_align - 1) & ~(native.pe_section_align - 1)
 
 	s.header.virtual_size = aligned
@@ -517,11 +517,11 @@ fn (mut g Gen) gen_pe_section_header(mut section PeSection) {
 	g.println('; PointerToRelocations')
 	g.write32(sh.pointer_to_linenumbers)
 	g.println('; PointerToLinenumbers')
-	g.write16(sh.number_of_relocations)
+	g.write16(i32(sh.number_of_relocations))
 	g.println('; NumberOfRelocations')
-	g.write16(sh.number_of_linenumbers)
+	g.write16(i32(sh.number_of_linenumbers))
 	g.println('; NumberOfLinenumbers')
-	g.write32(int(sh.characteristics))
+	g.write32(i32(sh.characteristics))
 }
 
 fn (mut g Gen) gen_pe_sections() {
@@ -547,12 +547,12 @@ fn (mut g Gen) get_pe_section_index(name string) ?int {
 }
 
 struct PeImportDirectoryTable {
-	import_lookup_table_rva int
-	time_date_stamp         int
-	forwarder_chain         int
-	name_rva                int
+	import_lookup_table_rva i32
+	time_date_stamp         i32
+	forwarder_chain         i32
+	name_rva                i32
 mut:
-	import_address_table_rva int
+	import_address_table_rva i32
 }
 
 enum PeImportDirectoryTableField {
@@ -568,8 +568,8 @@ fn pe_idt_offsetof(field PeImportDirectoryTableField) i64 {
 
 fn default_pe_idt() PeImportDirectoryTable {
 	return PeImportDirectoryTable{
-		forwarder_chain: int(0xffffffff)
-		time_date_stamp: int(0xffffffff)
+		forwarder_chain: i32(0xffffffff)
+		time_date_stamp: i32(0xffffffff)
 	}
 }
 
@@ -606,7 +606,7 @@ fn (mut g Gen) gen_pe_idata() {
 	g.println('; padding to 0x${g.pos().hex()}')
 
 	idata_pos := g.pos()
-	idata_section.set_pointer_to_raw_data(mut g, int(idata_pos))
+	idata_section.set_pointer_to_raw_data(mut g, i32(idata_pos))
 
 	g.linker_include_paths << '.'
 
@@ -651,7 +651,7 @@ fn (mut g Gen) gen_pe_idata() {
 
 	for imp in imports {
 		g.write32_at(imp.idt_pos + pe_idt_offsetof(.import_address_table_rva),
-			int(g.pos() - idata_pos) + idata_section.header.virtual_address + 4)
+			i32(g.pos() - idata_pos) + idata_section.header.virtual_address + 4)
 
 		for func in imp.functions {
 			g.pe_dll_relocations[func] = g.pos()
@@ -669,7 +669,7 @@ fn (mut g Gen) gen_pe_idata() {
 
 	// dll names	
 	for imp in imports {
-		g.write32_at(imp.idt_pos + pe_idt_offsetof(.name_rva), int(g.pos() - idata_pos) +
+		g.write32_at(imp.idt_pos + pe_idt_offsetof(.name_rva), i32(g.pos() - idata_pos) +
 			idata_section.header.virtual_address)
 		g.write_string(imp.name)
 		g.println('"${imp.name}"')
@@ -680,7 +680,7 @@ fn (mut g Gen) gen_pe_idata() {
 			g.write64_at(g.pe_dll_relocations[func], i64(u64(g.pos() - idata_pos +
 				i64(idata_section.header.virtual_address)) << 32))
 			g.pe_dll_relocations[func] = g.pe_dll_relocations[func] - idata_pos +
-				idata_section.header.virtual_address + 4 // set correct lookup address for function calls
+				i64(idata_section.header.virtual_address) + 4 // set correct lookup address for function calls
 
 			g.write16(0) // export pointer index; we go via names, so 0
 			g.write_string(func)
@@ -694,7 +694,7 @@ fn (mut g Gen) gen_pe_idata() {
 	}
 
 	// write the section size
-	idata_size := int(g.pos() - idata_pos)
+	idata_size := i32(g.pos() - idata_pos)
 	idata_section.set_size_of_raw_data(mut g, idata_size)
 	idata_section.set_virtual_size(mut g, idata_size)
 }
@@ -731,7 +731,7 @@ pub fn (mut g Gen) generate_pe_header() {
 	}
 	mut text_section := &mut g.pe_sections[text_section_index]
 	g.code_start_pos = g.pos()
-	text_section.set_pointer_to_raw_data(mut g, int(g.code_start_pos))
+	text_section.set_pointer_to_raw_data(mut g, i32(g.code_start_pos))
 
 	g.code_gen.call(0)
 	g.code_gen.ret()
@@ -761,7 +761,7 @@ fn (mut g Gen) patch_section_virtual_addrs() {
 }
 
 fn (mut g Gen) patch_pe_code_size() {
-	code_size := int(g.file_size_pos - g.code_start_pos)
+	code_size := i32(g.file_size_pos - g.code_start_pos)
 
 	g.write32_at(g.pe_opt_hdr_pos + pe32_plus_optional_header_offsetof(.size_of_code),
 		code_size)
@@ -801,12 +801,12 @@ pub fn (mut g Gen) generate_pe_footer() {
 	match g.pref.arch {
 		.arm64 {
 			bl_next := u32(0x94000001)
-			g.write32_at(g.code_start_pos, int(bl_next))
+			g.write32_at(g.code_start_pos, i32(bl_next))
 		}
 		.amd64 {
 			// +1 is for "e8"
 			// -5 is for "e8 00 00 00 00"
-			g.write32_at(g.code_start_pos + 1, int(g.main_fn_addr - g.code_start_pos) - 5)
+			g.write32_at(g.code_start_pos + 1, i32(g.main_fn_addr - g.code_start_pos) - 5)
 		}
 		else {
 			g.n_error('unsupported platform ${g.pref.arch}')
diff --git a/vlib/v/gen/native/stmt.v b/vlib/v/gen/native/stmt.v
index ca9e5788343fbe..b7caa09ea35ea5 100644
--- a/vlib/v/gen/native/stmt.v
+++ b/vlib/v/gen/native/stmt.v
@@ -5,7 +5,7 @@ module native
 
 import v.ast
 
-fn C.strtol(str &char, endptr &&char, base int) int
+fn C.strtol(str &char, endptr &&char, base i32) i32
 
 pub fn (mut g Gen) stmts(stmts []ast.Stmt) {
 	for stmt in stmts {
@@ -118,7 +118,7 @@ fn (mut g Gen) gen_forc_stmt(node ast.ForCStmt) {
 	}
 	start := g.pos()
 	start_label := g.labels.new_label()
-	mut jump_addr := i64(0)
+	mut jump_addr := i32(0)
 	if node.has_cond {
 		cond := node.cond
 		match cond {
@@ -126,7 +126,7 @@ fn (mut g Gen) gen_forc_stmt(node ast.ForCStmt) {
 				match cond.left {
 					ast.Ident {
 						lit := cond.right as ast.IntegerLiteral
-						g.code_gen.cmp_var(cond.left as ast.Ident, lit.val.int())
+						g.code_gen.cmp_var(cond.left as ast.Ident, i32(lit.val.int()))
 						match cond.op {
 							.gt {
 								jump_addr = g.code_gen.cjmp(.jle)
@@ -158,7 +158,7 @@ fn (mut g Gen) gen_forc_stmt(node ast.ForCStmt) {
 	end_label := g.labels.new_label()
 	g.labels.patches << LabelPatch{
 		id: end_label
-		pos: int(jump_addr)
+		pos: jump_addr
 	}
 	g.println('; jump to label ${end_label}')
 	g.labels.branches << BranchLabel{
@@ -206,7 +206,7 @@ fn (mut g Gen) for_stmt(node ast.ForStmt) {
 		return
 	}
 	infix_expr := node.cond as ast.InfixExpr
-	mut jump_addr := 0 // location of `jne *00 00 00 00*`
+	mut jump_addr := i32(0) // location of `jne *00 00 00 00*`
 	start := g.pos()
 	start_label := g.labels.new_label()
 	g.labels.addrs[start_label] = start
@@ -221,7 +221,7 @@ fn (mut g Gen) for_stmt(node ast.ForStmt) {
 				}
 				ast.IntegerLiteral {
 					lit := infix_expr.right as ast.IntegerLiteral
-					g.code_gen.cmp_var(infix_expr.left as ast.Ident, lit.val.int())
+					g.code_gen.cmp_var(infix_expr.left as ast.Ident, i32(lit.val.int()))
 				}
 				else {
 					g.n_error('unhandled expression type')
@@ -326,7 +326,7 @@ fn (mut g Gen) for_in_stmt(node ast.ForInStmt) { // Work on that
 }
 
 fn (mut g Gen) gen_assert(assert_node ast.AssertStmt) {
-	mut cjmp_addr := 0
+	mut cjmp_addr := i32(0)
 	ane := assert_node.expr
 	label := g.labels.new_label()
 	cjmp_addr = g.condition(ane, true)
diff --git a/vlib/v/gen/native/syscall.v b/vlib/v/gen/native/syscall.v
index 552964f0bde579..29545c504f2f30 100644
--- a/vlib/v/gen/native/syscall.v
+++ b/vlib/v/gen/native/syscall.v
@@ -9,7 +9,7 @@ enum SysCall {
 	exit
 }
 
-fn (mut g Gen) nsyscall_macos(syscall SysCall) int {
+fn (mut g Gen) nsyscall_macos(syscall SysCall) i32 {
 	return match syscall {
 		.write {
 			0x2000004
@@ -20,7 +20,7 @@ fn (mut g Gen) nsyscall_macos(syscall SysCall) int {
 	}
 }
 
-fn (mut g Gen) nsyscall_linux(syscall SysCall) int {
+fn (mut g Gen) nsyscall_linux(syscall SysCall) i32 {
 	return match syscall {
 		.write {
 			1
@@ -31,7 +31,7 @@ fn (mut g Gen) nsyscall_linux(syscall SysCall) int {
 	}
 }
 
-fn (mut g Gen) nsyscall(syscall SysCall) int {
+fn (mut g Gen) nsyscall(syscall SysCall) i32 {
 	match g.pref.os {
 		.linux {
 			return g.nsyscall_linux(syscall)
diff --git a/vlib/v/gen/wasm/gen.v b/vlib/v/gen/wasm/gen.v
index 2349baaf0c44ce..cd85b98416a78b 100644
--- a/vlib/v/gen/wasm/gen.v
+++ b/vlib/v/gen/wasm/gen.v
@@ -318,7 +318,7 @@ pub fn (mut g Gen) bare_function_frame(func_start wasm.PatchPos) {
 		prolouge := g.func.patch_pos()
 		{
 			g.func.global_get(g.sp())
-			g.func.i32_const(g.stack_frame)
+			g.func.i32_const(i32(g.stack_frame))
 			g.func.sub(.i32_t)
 			if !g.is_leaf_function {
 				g.func.local_tee(g.bp())
@@ -330,7 +330,7 @@ pub fn (mut g Gen) bare_function_frame(func_start wasm.PatchPos) {
 		g.func.patch(func_start, prolouge)
 		if !g.is_leaf_function {
 			g.func.global_get(g.sp())
-			g.func.i32_const(g.stack_frame)
+			g.func.i32_const(i32(g.stack_frame))
 			g.func.add(.i32_t)
 			g.func.global_set(g.sp())
 		}
@@ -396,7 +396,7 @@ pub fn (mut g Gen) expr_with_cast(expr ast.Expr, got_type_raw ast.Type, expected
 pub fn (mut g Gen) handle_ptr_arithmetic(typ ast.Type) {
 	if typ.is_ptr() {
 		size, _ := g.pool.type_size(typ)
-		g.func.i32_const(size)
+		g.func.i32_const(i32(size))
 		g.func.mul(.i32_t)
 	}
 }
@@ -734,7 +734,7 @@ pub fn (mut g Gen) get_field_offset(typ ast.Type, name string) i32 {
 pub fn (mut g Gen) field_offset(typ ast.Type, name string) {
 	offset := g.get_field_offset(typ, name)
 	if offset != 0 {
-		g.func.i32_const(offset)
+		g.func.i32_const(i32(offset))
 		g.func.add(.i32_t)
 	}
 }
@@ -944,7 +944,7 @@ pub fn (mut g Gen) expr(node ast.Expr, expected ast.Type) {
 		}
 		ast.CharLiteral {
 			rns := serialise.eval_escape_codes_raw(node.val) or { panic('unreachable') }.runes()[0]
-			g.func.i32_const(rns)
+			g.func.i32_const(i32(rns))
 		}
 		ast.Ident {
 			v := g.get_var_from_ident(node)
diff --git a/vlib/v/gen/wasm/mem.v b/vlib/v/gen/wasm/mem.v
index 4664ccdb3f367a..8e216e2bfb2d02 100644
--- a/vlib/v/gen/wasm/mem.v
+++ b/vlib/v/gen/wasm/mem.v
@@ -327,7 +327,7 @@ pub fn (mut g Gen) get(v Var) {
 	if v.is_address && g.is_pure_type(v.typ) {
 		g.load(v.typ, v.offset)
 	} else if v.is_address && v.offset != 0 {
-		g.func.i32_const(v.offset)
+		g.func.i32_const(i32(v.offset))
 		g.func.add(.i32_t)
 	}
 }
@@ -345,7 +345,7 @@ pub fn (mut g Gen) mov(to Var, v Var) {
 	if size > 16 {
 		g.ref(to)
 		g.ref(v)
-		g.func.i32_const(size)
+		g.func.i32_const(i32(size))
 		g.func.memory_copy()
 		return
 	}
@@ -465,7 +465,7 @@ pub fn (mut g Gen) ref(v Var) {
 	g.ref_ignore_offset(v)
 
 	if v.offset != 0 {
-		g.func.i32_const(v.offset)
+		g.func.i32_const(i32(v.offset))
 		g.func.add(.i32_t)
 	}
 }
@@ -534,7 +534,7 @@ pub fn (mut g Gen) zero_fill(v Var, size i32) {
 	if size > 16 {
 		g.ref(v)
 		g.func.i32_const(0)
-		g.func.i32_const(size)
+		g.func.i32_const(i32(size))
 		g.func.memory_fill()
 		return
 	}
diff --git a/vlib/v/reflection/reflection.v b/vlib/v/reflection/reflection.v
index b057fb2b28c20f..4393ab530d07e8 100644
--- a/vlib/v/reflection/reflection.v
+++ b/vlib/v/reflection/reflection.v
@@ -50,8 +50,9 @@ pub enum VKind {
 	charptr
 	i8
 	i16
-	int
+	i32
 	i64
+	int
 	isize
 	u8
 	u16
diff --git a/vlib/v/tests/array_test.v b/vlib/v/tests/array_test.v
index c76f15b105f4fb..f8d8745cca2c83 100644
--- a/vlib/v/tests/array_test.v
+++ b/vlib/v/tests/array_test.v
@@ -5,7 +5,7 @@ enum Foo {
 	fourth
 }
 
-const enum_size = int(Foo.third)
+const enum_size = i32(Foo.third)
 
 fn test_enum_val_as_fixed_array_size() {
 	arr1 := [int(Foo.first)]int{}
@@ -44,7 +44,7 @@ fn test_for_in_shared_array_named_array() {
 
 fn test_fixed_array_to_dynamic_array() {
 	y := [1, 2, 3]!
-	mut x := y[..]
+	mut x := unsafe { y[..] }
 	x << 4
 	assert x.len == 4
 }
diff --git a/vlib/v/tests/const_comptime_eval_before_vinit_test.v b/vlib/v/tests/const_comptime_eval_before_vinit_test.v
index 4a74700151a497..8083546a1861f6 100644
--- a/vlib/v/tests/const_comptime_eval_before_vinit_test.v
+++ b/vlib/v/tests/const_comptime_eval_before_vinit_test.v
@@ -4,7 +4,7 @@ const zzz_an_i8_const = i8(0x28)
 
 const zzz_an_i16_const = i16(0x30)
 
-const zzz_an_int_const = int(89)
+const zzz_an_i32_const = i32(89)
 
 const zzz_an_i64_const = i64(123)
 
@@ -26,7 +26,7 @@ const zzz_an_i8_const_1 = zzz_an_i8_const + i8(1)
 
 const zzz_an_i16_const_1 = zzz_an_i16_const + i16(1)
 
-const zzz_an_int_const_1 = zzz_an_int_const + int(1)
+const zzz_an_i32_const_1 = zzz_an_i32_const + i32(1)
 
 const zzz_an_i64_const_1 = zzz_an_i64_const + i64(1)
 
@@ -76,7 +76,7 @@ fn pre_main() {
 	unsafe {
 		static_storage(0, int(zzz_an_i8_const))
 		static_storage(1, int(zzz_an_i16_const))
-		static_storage(2, int(zzz_an_int_const))
+		static_storage(2, int(zzz_an_i32_const))
 		static_storage(3, int(zzz_an_i64_const))
 		//
 		static_storage(4, int(zzz_an_byte_const))
@@ -89,7 +89,7 @@ fn pre_main() {
 
 		static_storage(20, int(zzz_an_i8_const_1))
 		static_storage(21, int(zzz_an_i16_const_1))
-		static_storage(22, int(zzz_an_int_const_1))
+		static_storage(22, int(zzz_an_i32_const_1))
 		static_storage(23, int(zzz_an_i64_const_1))
 		//
 		static_storage(24, int(zzz_an_byte_const_1))
@@ -106,7 +106,7 @@ fn do_check() {
 	unsafe {
 		assert static_storage(0, -1) == u8(zzz_an_i8_const)
 		assert static_storage(1, -1) == u8(zzz_an_i16_const)
-		assert static_storage(2, -1) == u8(zzz_an_int_const)
+		assert static_storage(2, -1) == u8(zzz_an_i32_const)
 		// TODO: this should also be initialised, but is not for now,
 		// since V has problems with `-9223372036854775808.str()`,
 		// The generating code for i64 consts is present, but is disabled
diff --git a/vlib/v/tests/string_interpolation_struct_with_usize_field_test.v b/vlib/v/tests/string_interpolation_struct_with_usize_field_test.v
index ecde0ba2900fe4..47aa127e4abdea 100644
--- a/vlib/v/tests/string_interpolation_struct_with_usize_field_test.v
+++ b/vlib/v/tests/string_interpolation_struct_with_usize_field_test.v
@@ -21,7 +21,7 @@ fn test_stringified_usize_field_should_be_always_positive() {
 	sa := a.str()
 	assert sa.contains('f_isize: -1')
 	assert sa.contains('f_i64: -1')
-	assert sa.contains('f_i32:     i32(-1)')
+	assert sa.contains('f_i32: -1')
 	i := sa.split_into_lines().filter(it.contains('isize'))[0]
 	assert i.contains('-'), 'all `i` fields should be negative, but ${i} != ${a.f_isize}'
 	//
diff --git a/vlib/wasm/encoding.v b/vlib/wasm/encoding.v
index 61fbee76e00ba8..685253215c9110 100644
--- a/vlib/wasm/encoding.v
+++ b/vlib/wasm/encoding.v
@@ -314,7 +314,7 @@ pub fn (mut mod Module) compile() []u8 {
 					mod.buf << 0x00 // active
 					// constant expr
 					mod.buf << 0x41 // i32.const
-					mod.buf << leb128.encode_i32(idx)
+					mod.buf << leb128.encode_i32(i32(idx))
 					mod.buf << 0x0B // END expression opcode
 				} else {
 					mod.buf << 0x01 // passive
diff --git a/vlib/wasm/instructions.v b/vlib/wasm/instructions.v
index 1f4a1222797618..df3430122ad3ae 100644
--- a/vlib/wasm/instructions.v
+++ b/vlib/wasm/instructions.v
@@ -22,7 +22,7 @@ fn (mut func Function) blocktype(typ FuncType) {
 
 	// encode full type
 	tidx := func.mod.new_functype(typ)
-	func.code << leb128.encode_i32(tidx)
+	func.code << leb128.encode_i32(i32(tidx))
 }
 
 pub type PatchPos = i32