diff --git a/tools/dct/DrvGen.py b/tools/dct/DrvGen.py new file mode 100755 index 000000000000..1bfa8d8679d8 --- /dev/null +++ b/tools/dct/DrvGen.py @@ -0,0 +1,187 @@ +#! /usr/bin/env python2 +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import os, sys +import getopt +import traceback +import subprocess +import xml.dom.minidom + +sys.dont_write_bytecode = True + +sys.path.append('.') +sys.path.append('..') + +from obj.ChipObj import ChipObj +from obj.ChipObj import Everest +from obj.ChipObj import Olympus +from obj.ChipObj import MT6757_P25 +from obj.ChipObj import Rushmore +from obj.ChipObj import Whitney +from obj.ChipObj import MT6759 +from obj.ChipObj import MT6763 +from obj.ChipObj import MT6750S +from obj.ChipObj import MT6758 +from obj.ChipObj import MT6739 +from obj.ChipObj import MT8695 +from obj.ChipObj import MT6771 +from obj.ChipObj import MT6775 +from obj.ChipObj import MT6779 + +from utility.util import LogLevel +from utility.util import log + +def usage(): + print ''' +usage: DrvGen [dws_path] [file_path] [log_path] [paras]... + +options and arguments: + +dws_path : dws file path +file_path : where you want to put generated files +log_path : where to store the log files +paras : parameter for generate wanted file +''' + +def is_oldDws(path, gen_spec): + if not os.path.exists(path): + log(LogLevel.error, 'Can not find %s' %(path)) + sys.exit(-1) + + try: + root = xml.dom.minidom.parse(dws_path) + except Exception, e: + log(LogLevel.warn, '%s is not xml format, try to use old DCT!' %(dws_path)) + if len(gen_spec) == 0: + log(LogLevel.warn, 'Please use old DCT UI to gen all files!') + return True + old_dct = os.path.join(sys.path[0], 'old_dct', 'DrvGen') + cmd = old_dct + ' ' + dws_path + ' ' + gen_path + ' ' + log_path + ' ' + gen_spec[0] + if 0 == subprocess.call(cmd, shell=True): + return True + else: + log(LogLevel.error, '%s format error!' %(dws_path)) + sys.exit(-1) + + return False + +if __name__ == '__main__': + opts, args = getopt.getopt(sys.argv[1:], '') + + if len(args) == 0: + msg = 'Too less arguments!' + usage() + log(LogLevel.error, msg) + sys.exit(-1) + + dws_path = '' + gen_path = '' + log_path = '' + gen_spec = [] + + # get DWS file path from parameters + dws_path = os.path.abspath(args[0]) + + # get parameters from input + if len(args) == 1: + gen_path = os.path.dirname(dws_path) + log_path = os.path.dirname(dws_path) + + elif len(args) == 2: + gen_path = os.path.abspath(args[1]) + log_path = os.path.dirname(dws_path) + + elif len(args) == 3: + gen_path = os.path.abspath(args[1]) + log_path = os.path.abspath(args[2]) + + elif len(args) >= 4: + gen_path = os.path.abspath(args[1]) + log_path = os.path.abspath(args[2]) + for i in range(3,len(args)): + gen_spec.append(args[i]) + + log(LogLevel.info, 'DWS file path is %s' %(dws_path)) + log(LogLevel.info, 'Gen files path is %s' %(gen_path)) + log(LogLevel.info, 'Log files path is %s' %(log_path)) + + for item in gen_spec: + log(LogLevel.info, 'Parameter is %s' %(item)) + + + + # check DWS file path + if not os.path.exists(dws_path): + log(LogLevel.error, 'Can not find "%s", file not exist!' %(dws_path)) + sys.exit(-1) + + if not os.path.exists(gen_path): + log(LogLevel.error, 'Can not find "%s", gen path not exist!' %(gen_path)) + sys.exit(-1) + + if not os.path.exists(log_path): + log(LogLevel.error, 'Can not find "%s", log path not exist!' %(log_path)) + sys.exit(-1) + + if is_oldDws(dws_path, gen_spec): + sys.exit(0) + + chipId = ChipObj.get_chipId(dws_path) + log(LogLevel.info, 'chip id: %s' %(chipId)) + chipObj = None + if cmp(chipId, 'MT6797') == 0: + chipObj = Everest(dws_path, gen_path) + elif cmp(chipId, 'MT6757') == 0: + chipObj = Olympus(dws_path, gen_path) + elif cmp(chipId, 'MT6757-P25') == 0: + chipObj = MT6757_P25(dws_path, gen_path) + elif cmp(chipId, 'KIBOPLUS') == 0: + chipObj = MT6757_P25(dws_path, gen_path) + elif cmp(chipId, 'MT6570') == 0: + chipObj = Rushmore(dws_path, gen_path) + elif cmp(chipId, 'MT6799') == 0: + chipObj = Whitney(dws_path, gen_path) + elif cmp(chipId, 'MT6763') == 0: + chipObj = MT6763(dws_path, gen_path) + elif cmp(chipId, 'MT6759') == 0: + chipObj = MT6759(dws_path, gen_path) + elif cmp(chipId, 'MT6750S') == 0: + chipObj = MT6750S(dws_path, gen_path) + elif cmp(chipId, 'MT6758') == 0: + chipObj = MT6758(dws_path, gen_path) + elif cmp(chipId, 'MT6739') == 0: + chipObj = MT6739(dws_path, gen_path) + elif cmp(chipId, 'MT8695') == 0: + chipObj = MT8695(dws_path, gen_path) + elif cmp(chipId, 'MT6771') == 0 or \ + cmp(chipId, 'MT6775') == 0 or \ + cmp(chipId, 'MT6765') == 0 or \ + cmp(chipId, 'MT3967') == 0 or \ + cmp(chipId, 'MT6761') == 0: + chipObj = MT6771(dws_path, gen_path) + elif cmp(chipId, 'MT6779') == 0: + chipObj = MT6779(dws_path, gen_path) + else: + chipObj = ChipObj(dws_path, gen_path) + + if not chipObj.parse(): + log(LogLevel.error, 'Parse %s fail!' %(dws_path)) + sys.exit(-1) + + if not chipObj.generate(gen_spec): + log(LogLevel.error, 'Generate files fail!') + sys.exit(-1) + + sys.exit(0) + diff --git a/tools/dct/config/MT6739.fig b/tools/dct/config/MT6739.fig new file mode 100644 index 000000000000..61fbdbcc249b --- /dev/null +++ b/tools/dct/config/MT6739.fig @@ -0,0 +1,301 @@ +[Chip Type] +Chip = MT6739 +GPIO_ModeNum = 8 +PMIC_APP_COUNT = 6 +I2C_BUS = 1 +GPIO_IES = 1 +GPIO_EINT_MODE = 1 +CLK_BUF_CURRENT = 1 +MD1_EINT_SRC_PIN = 1 +MD1_EINT_DED_EN = 1 +MD1_EINT_SKT_TYPE = 1 +KPD_EXTEND_ENABLE = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(I2S1_LRCK) MODE2(MRG_SYNC) MODE3(C2K_CVSD_INT) MODE4(I2S0_LRCK) MODE5() MODE6() MODE7(SSUSB_SDA0) 0 0 +GPIO1 = MODE0(GPIO1) MODE1(I2S1_BCK) MODE2(MRG_DO) MODE3(SPI8_MI_A) MODE4(I2S0_BCK) MODE5() MODE6() MODE7(SSUSB_SCL0) 1 0 +GPIO2 = MODE0(GPIO2) MODE1(I2S1_MCK) MODE2(MRG_DI) MODE3(SPI8_MO_A) MODE4(I2S0_MCK) MODE5() MODE6() MODE7(SSUSB_SDA1) 2 0 +GPIO3 = MODE0(GPIO3) MODE1(I2S1_DO1) MODE2(MRG_CLK) MODE3(SPI8_CK_A) MODE4(I2S0_DI) MODE5() MODE6(TP_GPIO8_AO) MODE7(SSUSB_SCL1) 3 0 +GPIO4 = MODE0(GPIO4) MODE1(I2S1_DO2) MODE2(EXT_FRAME_SYNC) MODE3(SPI8_CS_A) MODE4() MODE5() MODE6(TP_GPIO9_AO) MODE7(USB2_SDA) 4 0 +GPIO5 = MODE0(GPIO5) MODE1(PCM0_SYNC) MODE2(I2S2_LRCK) MODE3(PWM0) MODE4() MODE5() MODE6(TP_GPIO10_AO) MODE7(USB2_SCL) 5 1 +GPIO6 = MODE0(GPIO6) MODE1(PCM0_CLK) MODE2(I2S2_BCK) MODE3(PWM1) MODE4() MODE5() MODE6(TP_GPIO11_AO) MODE7() 6 1 +GPIO7 = MODE0(GPIO7) MODE1(PCM0_DI) MODE2(I2S2_MCK) MODE3(PWM2) MODE4() MODE5() MODE6(TP_GPIO12_AO) MODE7() 7 1 +GPIO8 = MODE0(GPIO8) MODE1(PCM0_DO) MODE2(I2S2_DI1) MODE3(PWM3) MODE4() MODE5() MODE6(TP_GPIO13_AO) MODE7() 8 1 +GPIO9 = MODE0(GPIO9) MODE1(MD_URXD0) MODE2(I2S2_DI2) MODE3(PWM4) MODE4() MODE5() MODE6(TP_GPIO14_AO) MODE7() 9 1 +GPIO10 = MODE0(GPIO10) MODE1(MD_UTXD0) MODE2(I2S3_LRCK) MODE3(PWM5) MODE4() MODE5() MODE6(TP_GPIO15_AO) MODE7() 10 2 +GPIO11 = MODE0(GPIO11) MODE1(PMIC_MFG_BOOST) MODE2(I2S3_BCK) MODE3(SRCLKENAI2) MODE4() MODE5() MODE6(EVR_DORMANT) MODE7() 11 2 +GPIO12 = MODE0(GPIO12) MODE1(URXD4) MODE2(I2S3_MCK) MODE3(PWM6) MODE4() MODE5() MODE6() MODE7() 12 2 +GPIO13 = MODE0(GPIO13) MODE1(UTXD4) MODE2(I2S3_DO) MODE3(CMFLASH) MODE4() MODE5() MODE6() MODE7() 13 2 +GPIO14 = MODE0(GPIO14) MODE1(URTS4) MODE2(I2S0_DI) MODE3(IRTX_OUT) MODE4(PWM1) MODE5(MD_INT1) MODE6(EVR_DVC1) MODE7() 14 3 +GPIO15 = MODE0(GPIO15) MODE1(UCTS4) MODE2(SRCLKENAI2) MODE3(WF_TSF_INT) MODE4() MODE5(MD_INT0) MODE6(EVR_DVC2) MODE7() 15 3 +GPIO16 = MODE0(GPIO16) MODE1(RFIC_BSI_0_EN) MODE2(SPM_BSI_EN) MODE3() MODE4() MODE5() MODE6() MODE7() 16 4 +GPIO17 = MODE0(GPIO17) MODE1(RFIC_BSI_0_CK) MODE2(SPM_BSI_CK) MODE3() MODE4() MODE5() MODE6() MODE7() 17 4 +GPIO18 = MODE0(GPIO18) MODE1(RFIC_BSI_0_D0) MODE2(SPM_BSI_D0) MODE3() MODE4() MODE5() MODE6() MODE7() 18 4 +GPIO19 = MODE0(GPIO19) MODE1(RFIC_BSI_0_D1) MODE2(SPM_BSI_D1) MODE3() MODE4() MODE5() MODE6() MODE7() 19 4 +GPIO20 = MODE0(GPIO20) MODE1(RFIC_BSI_0_D2) MODE2(SPM_BSI_D2) MODE3() MODE4() MODE5() MODE6() MODE7() 20 4 +GPIO21 = MODE0(GPIO21) MODE1(BPI_BUS14) MODE2(PA_VM0) MODE3() MODE4() MODE5() MODE6() MODE7() 21 5 +GPIO22 = MODE0(GPIO22) MODE1(BPI_BUS15) MODE2(PA_VM1) MODE3() MODE4() MODE5() MODE6() MODE7() 22 5 +GPIO23 = MODE0(GPIO23) MODE1(BPI_BUS16) MODE2(TX_SWAP0) MODE3() MODE4() MODE5() MODE6() MODE7() 23 5 +GPIO24 = MODE0(GPIO24) MODE1(BPI_BUS17) MODE2(TX_SWAP1) MODE3() MODE4() MODE5() MODE6() MODE7() 24 5 +GPIO25 = MODE0(GPIO25) MODE1(BPI_BUS18) MODE2(TX_SWAP2) MODE3() MODE4() MODE5() MODE6() MODE7() 25 5 +GPIO26 = MODE0(GPIO26) MODE1(BPI_BUS19) MODE2(TX_SWAP3) MODE3() MODE4() MODE5() MODE6() MODE7() 26 5 +GPIO27 = MODE0(GPIO27) MODE1(BPI_BUS20) MODE2(DET_BPI0) MODE3() MODE4() MODE5() MODE6() MODE7() 27 5 +GPIO28 = MODE0(GPIO28) MODE1(BPI_BUS21) MODE2(DET_BPI1) MODE3() MODE4() MODE5() MODE6() MODE7() 28 5 +GPIO29 = MODE0(GPIO29) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 29 6 +GPIO30 = MODE0(GPIO30) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 30 6 +GPIO31 = MODE0(GPIO31) MODE1(MIPI4_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 31 6 +GPIO32 = MODE0(GPIO32) MODE1(MIPI4_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 32 6 +GPIO33 = MODE0(GPIO33) MODE1(MIPI5_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 33 6 +GPIO34 = MODE0(GPIO34) MODE1(MIPI5_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 34 6 +GPIO35 = MODE0(GPIO35) MODE1(MIPI6_SCLK) MODE2(SPI8_MI_A) MODE3() MODE4() MODE5() MODE6() MODE7() 35 6 +GPIO36 = MODE0(GPIO36) MODE1(MIPI6_SDATA) MODE2(SPI8_MO_A) MODE3() MODE4() MODE5() MODE6() MODE7() 36 6 +GPIO37 = MODE0(GPIO37) MODE1(MIPI7_SCLK) MODE2(SPI8_CK_A) MODE3() MODE4() MODE5() MODE6() MODE7() 37 6 +GPIO38 = MODE0(GPIO38) MODE1(MIPI7_SDATA) MODE2(SPI8_CS_A) MODE3() MODE4() MODE5() MODE6() MODE7() 38 6 +GPIO39 = MODE0(GPIO39) MODE1(CMMCLK0) MODE2() MODE3(KPROW5) MODE4(PMIC_MFG_BOOST) MODE5() MODE6() MODE7() 39 7 +GPIO40 = MODE0(GPIO40) MODE1(CMMCLK1) MODE2() MODE3(KPROW4) MODE4() MODE5() MODE6() MODE7() 40 8 +GPIO41 = MODE0(GPIO41) MODE1(CMMCLK2) MODE2(MD_URXD2) MODE3(KPROW3) MODE4() MODE5() MODE6() MODE7() 41 9 +GPIO42 = MODE0(GPIO42) MODE1(CMMCLK3) MODE2(MD_UTXD2) MODE3(KPCOL7) MODE4(CMFLASH) MODE5() MODE6() MODE7() 42 10 +GPIO43 = MODE0(GPIO43) MODE1(SPI5_MO) MODE2(IRTX_OUT) MODE3(PWM0) MODE4() MODE5(PCC_PPC_IO) MODE6(SPINOR_CK) MODE7(DBG_MON_A0) 43 11 +GPIO44 = MODE0(GPIO44) MODE1(SPI5_CS) MODE2() MODE3(PWM1) MODE4() MODE5() MODE6(SPINOR_CS) MODE7(DBG_MON_A1) 44 11 +GPIO45 = MODE0(GPIO45) MODE1(SPI5_CK) MODE2() MODE3(PWM2) MODE4() MODE5() MODE6(SPINOR_IO0) MODE7(DBG_MON_A2) 45 11 +GPIO46 = MODE0(GPIO46) MODE1(SPI5_MI) MODE2() MODE3(PWM3) MODE4() MODE5() MODE6(SPINOR_IO1) MODE7(DBG_MON_A3) 46 12 +GPIO47 = MODE0(GPIO47) MODE1(SRCLKENAI2) MODE2() MODE3(PWM4) MODE4() MODE5() MODE6(SPINOR_IO2) MODE7(DBG_MON_A4) 47 12 +GPIO48 = MODE0(GPIO48) MODE1() MODE2() MODE3(PWM5) MODE4() MODE5() MODE6(SPINOR_IO3) MODE7(DBG_MON_A5) 48 12 +GPIO49 = MODE0(GPIO49) MODE1() MODE2(IPU_JTAG_TRST) MODE3(DFD_NTRST) MODE4(MFG_JTAG_TRSTN) MODE5(ANC_JTAG_TRSTN) MODE6(SCP_JTAG_TRSTN) MODE7(CCU_JTAG_TRST) 49 13 +GPIO50 = MODE0(GPIO50) MODE1(JTDO_SEL1) MODE2(IPU_JTAG_TDO) MODE3(DFD_TDO) MODE4(MFG_JTAG_TDO) MODE5(ANC_JTAG_TDO) MODE6(SCP_JTAG_TDO) MODE7(CCU_JTAG_TDO) 50 13 +GPIO51 = MODE0(GPIO51) MODE1(JTDI_SEL1) MODE2(IPU_JTAG_TDI) MODE3(DFD_TDI) MODE4(MFG_JTAG_TDI) MODE5(ANC_JTAG_TDI) MODE6(SCP_JTAG_TDI) MODE7(CCU_JTAG_TDI) 51 13 +GPIO52 = MODE0(GPIO52) MODE1(JTCK_SEL1) MODE2(IPU_JTAG_TCK) MODE3(DFD_TCK_XI) MODE4(MFG_JTAG_TCK) MODE5(ANC_JTAG_TCK) MODE6(SCP_JTAG_TCK) MODE7(CCU_JTAG_TCK) 52 13 +GPIO53 = MODE0(GPIO53) MODE1(JTMS_SEL1) MODE2(IPU_JTAG_TMS) MODE3(DFD_TMS) MODE4(MFG_JTAG_TMS) MODE5(ANC_JTAG_TMS) MODE6(SCP_JTAG_TMS) MODE7(CCU_JTAG_TMS) 53 13 +GPIO54 = MODE0(GPIO54) MODE1(MSDC3_DSL) MODE2(SRCLKENAI2) MODE3() MODE4(PCIE_PERST_B) MODE5() MODE6() MODE7(DBG_MON_A6) 54 14 +GPIO55 = MODE0(GPIO55) MODE1(MSDC3_CMD) MODE2(CMVREF1) MODE3() MODE4(PCIE_CLKREQN) MODE5() MODE6() MODE7(DBG_MON_A7) 55 14 +GPIO56 = MODE0(GPIO56) MODE1(MSDC3_CLK) MODE2(IRTX_OUT) MODE3(PWM2) MODE4(PCIE_WAKEN) MODE5() MODE6() MODE7(DBG_MON_A8) 56 14 +GPIO57 = MODE0(GPIO57) MODE1(MSDC3_DAT3) MODE2(CMVREF0) MODE3(SPI3_CS_B) MODE4(SPI5_CS) MODE5() MODE6() MODE7(DBG_MON_A9) 57 14 +GPIO58 = MODE0(GPIO58) MODE1(MSDC3_DAT2) MODE2(WF_TSF_INT) MODE3(SPI3_MO_B) MODE4(SPI5_MO) MODE5() MODE6() MODE7(DBG_MON_A10) 58 14 +GPIO59 = MODE0(GPIO59) MODE1(MSDC3_DAT1) MODE2(TP_URXD2_AO) MODE3(SPI3_MI_B) MODE4(SPI5_MI) MODE5(C2K_UTXD0) MODE6() MODE7(DBG_MON_A11) 59 14 +GPIO60 = MODE0(GPIO60) MODE1(MSDC3_DAT0) MODE2(TP_UTXD2_AO) MODE3(SPI3_CK_B) MODE4(SPI5_CK) MODE5(C2K_URXD0) MODE6(CMFLASH) MODE7(DBG_MON_A12) 60 14 +GPIO61 = MODE0(GPIO61) MODE1(TP_UTXD1_AO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A13) 61 15 +GPIO62 = MODE0(GPIO62) MODE1(TP_URXD1_AO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A14) 62 15 +GPIO63 = MODE0(GPIO63) MODE1(PWRMCU_UTXD1_AO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A15) 63 15 +GPIO64 = MODE0(GPIO64) MODE1(PWRMCU_URXD1_AO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A16) 64 15 +GPIO65 = MODE0(GPIO65) MODE1(PCIE_WAKEN) MODE2(PMIC_MFG_BOOST) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A17) 65 15 +GPIO66 = MODE0(GPIO66) MODE1(PCIE_CLKREQN) MODE2(LCM1_RST) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A18) 66 15 +GPIO67 = MODE0(GPIO67) MODE1(URXD3) MODE2(UTXD3) MODE3(URTS4) MODE4() MODE5() MODE6() MODE7(DBG_MON_A19) 67 16 +GPIO68 = MODE0(GPIO68) MODE1(UTXD3) MODE2(URXD3) MODE3(UCTS4) MODE4() MODE5() MODE6() MODE7(DBG_MON_A20) 68 16 +GPIO69 = MODE0(GPIO69) MODE1(SDA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A21) 69 17 +GPIO70 = MODE0(GPIO70) MODE1(SCL3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A22) 70 17 +GPIO71 = MODE0(GPIO71) MODE1(PTA_TXD) MODE2(URTS0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A23) 71 18 +GPIO72 = MODE0(GPIO72) MODE1(PTA_RXD) MODE2(UCTS0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A24) 72 18 +GPIO73 = MODE0(GPIO73) MODE1(PCIE_PERST_B) MODE2(PMIC_MFG_BOOST) MODE3(URTS1) MODE4(EXT_FRAME_SYNC) MODE5() MODE6() MODE7(DBG_MON_A25) 73 19 +GPIO74 = MODE0(GPIO74) MODE1(GPS_FRAME_SYNC) MODE2() MODE3(UCTS1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A26) 74 19 +GPIO75 = MODE0(GPIO75) MODE1(MRG_SYNC) MODE2(PCM0_SYNC) MODE3(URTS2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A27) 75 20 +GPIO76 = MODE0(GPIO76) MODE1(MRG_DO) MODE2(PCM0_DO) MODE3(UCTS2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A28) 76 20 +GPIO77 = MODE0(GPIO77) MODE1(MRG_DI) MODE2(PCM0_DI) MODE3(URTS3) MODE4() MODE5() MODE6() MODE7(DBG_MON_A29) 77 20 +GPIO78 = MODE0(GPIO78) MODE1(MRG_CLK) MODE2(PCM0_CLK) MODE3(UCTS3) MODE4() MODE5() MODE6() MODE7(DBG_MON_A30) 78 21 +GPIO79 = MODE0(GPIO79) MODE1(MSDC0_RSTB) MODE2(C2K_DM_EINT0) MODE3(SPI5_CS) MODE4(SPI4_CK) MODE5() MODE6(PCIE_SDA) MODE7(DBG_MON_A31) 79 22 +GPIO80 = MODE0(GPIO80) MODE1(MSDC0_DSL) MODE2(C2K_DM_EINT1) MODE3(SPI5_MO) MODE4(SPI4_MI) MODE5() MODE6(PCIE_SCL) MODE7(DBG_MON_A32) 80 23 +GPIO81 = MODE0(GPIO81) MODE1(MSDC0_CLK) MODE2(C2K_DM_EINT2) MODE3(SPI5_MI) MODE4(SPI4_MO) MODE5() MODE6() MODE7(DBG_MON_A33) 81 24 +GPIO82 = MODE0(GPIO82) MODE1(MSDC0_CMD) MODE2(C2K_DM_EINT3) MODE3(SPI5_CK) MODE4(SPI4_CS) MODE5() MODE6() MODE7(DBG_MON_A34) 82 25 +GPIO83 = MODE0(GPIO83) MODE1(MSDC0_DAT7) MODE2(SPI6_CK) MODE3(UTXD0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A35) 83 26 +GPIO84 = MODE0(GPIO84) MODE1(MSDC0_DAT6) MODE2(SPI6_MI) MODE3(URXD0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A36) 84 26 +GPIO85 = MODE0(GPIO85) MODE1(MSDC0_DAT5) MODE2(SPI6_MO) MODE3(URXD1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A37) 85 26 +GPIO86 = MODE0(GPIO86) MODE1(MSDC0_DAT4) MODE2(SPI6_CS) MODE3(UTXD1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A38) 86 26 +GPIO87 = MODE0(GPIO87) MODE1(MSDC0_DAT3) MODE2(SPI7_MO) MODE3(UTXD2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A39) 87 26 +GPIO88 = MODE0(GPIO88) MODE1(MSDC0_DAT2) MODE2(SPI7_CK) MODE3(URXD2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A40) 88 26 +GPIO89 = MODE0(GPIO89) MODE1(MSDC0_DAT1) MODE2(SPI7_CS) MODE3(URXD3) MODE4() MODE5() MODE6() MODE7(DBG_MON_A41) 89 26 +GPIO90 = MODE0(GPIO90) MODE1(MSDC0_DAT0) MODE2(SPI7_MI) MODE3(UTXD3) MODE4() MODE5() MODE6(CMFLASH) MODE7(DBG_MON_A42) 90 26 +GPIO91 = MODE0(GPIO91) MODE1(I2S0_LRCK) MODE2(I2S3_LRCK) MODE3(I2S1_LRCK) MODE4(I2S2_LRCK) MODE5(SPI0_CK_B) MODE6(LVTS_26M) MODE7(DBG_MON_A49) 91 27 +GPIO92 = MODE0(GPIO92) MODE1(I2S0_BCK) MODE2(I2S3_BCK) MODE3(I2S1_BCK) MODE4(I2S2_BCK) MODE5(SPI0_MI_B) MODE6(SW_MST0_CK) MODE7(DBG_MON_A50) 92 28 +GPIO93 = MODE0(GPIO93) MODE1(I2S0_DI) MODE2(I2S3_DO) MODE3(I2S1_DO1) MODE4(I2S2_DI1) MODE5(SPI0_MO_B) MODE6(SW_MST0_DATA0) MODE7(DBG_MON_A51) 93 27 +GPIO94 = MODE0(GPIO94) MODE1(I2S0_MCK) MODE2(I2S3_MCK) MODE3(I2S1_DO2) MODE4(I2S2_DI2) MODE5(SPI0_CS_B) MODE6(IDDIG) MODE7(DBG_MON_A52) 94 27 +GPIO95 = MODE0(GPIO95) MODE1(SPI1_CS_A) MODE2(URTS1) MODE3(SCP_SPI1_CS) MODE4(LVTS_SCK) MODE5(TP_GPIO2_AO) MODE6(C2K_UTXD0) MODE7(DBG_MON_A53) 95 29 +GPIO96 = MODE0(GPIO96) MODE1(SPI1_MO_A) MODE2(SPI1_MI_A) MODE3(SCP_SPI1_MO) MODE4(LVTS_SCF) MODE5(TP_GPIO3_AO) MODE6(C2K_URXD0) MODE7(DBG_MON_A54) 96 29 +GPIO97 = MODE0(GPIO97) MODE1(SPI1_MI_A) MODE2(SPI1_MO_A) MODE3(SCP_SPI1_MI) MODE4(LVTS_SDD) MODE5(TP_GPIO4_AO) MODE6(C2K_UTXD1) MODE7(DBG_MON_A55) 97 29 +GPIO98 = MODE0(GPIO98) MODE1(SPI1_CK_A) MODE2(UCTS1) MODE3(SCP_SPI1_CK) MODE4(LVTS_FOUT) MODE5(TP_GPIO5_AO) MODE6(C2K_URXD1) MODE7(DBG_MON_A56) 98 29 +GPIO99 = MODE0(GPIO99) MODE1(SPI0_CS_A) MODE2(URTS0) MODE3() MODE4() MODE5(TP_GPIO6_AO) MODE6(SCP_SPI0_CS) MODE7() 99 30 +GPIO100 = MODE0(GPIO100) MODE1(SPI0_MO_A) MODE2(SPI0_MI_A) MODE3() MODE4() MODE5(TP_GPIO7_AO) MODE6(SCP_SPI0_MO) MODE7() 100 30 +GPIO101 = MODE0(GPIO101) MODE1(SPI0_MI_A) MODE2(SPI0_MO_A) MODE3() MODE4() MODE5(TP_URTS1_AO) MODE6(SCP_SPI0_MI) MODE7() 101 30 +GPIO102 = MODE0(GPIO102) MODE1(SPI0_CK_A) MODE2(UCTS0) MODE3() MODE4() MODE5(TP_UCTS1_AO) MODE6(SCP_SPI0_CK) MODE7() 102 30 +GPIO103 = MODE0(GPIO103) MODE1(USB_DRVVBUS) MODE2() MODE3(MD_URXD1) MODE4(C2K_EINT0) MODE5() MODE6() MODE7(DBG_MON_A57) 103 31 +GPIO104 = MODE0(GPIO104) MODE1(IDDIG) MODE2(EXT_FRAME_SYNC) MODE3(MD_UTXD1) MODE4(C2K_EINT1) MODE5() MODE6() MODE7(DBG_MON_A58) 104 32 +GPIO105 = MODE0(GPIO105) MODE1(I2S2_MCK) MODE2(I2S1_MCK) MODE3(I2S3_MCK) MODE4(I2S0_MCK) MODE5() MODE6() MODE7(DBG_MON_A59) 105 33 +GPIO106 = MODE0(GPIO106) MODE1(I2S2_DI1) MODE2(I2S1_DO1) MODE3(I2S3_DO) MODE4(I2S0_DI) MODE5() MODE6() MODE7(DBG_MON_A60) 106 33 +GPIO107 = MODE0(GPIO107) MODE1(I2S2_DI2) MODE2(I2S1_DO2) MODE3(I2S0_DI) MODE4(I2S3_DO) MODE5(SW_MST0_DATA0) MODE6() MODE7(DBG_MON_A61) 107 33 +GPIO108 = MODE0(GPIO108) MODE1(I2S2_BCK) MODE2(I2S1_BCK) MODE3(I2S3_BCK) MODE4(I2S0_BCK) MODE5(SW_MST0_CK) MODE6() MODE7(DBG_MON_A62) 108 33 +GPIO109 = MODE0(GPIO109) MODE1(I2S2_LRCK) MODE2(I2S1_LRCK) MODE3(I2S3_LRCK) MODE4(I2S0_LRCK) MODE5() MODE6() MODE7(DBG_MON_A63) 109 33 +GPIO110 = MODE0(GPIO110) MODE1(URXD1) MODE2(MD_URXD0) MODE3(MD_URXD1) MODE4(TP_URXD2_AO) MODE5(C2K_URXD1) MODE6(C2K_URXD0) MODE7(DBG_MON_A64) 110 34 +GPIO111 = MODE0(GPIO111) MODE1(UTXD1) MODE2(MD_UTXD0) MODE3(MD_UTXD1) MODE4(TP_UTXD2_AO) MODE5(C2K_UTXD1) MODE6(C2K_UTXD0) MODE7() 111 34 +GPIO112 = MODE0(GPIO112) MODE1(KPROW0) MODE2(URTS2) MODE3() MODE4() MODE5() MODE6() MODE7() 112 35 +GPIO113 = MODE0(GPIO113) MODE1(KPROW1) MODE2(UCTS2) MODE3(URXD4) MODE4(C2K_DM_EINT0) MODE5() MODE6() MODE7() 113 35 +GPIO114 = MODE0(GPIO114) MODE1(KPROW2) MODE2(PMIC_MFG_BOOST) MODE3(UTXD4) MODE4(C2K_DM_EINT1) MODE5() MODE6() MODE7(DBG_MON_B0) 114 35 +GPIO115 = MODE0(GPIO115) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B1) 115 35 +GPIO116 = MODE0(GPIO116) MODE1(KPCOL1) MODE2(DSI1_TE) MODE3(IDDIG) MODE4(C2K_DM_EINT2) MODE5() MODE6(EVR_DVC0) MODE7(DBG_MON_B2) 116 35 +GPIO117 = MODE0(GPIO117) MODE1(KPCOL2) MODE2(MD_INT2) MODE3(C2K_CVSD_INT) MODE4(C2K_DM_EINT3) MODE5() MODE6(EVR_RESET_BAR) MODE7(DBG_MON_B3) 117 35 +GPIO118 = MODE0(GPIO118) MODE1(UTXD2) MODE2(URXD2) MODE3(MD_UTXD2) MODE4(TP_UTXD1_AO) MODE5(I2S1_MCK) MODE6() MODE7(DBG_MON_B4) 118 36 +GPIO119 = MODE0(GPIO119) MODE1(URXD2) MODE2(UTXD2) MODE3(MD_URXD2) MODE4(TP_URXD1_AO) MODE5(I2S2_MCK) MODE6() MODE7(DBG_MON_B5) 119 36 +GPIO120 = MODE0(GPIO120) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B6) 120 37 +GPIO121 = MODE0(GPIO121) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B7) 121 37 +GPIO122 = MODE0(GPIO122) MODE1(UTXD0) MODE2(PWRMCU_UTXD2_AO) MODE3(MD_UTXD0) MODE4(MD_URXD1) MODE5(C2K_UTXD0) MODE6() MODE7(DBG_MON_B8) 122 38 +GPIO123 = MODE0(GPIO123) MODE1(URXD0) MODE2(PWRMCU_URXD2_AO) MODE3(MD_URXD0) MODE4(MD_UTXD1) MODE5(C2K_URXD0) MODE6() MODE7(DBG_MON_B9) 123 38 +GPIO124 = MODE0(GPIO124) MODE1(SPI2_CS_A) MODE2(TP_GPIO0_AO) MODE3(URXD0) MODE4(SCP_SPI2_CS) MODE5(TP_URTS2_AO) MODE6(MD_INT1) MODE7(DBG_MON_B10) 124 39 +GPIO125 = MODE0(GPIO125) MODE1(SPI2_CK_A) MODE2(TP_GPIO1_AO) MODE3(UCTS3) MODE4(SCP_SPI2_CK) MODE5() MODE6(MD_INT0) MODE7(DBG_MON_B11) 125 39 +GPIO126 = MODE0(GPIO126) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B12) 126 40 +GPIO127 = MODE0(GPIO127) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B13) 127 40 +GPIO128 = MODE0(GPIO128) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6(AUXIF_CLK0) MODE7(DBG_MON_B14) 128 41 +GPIO129 = MODE0(GPIO129) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6(AUXIF_ST0) MODE7(DBG_MON_B15) 129 41 +GPIO130 = MODE0(GPIO130) MODE1(MD_INT1) MODE2(MD_INT1_C2K_UIM1_HOT_PLUG_IN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) 130 42 +GPIO131 = MODE0(GPIO131) MODE1(MD_INT0) MODE2(MD_INT0_C2K_UIM0_HOT_PLUG_IN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B17) 131 43 +GPIO132 = MODE0(GPIO132) MODE1(SPI2_MO_A) MODE2(IRTX_OUT) MODE3(UTXD0) MODE4(SCP_SPI2_MO) MODE5(TP_UCTS2_AO) MODE6(PWM4) MODE7(DBG_MON_B18) 132 44 +GPIO133 = MODE0(GPIO133) MODE1(SPI2_MI_A) MODE2() MODE3(URTS3) MODE4(SCP_SPI2_MI) MODE5() MODE6() MODE7(DBG_MON_B19) 133 44 +GPIO134 = MODE0(GPIO134) MODE1(MD1_SIM2_SCLK) MODE2(MD1_SIM1_SCLK) MODE3(C2K_UIM1_CLK) MODE4(C2K_UIM0_CLK) MODE5(IPU_JTAG_TRST) MODE6(CCU_JTAG_TRST) MODE7(DBG_MON_B20) 134 45 +GPIO135 = MODE0(GPIO135) MODE1(MD1_SIM2_SRST) MODE2(MD1_SIM1_SRST) MODE3(C2K_UIM1_RST) MODE4(C2K_UIM0_RST) MODE5(IPU_JTAG_TDO) MODE6(CCU_JTAG_TDO) MODE7(DBG_MON_B21) 135 45 +GPIO136 = MODE0(GPIO136) MODE1(MD1_SIM2_SIO) MODE2(MD1_SIM1_SIO) MODE3(C2K_UIM1_IO) MODE4(C2K_UIM0_IO) MODE5(IPU_JTAG_TDI) MODE6(CCU_JTAG_TDI) MODE7(DBG_MON_B22) 136 45 +GPIO137 = MODE0(GPIO137) MODE1(MD1_SIM1_SCLK) MODE2(MD1_SIM2_SCLK) MODE3(C2K_UIM0_CLK) MODE4(C2K_UIM1_CLK) MODE5(IPU_JTAG_TCK) MODE6(CCU_JTAG_TCK) MODE7(DBG_MON_B23) 137 46 +GPIO138 = MODE0(GPIO138) MODE1(MD1_SIM1_SRST) MODE2(MD1_SIM2_SRST) MODE3(C2K_UIM0_RST) MODE4(C2K_UIM1_RST) MODE5(IPU_JTAG_TMS) MODE6(CCU_JTAG_TMS) MODE7(DBG_MON_B24) 138 46 +GPIO139 = MODE0(GPIO139) MODE1(MD1_SIM1_SIO) MODE2(MD1_SIM2_SIO) MODE3(C2K_UIM0_IO) MODE4(C2K_UIM1_IO) MODE5() MODE6() MODE7(DBG_MON_B25) 139 46 +GPIO140 = MODE0(GPIO140) MODE1(MSDC1_CLK) MODE2(PWM6) MODE3(PCM1_CLK) MODE4(AUDIODSP_JTAG_TCK) MODE5(C2K_DM_OTCK) MODE6(UDI_TCK_XI) MODE7(DBG_MON_B26) 140 47 +GPIO141 = MODE0(GPIO141) MODE1(MSDC1_DAT3) MODE2() MODE3(PCM1_SYNC) MODE4() MODE5() MODE6() MODE7(DBG_MON_B27) 141 48 +GPIO142 = MODE0(GPIO142) MODE1(MSDC1_DAT2) MODE2(SPI4_CK) MODE3(PCM1_DI) MODE4(AUDIODSP_JTAG_TRSTN) MODE5(C2K_DM_JTINTP) MODE6(UDI_NTRST) MODE7(DBG_MON_B28) 142 48 +GPIO143 = MODE0(GPIO143) MODE1(MSDC1_DAT1) MODE2(SPI4_MI) MODE3(PCM1_DO0) MODE4(AUDIODSP_JTAG_TDO) MODE5(C2K_DM_OTDO) MODE6(UDI_TDO) MODE7(DBG_MON_B29) 143 48 +GPIO144 = MODE0(GPIO144) MODE1(MSDC1_DAT0) MODE2(SPI4_MO) MODE3(PCM1_DO1) MODE4(AUDIODSP_JTAG_TDI) MODE5(C2K_DM_OTDI) MODE6(UDI_TDI) MODE7(DBG_MON_B30) 144 48 +GPIO145 = MODE0(GPIO145) MODE1(MSDC1_CMD) MODE2(SPI4_CS) MODE3(PCM1_DO2) MODE4(AUDIODSP_JTAG_TMS) MODE5(C2K_DM_OTMS) MODE6(UDI_TMS) MODE7(DBG_MON_B31) 145 49 +GPIO146 = MODE0(GPIO146) MODE1(SDA6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 146 50 +GPIO147 = MODE0(GPIO147) MODE1(SCL6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 147 50 +GPIO148 = MODE0(GPIO148) MODE1(SDA7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 148 51 +GPIO149 = MODE0(GPIO149) MODE1(SCL7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 149 51 +GPIO150 = MODE0(GPIO150) MODE1(SDA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(AUXIF_ST1) 150 52 +GPIO151 = MODE0(GPIO151) MODE1(SCL4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(AUXIF_CLK1) 151 52 +GPIO152 = MODE0(GPIO152) MODE1(SPI9_MI) MODE2(SPI9_MO) MODE3() MODE4() MODE5() MODE6() MODE7() 152 53 +GPIO153 = MODE0(GPIO153) MODE1(SPI9_MO) MODE2(SPI9_MI) MODE3() MODE4() MODE5() MODE6() MODE7() 153 53 +GPIO154 = MODE0(GPIO154) MODE1(SPI9_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 154 53 +GPIO155 = MODE0(GPIO155) MODE1(SPI9_CS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 155 53 +GPIO156 = MODE0(GPIO156) MODE1(SCP_VREQ_VAO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 156 53 +GPIO157 = MODE0(GPIO157) MODE1(DPI_D0) MODE2(SPI1_CS_B) MODE3(PMIC_MFG_BOOST) MODE4() MODE5(DAP_DSP1_SWCLKTCK) MODE6() MODE7() 157 54 +GPIO158 = MODE0(GPIO158) MODE1(DPI_D1) MODE2(SPI1_MO_B) MODE3(C2K_CVSD_INT) MODE4() MODE5(DAP_DSP1_SWDITMS) MODE6() MODE7() 158 54 +GPIO159 = MODE0(GPIO159) MODE1(DPI_D2) MODE2(SPI1_MI_B) MODE3(MD_INT1) MODE4() MODE5(DAP_DSP2_SWCLKTCK) MODE6() MODE7() 159 54 +GPIO160 = MODE0(GPIO160) MODE1(DPI_D3) MODE2(SPI1_CK_B) MODE3(MD_INT0) MODE4() MODE5(DAP_DSP2_SWDITMS) MODE6() MODE7() 160 54 +GPIO161 = MODE0(GPIO161) MODE1(DPI_D4) MODE2(CLKM0) MODE3(IPU_JTAG_TCK) MODE4(C2K_TCK) MODE5(IO_JTAG_TCK) MODE6(PWRMCU_JTAG_TCK) MODE7(CCU_JTAG_TCK) 161 54 +GPIO162 = MODE0(GPIO162) MODE1(DPI_D5) MODE2(CLKM1) MODE3(IPU_JTAG_TRST) MODE4(C2K_NTRST) MODE5(IO_JTAG_NTRST) MODE6(PWRMCU_JTAG_TRSTN) MODE7(CCU_JTAG_TRST) 162 54 +GPIO163 = MODE0(GPIO163) MODE1(DPI_D6) MODE2(CLKM2) MODE3(IPU_JTAG_TDI) MODE4(C2K_TDI) MODE5(IO_JTAG_TDI) MODE6(PWRMCU_JTAG_TDI) MODE7(CCU_JTAG_TDI) 163 54 +GPIO164 = MODE0(GPIO164) MODE1(DPI_D7) MODE2(CLKM3) MODE3(IPU_JTAG_TMS) MODE4(C2K_TMS) MODE5(IO_JTAG_TMS) MODE6(PWRMCU_JTAG_TMS) MODE7(CCU_JTAG_TMS) 164 54 +GPIO165 = MODE0(GPIO165) MODE1(DPI_D8) MODE2(CLKM4) MODE3(IPU_JTAG_TDO) MODE4(C2K_TDO) MODE5(IO_JTAG_TDO) MODE6(PWRMCU_JTAG_TDO) MODE7(CCU_JTAG_TDO) 165 54 +GPIO166 = MODE0(GPIO166) MODE1(DPI_D9) MODE2(CLKM5) MODE3(MD_INT1) MODE4(C2K_RTCK) MODE5() MODE6() MODE7() 166 54 +GPIO167 = MODE0(GPIO167) MODE1(DPI_D10) MODE2() MODE3(MD_INT0) MODE4(SPI6_CK) MODE5() MODE6() MODE7() 167 54 +GPIO168 = MODE0(GPIO168) MODE1(DPI_D11) MODE2(IRTX_OUT) MODE3(PWM3) MODE4(SPI6_MI) MODE5() MODE6() MODE7() 168 54 +GPIO169 = MODE0(GPIO169) MODE1(DPI_HSYNC) MODE2(I2S0_LRCK) MODE3() MODE4(SPI6_MO) MODE5() MODE6() MODE7() 169 54 +GPIO170 = MODE0(GPIO170) MODE1(DPI_VSYNC) MODE2(I2S0_BCK) MODE3(GPS_FRAME_SYNC) MODE4(SPI6_CS) MODE5() MODE6() MODE7() 170 54 +GPIO171 = MODE0(GPIO171) MODE1(DPI_DE) MODE2(I2S0_MCK) MODE3(MD_URXD2) MODE4(KPROW7) MODE5() MODE6() MODE7() 171 54 +GPIO172 = MODE0(GPIO172) MODE1(DPI_CK) MODE2(I2S0_DI) MODE3(MD_UTXD2) MODE4(KPROW6) MODE5() MODE6() MODE7() 172 54 +GPIO173 = MODE0(GPIO173) MODE1(TDM_LRCK) MODE2(CMFLASH) MODE3(PWM0) MODE4(PCM1_CLK) MODE5() MODE6() MODE7() 173 55 +GPIO174 = MODE0(GPIO174) MODE1(TDM_BCK) MODE2(SPI2_CK_B) MODE3(PWM1) MODE4(PCM1_SYNC) MODE5() MODE6(C2K_EINT0) MODE7() 174 56 +GPIO175 = MODE0(GPIO175) MODE1(TDM_MCK) MODE2(SPI2_MI_B) MODE3(PWM2) MODE4(PCM1_DI) MODE5() MODE6(C2K_EINT1) MODE7(SPI8_MI_A) 175 56 +GPIO176 = MODE0(GPIO176) MODE1(TDM_DATA0) MODE2(SPI2_MO_B) MODE3(PWM3) MODE4(PCM1_DO0) MODE5(PCM0_SYNC) MODE6(C2K_DM_EINT0) MODE7() 176 55 +GPIO177 = MODE0(GPIO177) MODE1(TDM_DATA1) MODE2(SPI2_CS_B) MODE3(PWM4) MODE4(PCM1_DO1) MODE5(PCM0_CLK) MODE6(C2K_DM_EINT1) MODE7(SPI8_MO_A) 177 55 +GPIO178 = MODE0(GPIO178) MODE1(TDM_DATA2) MODE2(MD_INT1) MODE3(PWM5) MODE4(PCM1_DO2) MODE5(PCM0_DI) MODE6(C2K_DM_EINT2) MODE7(SPI8_CK_A) 178 55 +GPIO179 = MODE0(GPIO179) MODE1(TDM_DATA3) MODE2(MD_INT0) MODE3(PWM6) MODE4(PMIC_MFG_BOOST) MODE5(PCM0_DO) MODE6(C2K_DM_EINT3) MODE7(SPI8_CS_A) 179 55 +GPIO180 = MODE0(GPIO180) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 180 57 +GPIO181 = MODE0(GPIO181) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 181 57 +GPIO182 = MODE0(GPIO182) MODE1(SPI3_CS_A) MODE2(DISP_PWM1) MODE3(KPCOL6) MODE4(SPI8_CS_B) MODE5() MODE6() MODE7() 182 58 +GPIO183 = MODE0(GPIO183) MODE1(SPI3_MO_A) MODE2(SPI3_MI_A) MODE3(KPCOL5) MODE4(SPI8_MO_B) MODE5() MODE6() MODE7() 183 58 +GPIO184 = MODE0(GPIO184) MODE1(SPI3_MI_A) MODE2(SPI3_MO_A) MODE3(KPCOL4) MODE4(SPI8_MI_B) MODE5() MODE6() MODE7() 184 58 +GPIO185 = MODE0(GPIO185) MODE1(SPI3_CK_A) MODE2(MD_INT2) MODE3(KPCOL3) MODE4(SPI8_CK_B) MODE5() MODE6() MODE7() 185 58 +GPIO186 = MODE0(GPIO186) MODE1(SCL5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 186 59 +GPIO187 = MODE0(GPIO187) MODE1(SDA5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 187 59 +GPIO188 = MODE0(GPIO188) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 188 60 +GPIO189 = MODE0(GPIO189) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 189 60 +GPIO190 = MODE0(GPIO190) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 190 60 +GPIO191 = MODE0(GPIO191) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 191 60 +GPIO192 = MODE0(GPIO192) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 192 60 +GPIO193 = MODE0(GPIO193) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 193 60 +GPIO194 = MODE0(GPIO194) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 194 60 +GPIO195 = MODE0(GPIO195) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 195 60 +GPIO196 = MODE0(GPIO196) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 196 60 +GPIO197 = MODE0(GPIO197) MODE1(BPI_BUS9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 197 60 +GPIO198 = MODE0(GPIO198) MODE1(BPI_BUS10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 198 61 +GPIO199 = MODE0(GPIO199) MODE1(BPI_BUS11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 199 61 +GPIO200 = MODE0(GPIO200) MODE1(BPI_BUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 200 61 +GPIO201 = MODE0(GPIO201) MODE1(BPI_BUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 201 61 +GPIO202 = MODE0(GPIO202) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 202 62 +GPIO203 = MODE0(GPIO203) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 203 62 +GPIO204 = MODE0(GPIO204) MODE1(MIPI2_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 204 62 +GPIO205 = MODE0(GPIO205) MODE1(MIPI2_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 205 62 +GPIO206 = MODE0(GPIO206) MODE1(MIPI3_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 206 62 +GPIO207 = MODE0(GPIO207) MODE1(MIPI3_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 207 62 +GPIO208 = MODE0(GPIO208) MODE1(RFIC_BSI_1_EN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 208 63 +GPIO209 = MODE0(GPIO209) MODE1(RFIC_BSI_1_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 209 63 +GPIO210 = MODE0(GPIO210) MODE1(RFIC_BSI_1_D0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 210 63 +GPIO211 = MODE0(GPIO211) MODE1(RFIC_BSI_1_D1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 211 63 +GPIO212 = MODE0(GPIO212) MODE1(RFIC_BSI_1_D2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 212 63 +GPIO213 = MODE0(GPIO213) MODE1(I2S1_MCK_ANA) MODE2(I2S3_MCK) MODE3(I2S1_MCK) MODE4(I2S2_MCK) MODE5(I2S0_MCK) MODE6() MODE7() 213 64 +GPIO214 = MODE0(GPIO214) MODE1(ANC_DAT_MOSI) MODE2() MODE3() MODE4(I2S3_LRCK) MODE5() MODE6(UFS_UNIPRO_SDA) MODE7(DBG_MON_A43) -1 65 +GPIO215 = MODE0(GPIO215) MODE1(AUD_DAT_MOSI1) MODE2(AUD_DAT_MISO1) MODE3() MODE4(I2S3_BCK) MODE5() MODE6(UFS_UNIPRO_SCL) MODE7(DBG_MON_A44) -1 65 +GPIO216 = MODE0(GPIO216) MODE1(AUD_DAT_MISO2) MODE2(VOW_DAT_MISO) MODE3() MODE4(I2S3_MCK) MODE5() MODE6(UFS_MPHY_SDA) MODE7(DBG_MON_A45) -1 65 +GPIO217 = MODE0(GPIO217) MODE1(AUD_DAT_MISO1) MODE2(VOW_DAT_MISO) MODE3(AUD_DAT_MOSI1) MODE4(I2S3_DO) MODE5() MODE6(UFS_MPHY_SCL) MODE7(DBG_MON_A46) -1 65 +GPIO218 = MODE0(GPIO218) MODE1(AUD_CLK_MOSI) MODE2() MODE3() MODE4(I2S2_DI1) MODE5() MODE6() MODE7(DBG_MON_A47) -1 66 +GPIO219 = MODE0(GPIO219) MODE1(VOW_CLK_MISO) MODE2() MODE3() MODE4(I2S2_DI2) MODE5() MODE6() MODE7(DBG_MON_A48) -1 65 +GPIO220 = MODE0(GPIO220) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO221 = MODE0(GPIO221) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO222 = MODE0(GPIO222) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO223 = MODE0(GPIO223) MODE1(SRCLKENAI1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO224 = MODE0(GPIO224) MODE1(SRCLKENAI0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO225 = MODE0(GPIO225) MODE1(DISP_PWM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO226 = MODE0(GPIO226) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO227 = MODE0(GPIO227) MODE1(PMIC_MFG_BOOST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 68 +GPIO228 = MODE0(GPIO228) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 69 +GPIO229 = MODE0(GPIO229) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 69 +GPIO230 = MODE0(GPIO230) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() -1 69 +GPIO231 = MODE0(GPIO231) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() -1 69 + +[GPIO_EXT] +mipi_pins=29:30:31:32:33:34:35:36:37:38:202:203:204:205:206:207 + +[EINT] +EINT_COUNT = 232 +BUILTIN_EINT = 216/PWRAP_SPI0_MO:217/PWRAP_SPI0_MI:218/URXD:219/IDDIG +BUILTIN_216 = 230/1:231/2 +BUILTIN_217 = 230/2:231/1 +BUILTIN_218 = 67/1:68/2:89/3 +BUILTIN_219 = 94/6 +INTERNAL_EINT = 220/220:221/221:222/222:223/223:224/224:225/225:226/226:227/227:228/228 + +[EINT_MD1] +EINT_MD1_COUNT = 4 + +[ADC] +ADC_COUNT = 5 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 4 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 10 + +[CLK_BUF] +CLK_BUF_COUNT = 7 +DRIVING_CURRENT_PMIC_CLK_BUF1=2:0:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF2=1:0:AutoK:0.8:1.6:2.4:3.2 +DRIVING_CURRENT_PMIC_CLK_BUF3=1:0:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF4=2:0:AutoK:0.8:1.6:2.4:3.2 +DRIVING_CURRENT_PMIC_CLK_BUF5=0:0:AutoK:1.4:1.9:2.4:2.9 +DRIVING_CURRENT_PMIC_CLK_BUF6=1:0:AutoK:1.4:1.9:2.4:2.9 +DRIVING_CURRENT_PMIC_CLK_BUF7=1:0:AutoK:0.4:0.9:1.4:1.9 + +[SRC_PIN] +GPIO117::PAD_KPCOL2=2 +GPIO130::PAD_INT_SIM2=1 +GPIO131::PAD_INT_SIM1=0 +GPIO185::PAD_SPI3_CK=2 + +[POWER] +POWER_COUNT=5 +DVDD28_SIM1=VIO18:VIO28 +DVDD28_SIM2=VIO18:VIO28 +DVDD28_MC1=VIO18:VIO28 +DVDD28_MC2=VIO18:VIO28 +DVSS12_IOAUD=VIO12:VIO18 + diff --git a/tools/dct/config/MT6750S.fig b/tools/dct/config/MT6750S.fig new file mode 100644 index 000000000000..77af88d51d20 --- /dev/null +++ b/tools/dct/config/MT6750S.fig @@ -0,0 +1,259 @@ +[Chip Type] +Chip = MT6750S +GPIO_ModeNum = 8 +PMIC_APP_COUNT = 6 +I2C_BUS = 0 +GPIO_IES = 0 +MD1_EINT_SRC_PIN = 1 +MD1_EINT_DED_EN = 1 +MD1_EINT_SKT_TYPE = 1 +KPD_EXTEND_ENABLE = 1 + + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1() MODE2(EXT_FRAME_SYNC) MODE3(CLKM0) MODE4(IDDIG) MODE5(C2K_EINT0) MODE6(I2S3_MCK) MODE7() 0 0 +GPIO1 = MODE0(GPIO1) MODE1() MODE2(EXT_FRAME_SYNC) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5(C2K_EINT1) MODE6(I2S3_BCK) MODE7() 1 0 +GPIO2 = MODE0(GPIO2) MODE1(CMFLASH) MODE2(UTXD1) MODE3(CLKM2) MODE4(MD_URXD2) MODE5(C2K_UTXD1) MODE6(I2S3_LRCK) MODE7() 2 0 +GPIO3 = MODE0(GPIO3) MODE1(PWM_A) MODE2(URXD1) MODE3(CLKM3) MODE4(MD_UTXD2) MODE5(C2K_URXD1) MODE6(I2S3_DO) MODE7(SPI1_B_MI) 3 0 +GPIO4 = MODE0(GPIO4) MODE1(PWM_B) MODE2(I2S0_MCK) MODE3(UCTS0) MODE4(MD_URXD1) MODE5(C2K_UTXD0) MODE6(ANT_SEL3) MODE7(SPI1_B_MI) 4 1 +GPIO5 = MODE0(GPIO5) MODE1(PWM_C) MODE2(I2S0_BCK) MODE3(URTS0) MODE4(MD_UTXD1) MODE5(C2K_URXD0) MODE6(ANT_SEL4) MODE7(SPI1_B_CSB) 5 1 +GPIO6 = MODE0(GPIO6) MODE1(IRTX_OUT) MODE2(I2S0_LRCK) MODE3(IDDIG) MODE4(MD_URXD0) MODE5(SDA0) MODE6(ANT_SEL5) MODE7(SPI1_B_MO) 6 1 +GPIO7 = MODE0(GPIO7) MODE1(IRTX_OUT) MODE2(I2S0_DI) MODE3(USB_DRVVBUS) MODE4(MD_UTXD0) MODE5(SCL0) MODE6(PCC_PPC_IO) MODE7(SPI1_B_CLK) 7 1 +GPIO8 = MODE0(GPIO8) MODE1(PWM_A) MODE2(PCC_PPC_IO) MODE3() MODE4(CONN_MCU_TRST_B) MODE5(C2K_DM_JTINTP) MODE6(IO_JTAG_TRSTN) MODE7(DBG_MON_A44) 8 2 +GPIO9 = MODE0(GPIO9) MODE1(PWM_B) MODE2(UCTS1) MODE3(DAP_SIB1_SWD) MODE4(CONN_MCU_DBGACK_N) MODE5(IRTX_OUT) MODE6() MODE7(DBG_MON_A45) 9 3 +GPIO10 = MODE0(GPIO10) MODE1(PWM_C) MODE2(URTS1) MODE3(DAP_SIB1_SWCK) MODE4(CONN_MCU_DBGI_N) MODE5(EXT_FRAME_SYNC) MODE6() MODE7(DBG_MON_A46) 10 3 +GPIO11 = MODE0(GPIO11) MODE1(IRTX_OUT) MODE2(IDDIG) MODE3(I2S1_MCK) MODE4(PWM_B) MODE5(CLKM0) MODE6(SRCLKENAI1) MODE7() 11 4 +GPIO12 = MODE0(GPIO12) MODE1(IRTX_OUT) MODE2(USB_DRVVBUS) MODE3(I2S2_DI) MODE4(PWM_C) MODE5(CLKM1) MODE6(CMFLASH) MODE7() 12 5 +GPIO13 = MODE0(GPIO13) MODE1(DPI_D0) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(MD_URXD0) MODE5(C2K_EINT0) MODE6(I2S0_MCK) MODE7(DBG_MON_A19) 13 6 +GPIO14 = MODE0(GPIO14) MODE1(DPI_D1) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(MD_UTXD0) MODE5(C2K_EINT1) MODE6(I2S0_BCK) MODE7(DBG_MON_A20) 14 6 +GPIO15 = MODE0(GPIO15) MODE1(DPI_D2) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(MD_URXD1) MODE5(C2K_DM_EINT0) MODE6(I2S0_LRCK) MODE7(DBG_MON_A21) 15 6 +GPIO16 = MODE0(GPIO16) MODE1(DPI_D3) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(MD_UTXD1) MODE5(C2K_DM_EINT1) MODE6(I2S0_DI) MODE7(DBG_MON_A22) 16 6 +GPIO17 = MODE0(GPIO17) MODE1(DPI_D4) MODE2(UCTS1) MODE3(CONN_MCU_TRST_B) MODE4(MD_URXD2) MODE5(C2K_URXD0) MODE6(I2S1_MCK) MODE7(DBG_MON_A23) 17 7 +GPIO18 = MODE0(GPIO18) MODE1(DPI_D5) MODE2(URTS1) MODE3(CONN_MCU_DBGI_N) MODE4(MD_UTXD2) MODE5(C2K_UTXD0) MODE6(I2S1_BCK) MODE7(DBG_MON_A24) 18 7 +GPIO19 = MODE0(GPIO19) MODE1(DPI_D6) MODE2(URXD1) MODE3(CONN_MCU_TDO) MODE4(MD_INT2_C2K_UIM1_HOT_PLUG) MODE5() MODE6(I2S1_LRCK) MODE7(DBG_MON_A25) 19 7 +GPIO20 = MODE0(GPIO20) MODE1(DPI_D7) MODE2(UTXD1) MODE3(CONN_MCU_DBGACK_N) MODE4(MD_INT1_C2K_UIM0_HOT_PLUG) MODE5() MODE6(I2S1_DO) MODE7(DBG_MON_A26) 20 7 +GPIO21 = MODE0(GPIO21) MODE1(DPI_D8) MODE2(SRCLKENAI1) MODE3(CONN_MCU_TMS) MODE4(DAP_SIB1_SWD) MODE5(CONN_MCU_AICE_TMSC) MODE6(I2S2_MCK) MODE7(DBG_MON_A27) 21 8 +GPIO22 = MODE0(GPIO22) MODE1(DPI_D9) MODE2(EXT_FRAME_SYNC) MODE3(CONN_MCU_TCK) MODE4(DAP_SIB1_SWCK) MODE5(CONN_MCU_AICE_TCKC) MODE6(I2S2_BCK) MODE7(DBG_MON_A28) 22 8 +GPIO23 = MODE0(GPIO23) MODE1(DPI_D10) MODE2(IDDIG) MODE3(CONN_MCU_TDI) MODE4() MODE5(PWM_B) MODE6(I2S2_LRCK) MODE7(DBG_MON_A29) 23 8 +GPIO24 = MODE0(GPIO24) MODE1(DPI_D11) MODE2(USB_DRVVBUS) MODE3(CONN_DSP_JCK) MODE4(SPI1_A_MI) MODE5(PWM_C) MODE6(I2S2_DI) MODE7(DBG_MON_A30) 24 8 +GPIO25 = MODE0(GPIO25) MODE1(DPI_HSYNC) MODE2(SPI1_A_MI) MODE3(CONN_DSP_JMS) MODE4(CLKM0) MODE5(C2K_UTXD1) MODE6(I2S3_MCK) MODE7(DBG_MON_A31) 25 9 +GPIO26 = MODE0(GPIO26) MODE1(DPI_VSYNC) MODE2(SPI1_A_CSB) MODE3(CONN_DSP_JDI) MODE4(CLKM1) MODE5(C2K_URXD1) MODE6(I2S3_BCK) MODE7(DBG_MON_A32) 26 9 +GPIO27 = MODE0(GPIO27) MODE1(DPI_DE) MODE2(SPI1_A_MO) MODE3(CONN_DSP_JDO) MODE4(CLKM2) MODE5(C2K_DM_EINT2) MODE6(I2S3_LRCK) MODE7(DBG_MON_A33) 27 9 +GPIO28 = MODE0(GPIO28) MODE1(DPI_CK) MODE2(SPI1_A_CLK) MODE3(CONN_DSP_JINTP) MODE4(CLKM3) MODE5(C2K_DM_EINT3) MODE6(I2S3_DO) MODE7(DBG_MON_A34) 28 9 +GPIO29 = MODE0(GPIO29) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 29 10 +GPIO30 = MODE0(GPIO30) MODE1(MSDC1_CLK) MODE2(IO_JTAG_TCK) MODE3() MODE4(CONN_DSP_JCK) MODE5(C2K_DM_OTCK) MODE6(C2K_TCK) MODE7(DBG_MON_A53) 30 11 +GPIO31 = MODE0(GPIO31) MODE1(MSDC1_DAT3) MODE2() MODE3(DAP_SIB1_SWD) MODE4(CONN_DSP_JINTP) MODE5(C2K_DM_JTINTP) MODE6(C2K_RTCK) MODE7(DBG_MON_A54) 31 12 +GPIO32 = MODE0(GPIO32) MODE1(MSDC1_CMD) MODE2(IO_JTAG_TMS) MODE3() MODE4(CONN_DSP_JMS) MODE5(C2K_DM_OTMS) MODE6(C2K_TMS) MODE7(DBG_MON_A55) 32 13 +GPIO33 = MODE0(GPIO33) MODE1(MSDC1_DAT0) MODE2(IO_JTAG_TDI) MODE3() MODE4(CONN_DSP_JDI) MODE5(C2K_DM_OTDI) MODE6(C2K_TDI) MODE7(DBG_MON_A56) 33 12 +GPIO34 = MODE0(GPIO34) MODE1(MSDC1_DAT2) MODE2(IO_JTAG_TRSTN) MODE3() MODE4() MODE5(DAP_SIB1_SWCK) MODE6(C2K_NTRST) MODE7(DBG_MON_A57) 34 12 +GPIO35 = MODE0(GPIO35) MODE1(MSDC1_DAT1) MODE2(IO_JTAG_TDO) MODE3() MODE4(CONN_DSP_JDO) MODE5(C2K_DM_OTDO) MODE6(C2K_TDO) MODE7(DBG_MON_A58) 35 12 +GPIO36 = MODE0(GPIO36) MODE1(MD1_SIM2_SIO) MODE2() MODE3(MD1_SIM1_SIO) MODE4() MODE5(C2K_UIM0_IO) MODE6(C2K_UIM1_IO) MODE7(DBG_MON_A38) 36 14 +GPIO37 = MODE0(GPIO37) MODE1(MD1_SIM2_SRST) MODE2() MODE3(MD1_SIM1_SRST) MODE4() MODE5(C2K_UIM0_RST) MODE6(C2K_UIM1_RST) MODE7(DBG_MON_A39) 37 14 +GPIO38 = MODE0(GPIO38) MODE1(MD1_SIM2_SCLK) MODE2() MODE3(MD1_SIM1_SCLK) MODE4() MODE5(C2K_UIM0_CLK) MODE6(C2K_UIM1_CLK) MODE7(DBG_MON_A40) 38 14 +GPIO39 = MODE0(GPIO39) MODE1(MD1_SIM1_SCLK) MODE2() MODE3(MD1_SIM2_SCLK) MODE4() MODE5(C2K_UIM0_CLK) MODE6(C2K_UIM1_CLK) MODE7(DBG_MON_A41) 39 15 +GPIO40 = MODE0(GPIO40) MODE1(MD1_SIM1_SRST) MODE2() MODE3(MD1_SIM2_SRST) MODE4() MODE5(C2K_UIM0_RST) MODE6(C2K_UIM1_RST) MODE7(DBG_MON_A42) 40 15 +GPIO41 = MODE0(GPIO41) MODE1(MD1_SIM1_SIO) MODE2() MODE3(MD1_SIM2_SIO) MODE4() MODE5(C2K_UIM0_IO) MODE6(C2K_UIM1_IO) MODE7(DBG_MON_A43) 41 15 +GPIO42 = MODE0(GPIO42) MODE1(IDDIG) MODE2(URXD1) MODE3(UCTS0) MODE4(SDA1) MODE5(EXT_FRAME_SYNC) MODE6(KPCOL2) MODE7(DBG_MON_A12) 42 16 +GPIO43 = MODE0(GPIO43) MODE1(USB_DRVVBUS) MODE2(UTXD1) MODE3(URTS0) MODE4(SCL1) MODE5(EXT_FRAME_SYNC) MODE6(KPROW2) MODE7(DBG_MON_A13) 43 16 +GPIO44 = MODE0(GPIO44) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A15) 44 17 +GPIO45 = MODE0(GPIO45) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(URXD1) MODE3(UCTS1) MODE4(CLKM0) MODE5() MODE6(IDDIG) MODE7(DBG_MON_A17) 45 18 +GPIO46 = MODE0(GPIO46) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2(UTXD1) MODE3(URTS1) MODE4(PWM_B) MODE5() MODE6(USB_DRVVBUS) MODE7(DBG_MON_A18) 46 18 +GPIO47 = MODE0(GPIO47) MODE1(SCL_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 47 19 +GPIO48 = MODE0(GPIO48) MODE1(SDA_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 48 19 +GPIO49 = MODE0(GPIO49) MODE1(SCL3) MODE2(IDDIG) MODE3() MODE4() MODE5() MODE6() MODE7() 49 20 +GPIO50 = MODE0(GPIO50) MODE1(SDA3) MODE2(IDDIG) MODE3() MODE4() MODE5() MODE6() MODE7() 50 20 +GPIO51 = MODE0(GPIO51) MODE1(BPI_BUS15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B0) 51 21 +GPIO52 = MODE0(GPIO52) MODE1(BPI_BUS14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B1) 52 21 +GPIO53 = MODE0(GPIO53) MODE1(BPI_BUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B2) 53 21 +GPIO54 = MODE0(GPIO54) MODE1(BPI_BUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B3) 54 21 +GPIO55 = MODE0(GPIO55) MODE1(BPI_BUS11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 55 21 +GPIO56 = MODE0(GPIO56) MODE1(BPI_BUS10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 56 21 +GPIO57 = MODE0(GPIO57) MODE1(BPI_BUS9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B4) 57 21 +GPIO58 = MODE0(GPIO58) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B5) 58 21 +GPIO59 = MODE0(GPIO59) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B6) 59 21 +GPIO60 = MODE0(GPIO60) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B7) 60 21 +GPIO61 = MODE0(GPIO61) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B8) 61 21 +GPIO62 = MODE0(GPIO62) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B9) 62 21 +GPIO63 = MODE0(GPIO63) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B10) 63 22 +GPIO64 = MODE0(GPIO64) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B11) 64 22 +GPIO65 = MODE0(GPIO65) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B12) 65 22 +GPIO66 = MODE0(GPIO66) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B13) 66 22 +GPIO67 = MODE0(GPIO67) MODE1(RFIC0_BSI_D2) MODE2(SPM_BSI_D2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B14) 67 23 +GPIO68 = MODE0(GPIO68) MODE1(RFIC0_BSI_D1) MODE2(SPM_BSI_D1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B15) 68 23 +GPIO69 = MODE0(GPIO69) MODE1(RFIC0_BSI_D0) MODE2(SPM_BSI_D0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) 69 23 +GPIO70 = MODE0(GPIO70) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 70 -1 +GPIO71 = MODE0(GPIO71) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 71 -1 +GPIO72 = MODE0(GPIO72) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 72 -1 +GPIO73 = MODE0(GPIO73) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 73 -1 +GPIO74 = MODE0(GPIO74) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 74 -1 +GPIO75 = MODE0(GPIO75) MODE1(MIPI3_SDATA) MODE2(PWM_C) MODE3(IRTX_OUT) MODE4(I2S0_DI) MODE5(I2S2_DI) MODE6(ANT_SEL5) MODE7(DBG_MON_B19) 75 24 +GPIO76 = MODE0(GPIO76) MODE1(MIPI3_SCLK) MODE2(CLKM3) MODE3(EXT_FRAME_SYNC) MODE4(I2S0_LRCK) MODE5(I2S2_LRCK) MODE6(ANT_SEL4) MODE7(DBG_MON_B20) 76 24 +GPIO77 = MODE0(GPIO77) MODE1(MIPI2_SDATA) MODE2(USB_DRVVBUS) MODE3(IRTX_OUT) MODE4(I2S0_BCK) MODE5(I2S2_BCK) MODE6(ANT_SEL3) MODE7(DBG_MON_B21) 77 24 +GPIO78 = MODE0(GPIO78) MODE1(MIPI2_SCLK) MODE2(IDDIG) MODE3(EXT_FRAME_SYNC) MODE4(I2S0_MCK) MODE5(I2S2_MCK) MODE6(PCM1_DO0) MODE7(DBG_MON_B22) 78 24 +GPIO79 = MODE0(GPIO79) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B23) 79 25 +GPIO80 = MODE0(GPIO80) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B24) 80 25 +GPIO81 = MODE0(GPIO81) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B25) 81 25 +GPIO82 = MODE0(GPIO82) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B26) 82 25 +GPIO83 = MODE0(GPIO83) MODE1(BPI_BUS23) MODE2(DET_BPI1) MODE3() MODE4(I2S3_DO) MODE5(I2S1_DO) MODE6(PCM1_DO1) MODE7(DBG_MON_B27) 83 26 +GPIO84 = MODE0(GPIO84) MODE1(BPI_BUS22) MODE2(DET_BPI0) MODE3() MODE4(I2S3_LRCK) MODE5(I2S1_LRCK) MODE6(PCM1_CLK) MODE7(DBG_MON_B28) 84 26 +GPIO85 = MODE0(GPIO85) MODE1(BPI_BUS21) MODE2(TX_SWAP3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B29) 85 26 +GPIO86 = MODE0(GPIO86) MODE1(BPI_BUS20) MODE2(TX_SWAP2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B30) 86 26 +GPIO87 = MODE0(GPIO87) MODE1(BPI_BUS19) MODE2(TX_SWAP1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B31) 87 27 +GPIO88 = MODE0(GPIO88) MODE1(BPI_BUS18) MODE2(TX_SWAP0) MODE3() MODE4() MODE5() MODE6() MODE7() 88 27 +GPIO89 = MODE0(GPIO89) MODE1(BPI_BUS17) MODE2(PA_VM1) MODE3() MODE4(I2S3_BCK) MODE5(I2S1_BCK) MODE6(PCM1_SYNC) MODE7() 89 27 +GPIO90 = MODE0(GPIO90) MODE1(BPI_BUS16) MODE2(PA_VM0) MODE3() MODE4(I2S3_MCK) MODE5(I2S1_MCK) MODE6(PCM1_DI) MODE7() 90 27 +GPIO91 = MODE0(GPIO91) MODE1(SDA1) MODE2(IDDIG) MODE3() MODE4() MODE5() MODE6() MODE7() 91 28 +GPIO92 = MODE0(GPIO92) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 92 29 +GPIO93 = MODE0(GPIO93) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 93 29 +GPIO94 = MODE0(GPIO94) MODE1(SCL1) MODE2(IDDIG) MODE3() MODE4() MODE5() MODE6() MODE7() 94 28 +GPIO95 = MODE0(GPIO95) MODE1(SPI0_MI) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(I2S1_BCK) MODE5(SPI0_MO) MODE6(DFD_TDO) MODE7(JTDO_SEL1) 95 30 +GPIO96 = MODE0(GPIO96) MODE1(SPI0_CSB) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(I2S1_LRCK) MODE5(SDA2) MODE6(DFD_TMS) MODE7(JTMS_SEL1) 96 30 +GPIO97 = MODE0(GPIO97) MODE1(SPI0_MO) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(I2S1_DO) MODE5(SPI0_MI) MODE6(DFD_TDI) MODE7(JTDI_SEL1) 97 30 +GPIO98 = MODE0(GPIO98) MODE1(SPI0_CLK) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(I2S1_MCK) MODE5(SCL2) MODE6(DFD_TCK_XI) MODE7(JTCK_SEL1) 98 30 +GPIO99 = MODE0(GPIO99) MODE1(SRCLKENAI0) MODE2(UTXD1) MODE3(EXT_FRAME_SYNC) MODE4(CLKM2) MODE5(PCC_PPC_IO) MODE6(ANT_SEL3) MODE7(SPI0_MI) 99 31 +GPIO100 = MODE0(GPIO100) MODE1(PWM_A) MODE2(URXD1) MODE3(MD_INT0) MODE4(CLKM3) MODE5(MD_INT2_C2K_UIM1_HOT_PLUG) MODE6(ANT_SEL4) MODE7(DBG_MON_A35) 100 31 +GPIO101 = MODE0(GPIO101) MODE1(KPROW1) MODE2(IRTX_OUT) MODE3(C2K_UTXD1) MODE4(C2K_UTXD0) MODE5(C2K_DM_EINT2) MODE6(ANT_SEL5) MODE7(DBG_MON_A36) 101 32 +GPIO102 = MODE0(GPIO102) MODE1(KPROW0) MODE2() MODE3() MODE4() MODE5(C2K_DM_EINT3) MODE6() MODE7(DBG_MON_A37) 102 32 +GPIO103 = MODE0(GPIO103) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5(C2K_DM_EINT0) MODE6() MODE7() 103 32 +GPIO104 = MODE0(GPIO104) MODE1(KPCOL1) MODE2() MODE3(C2K_URXD1) MODE4(C2K_URXD0) MODE5(C2K_DM_EINT1) MODE6() MODE7() 104 32 +GPIO105 = MODE0(GPIO105) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD0) MODE4(MD_URXD1) MODE5(C2K_URXD0) MODE6(MD_URXD2) MODE7(C2K_URXD1) 105 33 +GPIO106 = MODE0(GPIO106) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD0) MODE4(MD_UTXD1) MODE5(C2K_UTXD0) MODE6(MD_UTXD2) MODE7(C2K_UTXD1) 106 33 +GPIO107 = MODE0(GPIO107) MODE1(UCTS0) MODE2(I2S2_MCK) MODE3() MODE4(CONN_MCU_TDO) MODE5(C2K_DM_OTDO) MODE6(IO_JTAG_TDO) MODE7(DBG_MON_A6) 107 34 +GPIO108 = MODE0(GPIO108) MODE1(URTS0) MODE2(I2S2_BCK) MODE3() MODE4(CONN_MCU_TMS) MODE5(C2K_DM_OTMS) MODE6(IO_JTAG_TMS) MODE7(DBG_MON_A7) 108 34 +GPIO109 = MODE0(GPIO109) MODE1(CMMCLK1) MODE2(PWM_C) MODE3(MD_INT0) MODE4(CONN_MCU_AICE_TCKC) MODE5(MD_INT1_C2K_UIM0_HOT_PLUG) MODE6(CMFLASH) MODE7(DBG_MON_A9) 109 35 +GPIO110 = MODE0(GPIO110) MODE1(CLKM2) MODE2(I2S2_LRCK) MODE3() MODE4(CONN_MCU_TCK) MODE5(C2K_DM_OTCK) MODE6(IO_JTAG_TCK) MODE7(DBG_MON_A10) 110 36 +GPIO111 = MODE0(GPIO111) MODE1(CLKM1) MODE2(I2S2_DI) MODE3() MODE4(CONN_MCU_TDI) MODE5(C2K_DM_OTDI) MODE6(IO_JTAG_TDI) MODE7(DBG_MON_A11) 111 36 +GPIO112 = MODE0(GPIO112) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 112 37 +GPIO113 = MODE0(GPIO113) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 113 37 +GPIO114 = MODE0(GPIO114) MODE1(ANT_SEL0) MODE2(PWM_A) MODE3(CLKM0) MODE4(IRTX_OUT) MODE5(PCC_PPC_IO) MODE6() MODE7(DBG_MON_A47) 114 38 +GPIO115 = MODE0(GPIO115) MODE1(ANT_SEL1) MODE2(PWM_B) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5(DAP_SIB1_SWD) MODE6() MODE7(DBG_MON_A48) 115 38 +GPIO116 = MODE0(GPIO116) MODE1(ANT_SEL2) MODE2(PWM_C) MODE3(CLKM2) MODE4(IDDIG) MODE5(DAP_SIB1_SWCK) MODE6(IRTX_OUT) MODE7(DBG_MON_A49) 116 38 +GPIO117 = MODE0(GPIO117) MODE1(F2W_DATA) MODE2(PTA_TXD) MODE3(PTA_RXD) MODE4(AUXIF_ST0) MODE5(C2K_UTXD1) MODE6(SDA0) MODE7(DBG_MON_A50) 117 39 +GPIO118 = MODE0(GPIO118) MODE1(F2W_CK) MODE2(PTA_RXD) MODE3(PTA_TXD) MODE4(AUXIF_CLK0) MODE5(C2K_URXD1) MODE6(SCL0) MODE7(DBG_MON_A51) 118 39 +GPIO119 = MODE0(GPIO119) MODE1(WB_RSTB) MODE2(URXD1) MODE3(UTXD1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A52) 119 40 +GPIO120 = MODE0(GPIO120) MODE1(WB_SCLK) MODE2(UTXD1) MODE3(URXD1) MODE4() MODE5() MODE6() MODE7() 120 40 +GPIO121 = MODE0(GPIO121) MODE1(WB_SDATA) MODE2(AGPS_SYNC) MODE3() MODE4(AUXIF_ST1) MODE5(C2K_UTXD0) MODE6(SDA1) MODE7() 121 40 +GPIO122 = MODE0(GPIO122) MODE1(WB_SEN) MODE2(SRCLKENAI1) MODE3() MODE4(AUXIF_CLK1) MODE5(C2K_URXD0) MODE6(SCL1) MODE7() 122 40 +GPIO123 = MODE0(GPIO123) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 123 -1 +GPIO124 = MODE0(GPIO124) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 124 -1 +GPIO125 = MODE0(GPIO125) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 125 -1 +GPIO126 = MODE0(GPIO126) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 126 -1 +GPIO127 = MODE0(GPIO127) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 127 -1 +GPIO128 = MODE0(GPIO128) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 128 -1 +GPIO129 = MODE0(GPIO129) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 129 -1 +GPIO130 = MODE0(GPIO130) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 130 -1 +GPIO131 = MODE0(GPIO131) MODE1(WB_CTRL0) MODE2(MSDC2_DAT1) MODE3() MODE4() MODE5(C2K_NTRST) MODE6() MODE7() 131 41 +GPIO132 = MODE0(GPIO132) MODE1(WB_CTRL1) MODE2(MSDC2_CMD) MODE3() MODE4() MODE5(C2K_TCK) MODE6() MODE7() 132 42 +GPIO133 = MODE0(GPIO133) MODE1(WB_CTRL2) MODE2(MSDC2_CLK) MODE3() MODE4() MODE5(C2K_TDI) MODE6() MODE7() 133 43 +GPIO134 = MODE0(GPIO134) MODE1(WB_CTRL3) MODE2(MSDC2_DAT3) MODE3() MODE4() MODE5(C2K_TMS) MODE6() MODE7() 134 41 +GPIO135 = MODE0(GPIO135) MODE1(WB_CTRL4) MODE2(MSDC2_DAT0) MODE3() MODE4() MODE5(C2K_TDO) MODE6() MODE7() 135 41 +GPIO136 = MODE0(GPIO136) MODE1(WB_CTRL5) MODE2(MSDC2_DAT2) MODE3() MODE4() MODE5(C2K_RTCK) MODE6() MODE7() 136 41 +GPIO137 = MODE0(GPIO137) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 137 -1 +GPIO138 = MODE0(GPIO138) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 138 -1 +GPIO139 = MODE0(GPIO139) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 139 -1 +GPIO140 = MODE0(GPIO140) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 140 -1 +GPIO141 = MODE0(GPIO141) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 141 -1 +GPIO142 = MODE0(GPIO142) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 142 -1 +GPIO143 = MODE0(GPIO143) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 143 -1 +GPIO144 = MODE0(GPIO144) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 144 -1 +GPIO145 = MODE0(GPIO145) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 145 -1 +GPIO146 = MODE0(GPIO146) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 146 -1 +GPIO147 = MODE0(GPIO147) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 147 44 +GPIO148 = MODE0(GPIO148) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 148 45 +GPIO149 = MODE0(GPIO149) MODE1(AUD_CLK_MOSI) MODE2() MODE3(I2S1_BCK) MODE4() MODE5() MODE6() MODE7() 149 46 +GPIO150 = MODE0(GPIO150) MODE1(AUD_DAT_MOSI) MODE2(AUD_DAT_MISO) MODE3(I2S1_LRCK) MODE4() MODE5() MODE6() MODE7() 150 46 +GPIO151 = MODE0(GPIO151) MODE1(AUD_DAT_MISO) MODE2(AUD_DAT_MOSI) MODE3(I2S1_DO) MODE4() MODE5() MODE6() MODE7() 151 46 +GPIO152 = MODE0(GPIO152) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() 152 47 +GPIO153 = MODE0(GPIO153) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 153 47 +GPIO154 = MODE0(GPIO154) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() 154 47 +GPIO155 = MODE0(GPIO155) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 155 47 +GPIO156 = MODE0(GPIO156) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 156 48 +GPIO157 = MODE0(GPIO157) MODE1(DISP_PWM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A14) 157 17 +GPIO158 = MODE0(GPIO158) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A16) 158 17 +GPIO159 = MODE0(GPIO159) MODE1(RFIC0_BSI_EN) MODE2(SPM_BSI_EN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B17) 159 23 +GPIO160 = MODE0(GPIO160) MODE1(RFIC0_BSI_CK) MODE2(SPM_BSI_CK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B18) -1 23 +GPIO161 = MODE0(GPIO161) MODE1(CMMCLK0) MODE2() MODE3() MODE4(CONN_MCU_AICE_TMSC) MODE5() MODE6() MODE7(DBG_MON_A8) -1 49 +GPIO162 = MODE0(GPIO162) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO163 = MODE0(GPIO163) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO164 = MODE0(GPIO164) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO165 = MODE0(GPIO165) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO166 = MODE0(GPIO166) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO167 = MODE0(GPIO167) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO168 = MODE0(GPIO168) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO169 = MODE0(GPIO169) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO170 = MODE0(GPIO170) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO171 = MODE0(GPIO171) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO172 = MODE0(GPIO172) MODE1() MODE2(CMCSD2) MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO173 = MODE0(GPIO173) MODE1() MODE2(CMCSD3) MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO174 = MODE0(GPIO174) MODE1() MODE2(CMCSK) MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO175 = MODE0(GPIO175) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO176 = MODE0(GPIO176) MODE1() MODE2(CMCSD0) MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO177 = MODE0(GPIO177) MODE1() MODE2(CMCSD1) MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO178 = MODE0(GPIO178) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A0) -1 50 +GPIO179 = MODE0(GPIO179) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A1) -1 51 +GPIO180 = MODE0(GPIO180) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A2) -1 52 +GPIO181 = MODE0(GPIO181) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A3) -1 50 +GPIO182 = MODE0(GPIO182) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A4) -1 50 +GPIO183 = MODE0(GPIO183) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A5) -1 50 +GPIO184 = MODE0(GPIO184) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A59) -1 50 +GPIO185 = MODE0(GPIO185) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A60) -1 53 +GPIO186 = MODE0(GPIO186) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A61) -1 50 +GPIO187 = MODE0(GPIO187) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A62) -1 50 +GPIO188 = MODE0(GPIO188) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A63) -1 50 +GPIO189 = MODE0(GPIO189) MODE1(MSDC0_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A64) -1 54 + + +[EINT] +EINT_COUNT = 139 + +[ADC] +ADC_COUNT = 6 + +[ADC_EX_PIN] +0 = 0 +1 = 1 +2 = 12 +3 = 13 +4 = 14 +5 = 15 + +[EINT_MD1] +EINT_MD1_COUNT = 5 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 5 + +[CLK_BUF] +CLK_BUF_COUNT = 4 +DRIVING_CURRENT_RF_CLK_BUF1=2:3:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF2=1:3:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF3=1:3:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF4=1:3:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF1=0:3:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF2=0:3:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF3=0:3:AutoK:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF4=0:3:AutoK:0.4:0.9:1.4:1.9 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 6 + +[POWER] +POWER_COUNT=4 +DVDD28_SIM1=VIO18:VIO28 +DVDD28_SIM2=VIO18:VIO28 +DVDD28_MC1=VIO18:VIO28 +DVDD28_MC2=VIO18:VIO28 + +[SRC_PIN] +GPIO19::PAD_DPI_D6=2 +GPIO20::PAD_DPI_D7=1 +GPIO46::PAD_INT_SIM1=1 +GPIO45::PAD_INT_SIM2=2 +GPIO100::PAD_PWM_A=2 +GPIO109::PAD_CAM_CLK1=1 diff --git a/tools/dct/config/MT6757-P25.fig b/tools/dct/config/MT6757-P25.fig new file mode 100644 index 000000000000..6f951fe836b1 --- /dev/null +++ b/tools/dct/config/MT6757-P25.fig @@ -0,0 +1,254 @@ +[Chip Type] +Chip = KIBOPLUS +GPIO_ModeNum = 8 +PMIC_APP_COUNT = 6 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1() MODE2(EXT_FRAME_SYNC) MODE3(CLKM0) MODE4(IDDIG) MODE5(C2K_EINT0) MODE6(I2S3_MCK) MODE7(SPI2_CSB) 0 0 +GPIO1 = MODE0(GPIO1) MODE1() MODE2(EXT_FRAME_SYNC) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5(C2K_EINT1) MODE6(I2S3_BCK) MODE7(SPI2_MO) 1 0 +GPIO2 = MODE0(GPIO2) MODE1(CMFLASH) MODE2(UTXD1) MODE3(CLKM2) MODE4(MD_URXD2) MODE5(C2K_UTXD1) MODE6(I2S3_LRCK) MODE7(SPI2_CLK) 2 0 +GPIO3 = MODE0(GPIO3) MODE1(PWM_A) MODE2(URXD1) MODE3(CLKM3) MODE4(MD_UTXD2) MODE5(C2K_URXD1) MODE6(I2S3_DO) MODE7(SPI1_B_MI) 3 0 +GPIO4 = MODE0(GPIO4) MODE1(PWM_B) MODE2(I2S0_MCK) MODE3(UCTS0) MODE4(MD_URXD1) MODE5(C2K_UTXD0) MODE6(ANT_SEL3) MODE7(SPI1_B_MI) 4 1 +GPIO5 = MODE0(GPIO5) MODE1(PWM_C) MODE2(I2S0_BCK) MODE3(URTS0) MODE4(MD_UTXD1) MODE5(C2K_URXD0) MODE6(ANT_SEL4) MODE7(SPI1_B_CSB) 5 1 +GPIO6 = MODE0(GPIO6) MODE1(IRTX_OUT) MODE2(I2S0_LRCK) MODE3(IDDIG) MODE4(MD_URXD0) MODE5(SDA0) MODE6(ANT_SEL5) MODE7(SPI1_B_MO) 6 1 +GPIO7 = MODE0(GPIO7) MODE1(IRTX_OUT) MODE2(I2S0_DI) MODE3(USB_DRVVBUS) MODE4(MD_UTXD0) MODE5(SCL0) MODE6(PCC_PPC_IO) MODE7(SPI1_B_CLK) 7 1 +GPIO8 = MODE0(GPIO8) MODE1(PWM_A) MODE2(PCC_PPC_IO) MODE3() MODE4(CONN_MCU_TRST_B) MODE5(C2K_DM_JTINTP) MODE6(IO_JTAG_TRSTN) MODE7(DBG_MON_A44) 8 2 +GPIO9 = MODE0(GPIO9) MODE1(PWM_B) MODE2(UCTS1) MODE3(DAP_SIB1_SWD) MODE4(CONN_MCU_DBGACK_N) MODE5(IRTX_OUT) MODE6() MODE7(DBG_MON_A45) 9 3 +GPIO10 = MODE0(GPIO10) MODE1(PWM_C) MODE2(URTS1) MODE3(DAP_SIB1_SWCK) MODE4(CONN_MCU_DBGI_N) MODE5(EXT_FRAME_SYNC) MODE6() MODE7(DBG_MON_A46) 10 3 +GPIO11 = MODE0(GPIO11) MODE1(IRTX_OUT) MODE2(IDDIG) MODE3(I2S1_MCK) MODE4(PWM_B) MODE5(CLKM0) MODE6(SRCLKENAI1) MODE7() 11 4 +GPIO12 = MODE0(GPIO12) MODE1(IRTX_OUT) MODE2(USB_DRVVBUS) MODE3(I2S2_DI) MODE4(PWM_C) MODE5(CLKM1) MODE6(CMFLASH) MODE7() 12 5 +GPIO13 = MODE0(GPIO13) MODE1(DPI_D0) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(MD_URXD0) MODE5(C2K_EINT0) MODE6(I2S0_MCK) MODE7(DBG_MON_A19) 13 6 +GPIO14 = MODE0(GPIO14) MODE1(DPI_D1) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(MD_UTXD0) MODE5(C2K_EINT1) MODE6(I2S0_BCK) MODE7(DBG_MON_A20) 14 6 +GPIO15 = MODE0(GPIO15) MODE1(DPI_D2) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(MD_URXD1) MODE5(C2K_DM_EINT0) MODE6(I2S0_LRCK) MODE7(DBG_MON_A21) 15 6 +GPIO16 = MODE0(GPIO16) MODE1(DPI_D3) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(MD_UTXD1) MODE5(C2K_DM_EINT1) MODE6(I2S0_DI) MODE7(DBG_MON_A22) 16 6 +GPIO17 = MODE0(GPIO17) MODE1(DPI_D4) MODE2(UCTS1) MODE3(CONN_MCU_TRST_B) MODE4(MD_URXD2) MODE5(C2K_URXD0) MODE6(I2S1_MCK) MODE7(DBG_MON_A23) 17 7 +GPIO18 = MODE0(GPIO18) MODE1(DPI_D5) MODE2(URTS1) MODE3(CONN_MCU_DBGI_N) MODE4(MD_UTXD2) MODE5(C2K_UTXD0) MODE6(I2S1_BCK) MODE7(DBG_MON_A24) 18 7 +GPIO19 = MODE0(GPIO19) MODE1(DPI_D6) MODE2(URXD1) MODE3(CONN_MCU_TDO) MODE4(MD_INT2_C2K_UIM1_HOT_PLUG) MODE5(SPI5_MO) MODE6(I2S1_LRCK) MODE7(DBG_MON_A25) 19 7 +GPIO20 = MODE0(GPIO20) MODE1(DPI_D7) MODE2(UTXD1) MODE3(CONN_MCU_DBGACK_N) MODE4(MD_INT1_C2K_UIM0_HOT_PLUG) MODE5(SPI5_CLK) MODE6(I2S1_DO) MODE7(DBG_MON_A26) 20 7 +GPIO21 = MODE0(GPIO21) MODE1(DPI_D8) MODE2(SRCLKENAI1) MODE3(CONN_MCU_TMS) MODE4(DAP_SIB1_SWD) MODE5(CONN_MCU_AICE_TMSC) MODE6(I2S2_MCK) MODE7(DBG_MON_A27) 21 8 +GPIO22 = MODE0(GPIO22) MODE1(DPI_D9) MODE2(EXT_FRAME_SYNC) MODE3(CONN_MCU_TCK) MODE4(DAP_SIB1_SWCK) MODE5(CONN_MCU_AICE_TCKC) MODE6(I2S2_BCK) MODE7(DBG_MON_A28) 22 8 +GPIO23 = MODE0(GPIO23) MODE1(DPI_D10) MODE2(IDDIG) MODE3(CONN_MCU_TDI) MODE4(CMVREF1) MODE5(PWM_B) MODE6(I2S2_LRCK) MODE7(DBG_MON_A29) 23 8 +GPIO24 = MODE0(GPIO24) MODE1(DPI_D11) MODE2(USB_DRVVBUS) MODE3(CONN_DSP_JCK) MODE4(SPI1_A_MI) MODE5(PWM_C) MODE6(I2S2_DI) MODE7(DBG_MON_A30) 24 8 +GPIO25 = MODE0(GPIO25) MODE1(DPI_HSYNC) MODE2(SPI1_A_MI) MODE3(CONN_DSP_JMS) MODE4(CLKM0) MODE5(C2K_UTXD1) MODE6(I2S3_MCK) MODE7(DBG_MON_A31) 25 9 +GPIO26 = MODE0(GPIO26) MODE1(DPI_VSYNC) MODE2(SPI1_A_CSB) MODE3(CONN_DSP_JDI) MODE4(CLKM1) MODE5(C2K_URXD1) MODE6(I2S3_BCK) MODE7(DBG_MON_A32) 26 9 +GPIO27 = MODE0(GPIO27) MODE1(DPI_DE) MODE2(SPI1_A_MO) MODE3(CONN_DSP_JDO) MODE4(CLKM2) MODE5(C2K_DM_EINT2) MODE6(I2S3_LRCK) MODE7(DBG_MON_A33) 27 9 +GPIO28 = MODE0(GPIO28) MODE1(DPI_CK) MODE2(SPI1_A_CLK) MODE3(CONN_DSP_JINTP) MODE4(CLKM3) MODE5(C2K_DM_EINT3) MODE6(I2S3_DO) MODE7(DBG_MON_A34) 28 9 +GPIO29 = MODE0(GPIO29) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 29 10 +GPIO30 = MODE0(GPIO30) MODE1(MSDC1_CLK) MODE2(IO_JTAG_TCK) MODE3(UDI_TCK) MODE4(CONN_DSP_JCK) MODE5(C2K_DM_OTCK) MODE6(C2K_TCK) MODE7(DBG_MON_A53) 30 11 +GPIO31 = MODE0(GPIO31) MODE1(MSDC1_DAT3) MODE2() MODE3(DAP_SIB1_SWD) MODE4(CONN_DSP_JINTP) MODE5(C2K_DM_JTINTP) MODE6(C2K_RTCK) MODE7(DBG_MON_A54) 31 12 +GPIO32 = MODE0(GPIO32) MODE1(MSDC1_CMD) MODE2(IO_JTAG_TMS) MODE3(UDI_TMS) MODE4(CONN_DSP_JMS) MODE5(C2K_DM_OTMS) MODE6(C2K_TMS) MODE7(DBG_MON_A55) 32 13 +GPIO33 = MODE0(GPIO33) MODE1(MSDC1_DAT0) MODE2(IO_JTAG_TDI) MODE3(UDI_TDI) MODE4(CONN_DSP_JDI) MODE5(C2K_DM_OTDI) MODE6(C2K_TDI) MODE7(DBG_MON_A56) 33 12 +GPIO34 = MODE0(GPIO34) MODE1(MSDC1_DAT2) MODE2(IO_JTAG_TRSTN) MODE3(UDI_NTRST) MODE4() MODE5(DAP_SIB1_SWCK) MODE6(C2K_NTRST) MODE7(DBG_MON_A57) 34 12 +GPIO35 = MODE0(GPIO35) MODE1(MSDC1_DAT1) MODE2(IO_JTAG_TDO) MODE3(UDI_TDO) MODE4(CONN_DSP_JDO) MODE5(C2K_DM_OTDO) MODE6(C2K_TDO) MODE7(DBG_MON_A58) 35 12 +GPIO36 = MODE0(GPIO36) MODE1(MD1_SIM2_SIO) MODE2() MODE3(MD1_SIM1_SIO) MODE4() MODE5(C2K_UIM0_IO) MODE6(C2K_UIM1_IO) MODE7(DBG_MON_A38) 36 14 +GPIO37 = MODE0(GPIO37) MODE1(MD1_SIM2_SRST) MODE2() MODE3(MD1_SIM1_SRST) MODE4() MODE5(C2K_UIM0_RST) MODE6(C2K_UIM1_RST) MODE7(DBG_MON_A39) 37 14 +GPIO38 = MODE0(GPIO38) MODE1(MD1_SIM2_SCLK) MODE2() MODE3(MD1_SIM1_SCLK) MODE4() MODE5(C2K_UIM0_CLK) MODE6(C2K_UIM1_CLK) MODE7(DBG_MON_A40) 38 14 +GPIO39 = MODE0(GPIO39) MODE1(MD1_SIM1_SCLK) MODE2() MODE3(MD1_SIM2_SCLK) MODE4() MODE5(C2K_UIM0_CLK) MODE6(C2K_UIM1_CLK) MODE7(DBG_MON_A41) 39 15 +GPIO40 = MODE0(GPIO40) MODE1(MD1_SIM1_SRST) MODE2() MODE3(MD1_SIM2_SRST) MODE4() MODE5(C2K_UIM0_RST) MODE6(C2K_UIM1_RST) MODE7(DBG_MON_A42) 40 15 +GPIO41 = MODE0(GPIO41) MODE1(MD1_SIM1_SIO) MODE2() MODE3(MD1_SIM2_SIO) MODE4() MODE5(C2K_UIM0_IO) MODE6(C2K_UIM1_IO) MODE7(DBG_MON_A43) 41 15 +GPIO42 = MODE0(GPIO42) MODE1(IDDIG) MODE2(URXD1) MODE3(UCTS0) MODE4(SDA1) MODE5(EXT_FRAME_SYNC) MODE6(KPCOL2) MODE7(DBG_MON_A12) 42 16 +GPIO43 = MODE0(GPIO43) MODE1(USB_DRVVBUS) MODE2(UTXD1) MODE3(URTS0) MODE4(SCL1) MODE5(EXT_FRAME_SYNC) MODE6(KPROW2) MODE7(DBG_MON_A13) 43 16 +GPIO44 = MODE0(GPIO44) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A15) 44 17 +GPIO45 = MODE0(GPIO45) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(URXD1) MODE3(UCTS1) MODE4(CLKM0) MODE5(SPI5_MI) MODE6(IDDIG) MODE7(DBG_MON_A17) 45 18 +GPIO46 = MODE0(GPIO46) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2(UTXD1) MODE3(URTS1) MODE4(PWM_B) MODE5(SPI5_CSB) MODE6(USB_DRVVBUS) MODE7(DBG_MON_A18) 46 18 +GPIO47 = MODE0(GPIO47) MODE1(SCL_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 47 19 +GPIO48 = MODE0(GPIO48) MODE1(SDA_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 48 19 +GPIO49 = MODE0(GPIO49) MODE1(SCL3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 49 20 +GPIO50 = MODE0(GPIO50) MODE1(SDA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 50 20 +GPIO51 = MODE0(GPIO51) MODE1(BPI_BUS15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B0) 51 21 +GPIO52 = MODE0(GPIO52) MODE1(BPI_BUS14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B1) 52 21 +GPIO53 = MODE0(GPIO53) MODE1(BPI_BUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B2) 53 21 +GPIO54 = MODE0(GPIO54) MODE1(BPI_BUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B3) 54 21 +GPIO55 = MODE0(GPIO55) MODE1(BPI_BUS11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 55 21 +GPIO56 = MODE0(GPIO56) MODE1(BPI_BUS10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 56 21 +GPIO57 = MODE0(GPIO57) MODE1(BPI_BUS9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B4) 57 21 +GPIO58 = MODE0(GPIO58) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B5) 58 21 +GPIO59 = MODE0(GPIO59) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B6) 59 21 +GPIO60 = MODE0(GPIO60) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B7) 60 21 +GPIO61 = MODE0(GPIO61) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B8) 61 21 +GPIO62 = MODE0(GPIO62) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B9) 62 21 +GPIO63 = MODE0(GPIO63) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B10) 63 22 +GPIO64 = MODE0(GPIO64) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B11) 64 22 +GPIO65 = MODE0(GPIO65) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B12) 65 22 +GPIO66 = MODE0(GPIO66) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B13) 66 22 +GPIO67 = MODE0(GPIO67) MODE1(RFIC0_BSI_D2) MODE2(SPM_BSI_D2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B14) 67 23 +GPIO68 = MODE0(GPIO68) MODE1(RFIC0_BSI_D1) MODE2(SPM_BSI_D1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B15) 68 23 +GPIO69 = MODE0(GPIO69) MODE1(RFIC0_BSI_D0) MODE2(SPM_BSI_D0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) 69 23 +GPIO70 = MODE0(GPIO70) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO71 = MODE0(GPIO71) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO72 = MODE0(GPIO72) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO73 = MODE0(GPIO73) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO74 = MODE0(GPIO74) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO75 = MODE0(GPIO75) MODE1(MIPI3_SDATA) MODE2(PWM_C) MODE3(IRTX_OUT) MODE4(I2S0_DI) MODE5(I2S2_DI) MODE6(ANT_SEL5) MODE7(DBG_MON_B19) 75 24 +GPIO76 = MODE0(GPIO76) MODE1(MIPI3_SCLK) MODE2(CLKM3) MODE3(EXT_FRAME_SYNC) MODE4(I2S0_LRCK) MODE5(I2S2_LRCK) MODE6(ANT_SEL4) MODE7(DBG_MON_B20) 76 24 +GPIO77 = MODE0(GPIO77) MODE1(MIPI2_SDATA) MODE2(USB_DRVVBUS) MODE3(IRTX_OUT) MODE4(I2S0_BCK) MODE5(I2S2_BCK) MODE6(ANT_SEL3) MODE7(DBG_MON_B21) 77 24 +GPIO78 = MODE0(GPIO78) MODE1(MIPI2_SCLK) MODE2(IDDIG) MODE3(EXT_FRAME_SYNC) MODE4(I2S0_MCK) MODE5(I2S2_MCK) MODE6(PCM1_DO0) MODE7(DBG_MON_B22) 78 24 +GPIO79 = MODE0(GPIO79) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B23) 79 25 +GPIO80 = MODE0(GPIO80) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B24) 80 25 +GPIO81 = MODE0(GPIO81) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B25) 81 25 +GPIO82 = MODE0(GPIO82) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B26) 82 25 +GPIO83 = MODE0(GPIO83) MODE1(BPI_BUS23) MODE2(DET_BPI1) MODE3(SPI4_MI) MODE4(I2S3_DO) MODE5(I2S1_DO) MODE6(PCM1_DO1) MODE7(DBG_MON_B27) 83 26 +GPIO84 = MODE0(GPIO84) MODE1(BPI_BUS22) MODE2(DET_BPI0) MODE3(SPI4_CSB) MODE4(I2S3_LRCK) MODE5(I2S1_LRCK) MODE6(PCM1_CLK) MODE7(DBG_MON_B28) 84 26 +GPIO85 = MODE0(GPIO85) MODE1(BPI_BUS21) MODE2(TX_SWAP3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B29) 85 26 +GPIO86 = MODE0(GPIO86) MODE1(BPI_BUS20) MODE2(TX_SWAP2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B30) 86 26 +GPIO87 = MODE0(GPIO87) MODE1(BPI_BUS19) MODE2(TX_SWAP1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B31) 87 27 +GPIO88 = MODE0(GPIO88) MODE1(BPI_BUS18) MODE2(TX_SWAP0) MODE3() MODE4() MODE5() MODE6() MODE7() 88 27 +GPIO89 = MODE0(GPIO89) MODE1(BPI_BUS17) MODE2(PA_VM1) MODE3(SPI4_MO) MODE4(I2S3_BCK) MODE5(I2S1_BCK) MODE6(PCM1_SYNC) MODE7() 89 27 +GPIO90 = MODE0(GPIO90) MODE1(BPI_BUS16) MODE2(PA_VM0) MODE3(SPI4_CLK) MODE4(I2S3_MCK) MODE5(I2S1_MCK) MODE6(PCM1_DI) MODE7() 90 27 +GPIO91 = MODE0(GPIO91) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 91 28 +GPIO92 = MODE0(GPIO92) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 92 29 +GPIO93 = MODE0(GPIO93) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 93 29 +GPIO94 = MODE0(GPIO94) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 94 28 +GPIO95 = MODE0(GPIO95) MODE1(SPI0_MI) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(I2S1_BCK) MODE5(SPI0_MO) MODE6(DFD_TDO) MODE7(JTDO_SEL1) 95 30 +GPIO96 = MODE0(GPIO96) MODE1(SPI0_CSB) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(I2S1_LRCK) MODE5(SDA2) MODE6(DFD_TMS) MODE7(JTMS_SEL1) 96 30 +GPIO97 = MODE0(GPIO97) MODE1(SPI0_MO) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(I2S1_DO) MODE5(SPI0_MI) MODE6(DFD_TDI) MODE7(JTDI_SEL1) 97 30 +GPIO98 = MODE0(GPIO98) MODE1(SPI0_CLK) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(I2S1_MCK) MODE5(SCL2) MODE6(DFD_TCK_XI) MODE7(JTCK_SEL1) 98 30 +GPIO99 = MODE0(GPIO99) MODE1(SRCLKENAI0) MODE2(UTXD1) MODE3(EXT_FRAME_SYNC) MODE4(CLKM2) MODE5(PCC_PPC_IO) MODE6(ANT_SEL3) MODE7(JTRSTN_SEL1) 99 31 +GPIO100 = MODE0(GPIO100) MODE1(PWM_A) MODE2(URXD1) MODE3(MD_INT0) MODE4(CLKM3) MODE5(MD_INT2_C2K_UIM1_HOT_PLUG) MODE6(ANT_SEL4) MODE7(DBG_MON_A35) 100 31 +GPIO101 = MODE0(GPIO101) MODE1(KPROW1) MODE2(IRTX_OUT) MODE3(C2K_UTXD1) MODE4(C2K_UTXD0) MODE5(C2K_DM_EINT2) MODE6(ANT_SEL5) MODE7(DBG_MON_A36) 101 32 +GPIO102 = MODE0(GPIO102) MODE1(KPROW0) MODE2() MODE3() MODE4() MODE5(C2K_DM_EINT3) MODE6() MODE7(DBG_MON_A37) 102 32 +GPIO103 = MODE0(GPIO103) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5(C2K_DM_EINT0) MODE6() MODE7() 103 32 +GPIO104 = MODE0(GPIO104) MODE1(KPCOL1) MODE2() MODE3(C2K_URXD1) MODE4(C2K_URXD0) MODE5(C2K_DM_EINT1) MODE6(CMVREF0) MODE7(SPI2_MI) 104 32 +GPIO105 = MODE0(GPIO105) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD0) MODE4(MD_URXD1) MODE5(C2K_URXD0) MODE6(MD_URXD2) MODE7(C2K_URXD1) 105 33 +GPIO106 = MODE0(GPIO106) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD0) MODE4(MD_UTXD1) MODE5(C2K_UTXD0) MODE6(MD_UTXD2) MODE7(C2K_UTXD1) 106 33 +GPIO107 = MODE0(GPIO107) MODE1(UCTS0) MODE2(I2S2_MCK) MODE3(SPI3_CSB) MODE4(CONN_MCU_TDO) MODE5(C2K_DM_OTDO) MODE6(IO_JTAG_TDO) MODE7(DBG_MON_A6) 107 34 +GPIO108 = MODE0(GPIO108) MODE1(URTS0) MODE2(I2S2_BCK) MODE3(SPI3_MI) MODE4(CONN_MCU_TMS) MODE5(C2K_DM_OTMS) MODE6(IO_JTAG_TMS) MODE7(DBG_MON_A7) 108 34 +GPIO109 = MODE0(GPIO109) MODE1(CMMCLK1) MODE2(PWM_C) MODE3(MD_INT0) MODE4(CONN_MCU_AICE_TCKC) MODE5(MD_INT1_C2K_UIM0_HOT_PLUG) MODE6(CMFLASH) MODE7(DBG_MON_A9) 109 35 +GPIO110 = MODE0(GPIO110) MODE1(CLKM2) MODE2(I2S2_LRCK) MODE3(SPI3_CLK) MODE4(CONN_MCU_TCK) MODE5(C2K_DM_OTCK) MODE6(IO_JTAG_TCK) MODE7(DBG_MON_A10) 110 36 +GPIO111 = MODE0(GPIO111) MODE1(CLKM1) MODE2(I2S2_DI) MODE3(SPI3_MO) MODE4(CONN_MCU_TDI) MODE5(C2K_DM_OTDI) MODE6(IO_JTAG_TDI) MODE7(DBG_MON_A11) 111 36 +GPIO112 = MODE0(GPIO112) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 112 37 +GPIO113 = MODE0(GPIO113) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 113 37 +GPIO114 = MODE0(GPIO114) MODE1(ANT_SEL0) MODE2(PWM_A) MODE3(CLKM0) MODE4(IRTX_OUT) MODE5(PCC_PPC_IO) MODE6(DSI1_TE) MODE7(DBG_MON_A47) 114 38 +GPIO115 = MODE0(GPIO115) MODE1(ANT_SEL1) MODE2(PWM_B) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5(DAP_SIB1_SWD) MODE6() MODE7(DBG_MON_A48) 115 38 +GPIO116 = MODE0(GPIO116) MODE1(ANT_SEL2) MODE2(PWM_C) MODE3(CLKM2) MODE4(IDDIG) MODE5(DAP_SIB1_SWCK) MODE6(IRTX_OUT) MODE7(DBG_MON_A49) 116 38 +GPIO117 = MODE0(GPIO117) MODE1(F2W_DATA) MODE2(PTA_TXD) MODE3(PTA_RXD) MODE4(AUXIF_ST0) MODE5(C2K_UTXD1) MODE6(SDA0) MODE7(DBG_MON_A50) 117 39 +GPIO118 = MODE0(GPIO118) MODE1(F2W_CK) MODE2(PTA_RXD) MODE3(PTA_TXD) MODE4(AUXIF_CLK0) MODE5(C2K_URXD1) MODE6(SCL0) MODE7(DBG_MON_A51) 118 39 +GPIO119 = MODE0(GPIO119) MODE1(WB_RSTB) MODE2(URXD1) MODE3(UTXD1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A52) 119 40 +GPIO120 = MODE0(GPIO120) MODE1(WB_SCLK) MODE2(UTXD1) MODE3(URXD1) MODE4() MODE5() MODE6() MODE7() 120 40 +GPIO121 = MODE0(GPIO121) MODE1(WB_SDATA) MODE2(AGPS_SYNC) MODE3() MODE4(AUXIF_ST1) MODE5(C2K_UTXD0) MODE6(SDA1) MODE7() 121 40 +GPIO122 = MODE0(GPIO122) MODE1(WB_SEN) MODE2(SRCLKENAI1) MODE3() MODE4(AUXIF_CLK1) MODE5(C2K_URXD0) MODE6(SCL1) MODE7() 122 40 +GPIO123 = MODE0(GPIO123) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO124 = MODE0(GPIO124) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO125 = MODE0(GPIO125) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO126 = MODE0(GPIO126) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO127 = MODE0(GPIO127) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO128 = MODE0(GPIO128) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO129 = MODE0(GPIO129) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO130 = MODE0(GPIO130) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO131 = MODE0(GPIO131) MODE1(WB_CTRL0) MODE2(MSDC2_DAT1) MODE3() MODE4() MODE5(C2K_NTRST) MODE6() MODE7() 131 41 +GPIO132 = MODE0(GPIO132) MODE1(WB_CTRL1) MODE2(MSDC2_CMD) MODE3() MODE4() MODE5(C2K_TCK) MODE6() MODE7() 132 42 +GPIO133 = MODE0(GPIO133) MODE1(WB_CTRL2) MODE2(MSDC2_CLK) MODE3() MODE4() MODE5(C2K_TDI) MODE6() MODE7() 133 43 +GPIO134 = MODE0(GPIO134) MODE1(WB_CTRL3) MODE2(MSDC2_DAT3) MODE3() MODE4() MODE5(C2K_TMS) MODE6() MODE7() 134 41 +GPIO135 = MODE0(GPIO135) MODE1(WB_CTRL4) MODE2(MSDC2_DAT0) MODE3() MODE4() MODE5(C2K_TDO) MODE6() MODE7() 135 41 +GPIO136 = MODE0(GPIO136) MODE1(WB_CTRL5) MODE2(MSDC2_DAT2) MODE3() MODE4() MODE5(C2K_RTCK) MODE6() MODE7() 136 41 +GPIO137 = MODE0(GPIO137) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO138 = MODE0(GPIO138) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO139 = MODE0(GPIO139) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO140 = MODE0(GPIO140) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO141 = MODE0(GPIO141) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO142 = MODE0(GPIO142) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO143 = MODE0(GPIO143) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO144 = MODE0(GPIO144) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO145 = MODE0(GPIO145) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO146 = MODE0(GPIO146) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO147 = MODE0(GPIO147) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 44 +GPIO148 = MODE0(GPIO148) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 45 +GPIO149 = MODE0(GPIO149) MODE1(AUD_CLK_MOSI) MODE2() MODE3(I2S1_BCK) MODE4() MODE5() MODE6() MODE7() -1 46 +GPIO150 = MODE0(GPIO150) MODE1(AUD_DAT_MOSI) MODE2(AUD_DAT_MISO) MODE3(I2S1_LRCK) MODE4() MODE5() MODE6() MODE7() -1 46 +GPIO151 = MODE0(GPIO151) MODE1(AUD_DAT_MISO) MODE2(AUD_DAT_MOSI) MODE3(I2S1_DO) MODE4() MODE5() MODE6() MODE7() -1 46 +GPIO152 = MODE0(GPIO152) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO153 = MODE0(GPIO153) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO154 = MODE0(GPIO154) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO155 = MODE0(GPIO155) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO156 = MODE0(GPIO156) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 48 +GPIO157 = MODE0(GPIO157) MODE1(DISP_PWM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A14) -1 17 +GPIO158 = MODE0(GPIO158) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A16) -1 17 +GPIO159 = MODE0(GPIO159) MODE1(RFIC0_BSI_EN) MODE2(SPM_BSI_EN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B17) -1 23 +GPIO160 = MODE0(GPIO160) MODE1(RFIC0_BSI_CK) MODE2(SPM_BSI_CK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B18) -1 23 +GPIO161 = MODE0(GPIO161) MODE1(CMMCLK0) MODE2() MODE3() MODE4(CONN_MCU_AICE_TMSC) MODE5() MODE6() MODE7(DBG_MON_A8) -1 49 +GPIO162 = MODE0(GPIO162) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO163 = MODE0(GPIO163) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO164 = MODE0(GPIO164) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO165 = MODE0(GPIO165) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO166 = MODE0(GPIO166) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO167 = MODE0(GPIO167) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO168 = MODE0(GPIO168) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO169 = MODE0(GPIO169) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO170 = MODE0(GPIO170) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO171 = MODE0(GPIO171) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO172 = MODE0(GPIO172) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO173 = MODE0(GPIO173) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO174 = MODE0(GPIO174) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO175 = MODE0(GPIO175) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO176 = MODE0(GPIO176) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO177 = MODE0(GPIO177) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO178 = MODE0(GPIO178) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A0) -1 50 +GPIO179 = MODE0(GPIO179) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A1) -1 51 +GPIO180 = MODE0(GPIO180) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A2) -1 52 +GPIO181 = MODE0(GPIO181) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A3) -1 50 +GPIO182 = MODE0(GPIO182) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A4) -1 50 +GPIO183 = MODE0(GPIO183) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A5) -1 50 +GPIO184 = MODE0(GPIO184) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A59) -1 50 +GPIO185 = MODE0(GPIO185) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A60) -1 53 +GPIO186 = MODE0(GPIO186) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A61) -1 50 +GPIO187 = MODE0(GPIO187) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A62) -1 50 +GPIO188 = MODE0(GPIO188) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A63) -1 50 +GPIO189 = MODE0(GPIO189) MODE1(MSDC0_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A64) -1 54 +GPIO190 = MODE0(GPIO190) MODE1(DSI1_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 55 +GPIO191 = MODE0(GPIO191) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 55 +GPIO192 = MODE0(GPIO192) MODE1(SCL4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 56 +GPIO193 = MODE0(GPIO193) MODE1(SDA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 56 + +[GPIO_EXT] +MIPI_PINS=63:64:65:66:75:76:77:78:137:138:139:140:141:142:143:144:145:146:162:163:164:165:166:167:168:169:170:171:172:173:174:175:176:177 + +[EINT] +EINT_COUNT = 153 +BUILTIN_EINT = 144/IDDIG:150/PWRAP_SPI0_MI:152/PWRAP_SPI0_MO +BUILTIN_144 = 0/4:6/3:11/2:23/2:42/1:45/6:78/2:116/4 +BUILTIN_150 = 152/1:154/2 +BUILTIN_152 = 152/2:154/1 +INTERNAL_EINT = 152/194:153/195:154/196:155/197:156/198:157/199:158/200:159/201:139/202:140/203:141/204:142/205:143/206:145/207:146/208:147/209:148/210:149/211 + +[EINT_MD1] +EINT_MD1_COUNT = 4 + +[ADC] +ADC_COUNT = 5 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 9 + +[CLK_BUF] +CLK_BUF_COUNT = 7 +DRIVING_CURRENT_PMIC_CLK_BUF1=2:3:AutoK:0.5:1.0:1.4:2.0 +DRIVING_CURRENT_PMIC_CLK_BUF2=1:3:AutoK:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF3=1:3:AutoK:0.5:1.0:1.4:2.0 +DRIVING_CURRENT_PMIC_CLK_BUF4=2:3:AutoK:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF5=0:3:AutoK:0.5:1.0:1.4:2.0 +DRIVING_CURRENT_PMIC_CLK_BUF6=0:3:AutoK:0.5:1.0:1.4:2.0 +DRIVING_CURRENT_PMIC_CLK_BUF7=0:3:AutoK:0.5:1.0:1.4:2.0 +DRIVING_CURRENT_RF_CLK_BUF1=2:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF2=0:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF3=1:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF4=2:2:0.4:0.9:1.4:1.9 + +[SRC_PIN] +GPIO19::PAD_DPI_D6=2 +GPIO20::PAD_DPI_D7=1 +GPIO45::PAD_INT_SIM2=2 +GPIO46::PAD_INT_SIM1=1 +GPIO100::PAD_PWM_A=0 +GPIO109::PAD_CAM_CLK1=0 + +[POWER] +POWER_COUNT=4 +DVDD28_SIM1=VIO18:VIO28 +DVDD28_SIM2=VIO18:VIO28 +DVDD28_MC1=VIO18:VIO28 +DVDD28_MC2=VIO18:VIO28 diff --git a/tools/dct/config/MT6757.fig b/tools/dct/config/MT6757.fig new file mode 100644 index 000000000000..27925db1b9fa --- /dev/null +++ b/tools/dct/config/MT6757.fig @@ -0,0 +1,251 @@ +[Chip Type] +Chip = MT6757 +GPIO_ModeNum = 8 +PMIC_APP_COUNT = 6 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1() MODE2(EXT_FRAME_SYNC) MODE3(CLKM0) MODE4(IDDIG) MODE5(C2K_EINT0) MODE6(I2S3_MCK) MODE7(SPI2_CSB) 0 0 +GPIO1 = MODE0(GPIO1) MODE1() MODE2(EXT_FRAME_SYNC) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5(C2K_EINT1) MODE6(I2S3_BCK) MODE7(SPI2_MO) 1 0 +GPIO2 = MODE0(GPIO2) MODE1(CMFLASH) MODE2(UTXD1) MODE3(CLKM2) MODE4(MD_URXD2) MODE5(C2K_UTXD1) MODE6(I2S3_LRCK) MODE7(SPI2_CLK) 2 0 +GPIO3 = MODE0(GPIO3) MODE1(PWM_A) MODE2(URXD1) MODE3(CLKM3) MODE4(MD_UTXD2) MODE5(C2K_URXD1) MODE6(I2S3_DO) MODE7(SPI1_B_MI) 3 0 +GPIO4 = MODE0(GPIO4) MODE1(PWM_B) MODE2(I2S0_MCK) MODE3(UCTS0) MODE4(MD_URXD1) MODE5(C2K_UTXD0) MODE6(ANT_SEL3) MODE7(SPI1_B_MI) 4 1 +GPIO5 = MODE0(GPIO5) MODE1(PWM_C) MODE2(I2S0_BCK) MODE3(URTS0) MODE4(MD_UTXD1) MODE5(C2K_URXD0) MODE6(ANT_SEL4) MODE7(SPI1_B_CSB) 5 1 +GPIO6 = MODE0(GPIO6) MODE1(IRTX_OUT) MODE2(I2S0_LRCK) MODE3(IDDIG) MODE4(MD_URXD0) MODE5(SDA0) MODE6(ANT_SEL5) MODE7(SPI1_B_MO) 6 1 +GPIO7 = MODE0(GPIO7) MODE1(IRTX_OUT) MODE2(I2S0_DI) MODE3(USB_DRVVBUS) MODE4(MD_UTXD0) MODE5(SCL0) MODE6(PCC_PPC_IO) MODE7(SPI1_B_CLK) 7 1 +GPIO8 = MODE0(GPIO8) MODE1(PWM_A) MODE2(PCC_PPC_IO) MODE3() MODE4(CONN_MCU_TRST_B) MODE5(C2K_DM_JTINTP) MODE6(IO_JTAG_TRSTN) MODE7(DBG_MON_A44) 8 2 +GPIO9 = MODE0(GPIO9) MODE1(PWM_B) MODE2(UCTS1) MODE3(DAP_SIB1_SWD) MODE4(CONN_MCU_DBGACK_N) MODE5(IRTX_OUT) MODE6() MODE7(DBG_MON_A45) 9 3 +GPIO10 = MODE0(GPIO10) MODE1(PWM_C) MODE2(URTS1) MODE3(DAP_SIB1_SWCK) MODE4(CONN_MCU_DBGI_N) MODE5(EXT_FRAME_SYNC) MODE6() MODE7(DBG_MON_A46) 10 3 +GPIO11 = MODE0(GPIO11) MODE1(IRTX_OUT) MODE2(IDDIG) MODE3(I2S1_MCK) MODE4(PWM_B) MODE5(CLKM0) MODE6(SRCLKENAI1) MODE7() 11 4 +GPIO12 = MODE0(GPIO12) MODE1(IRTX_OUT) MODE2(USB_DRVVBUS) MODE3(I2S2_DI) MODE4(PWM_C) MODE5(CLKM1) MODE6(CMFLASH) MODE7() 12 5 +GPIO13 = MODE0(GPIO13) MODE1(DPI_D0) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(MD_URXD0) MODE5(C2K_EINT0) MODE6(I2S0_MCK) MODE7(DBG_MON_A19) 13 6 +GPIO14 = MODE0(GPIO14) MODE1(DPI_D1) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(MD_UTXD0) MODE5(C2K_EINT1) MODE6(I2S0_BCK) MODE7(DBG_MON_A20) 14 6 +GPIO15 = MODE0(GPIO15) MODE1(DPI_D2) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(MD_URXD1) MODE5(C2K_DM_EINT0) MODE6(I2S0_LRCK) MODE7(DBG_MON_A21) 15 6 +GPIO16 = MODE0(GPIO16) MODE1(DPI_D3) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(MD_UTXD1) MODE5(C2K_DM_EINT1) MODE6(I2S0_DI) MODE7(DBG_MON_A22) 16 6 +GPIO17 = MODE0(GPIO17) MODE1(DPI_D4) MODE2(UCTS1) MODE3(CONN_MCU_TRST_B) MODE4(MD_URXD2) MODE5(C2K_URXD0) MODE6(I2S1_MCK) MODE7(DBG_MON_A23) 17 7 +GPIO18 = MODE0(GPIO18) MODE1(DPI_D5) MODE2(URTS1) MODE3(CONN_MCU_DBGI_N) MODE4(MD_UTXD2) MODE5(C2K_UTXD0) MODE6(I2S1_BCK) MODE7(DBG_MON_A24) 18 7 +GPIO19 = MODE0(GPIO19) MODE1(DPI_D6) MODE2(URXD1) MODE3(CONN_MCU_TDO) MODE4(MD_INT2_C2K_UIM1_HOT_PLUG) MODE5(SPI5_MO) MODE6(I2S1_LRCK) MODE7(DBG_MON_A25) 19 7 +GPIO20 = MODE0(GPIO20) MODE1(DPI_D7) MODE2(UTXD1) MODE3(CONN_MCU_DBGACK_N) MODE4(MD_INT1_C2K_UIM0_HOT_PLUG) MODE5(SPI5_CLK) MODE6(I2S1_DO) MODE7(DBG_MON_A26) 20 7 +GPIO21 = MODE0(GPIO21) MODE1(DPI_D8) MODE2(SRCLKENAI1) MODE3(CONN_MCU_TMS) MODE4(DAP_SIB1_SWD) MODE5(CONN_MCU_AICE_TMSC) MODE6(I2S2_MCK) MODE7(DBG_MON_A27) 21 8 +GPIO22 = MODE0(GPIO22) MODE1(DPI_D9) MODE2(EXT_FRAME_SYNC) MODE3(CONN_MCU_TCK) MODE4(DAP_SIB1_SWCK) MODE5(CONN_MCU_AICE_TCKC) MODE6(I2S2_BCK) MODE7(DBG_MON_A28) 22 8 +GPIO23 = MODE0(GPIO23) MODE1(DPI_D10) MODE2(IDDIG) MODE3(CONN_MCU_TDI) MODE4(CMVREF1) MODE5(PWM_B) MODE6(I2S2_LRCK) MODE7(DBG_MON_A29) 23 8 +GPIO24 = MODE0(GPIO24) MODE1(DPI_D11) MODE2(USB_DRVVBUS) MODE3(CONN_DSP_JCK) MODE4(SPI1_A_MI) MODE5(PWM_C) MODE6(I2S2_DI) MODE7(DBG_MON_A30) 24 8 +GPIO25 = MODE0(GPIO25) MODE1(DPI_HSYNC) MODE2(SPI1_A_MI) MODE3(CONN_DSP_JMS) MODE4(CLKM0) MODE5(C2K_UTXD1) MODE6(I2S3_MCK) MODE7(DBG_MON_A31) 25 9 +GPIO26 = MODE0(GPIO26) MODE1(DPI_VSYNC) MODE2(SPI1_A_CSB) MODE3(CONN_DSP_JDI) MODE4(CLKM1) MODE5(C2K_URXD1) MODE6(I2S3_BCK) MODE7(DBG_MON_A32) 26 9 +GPIO27 = MODE0(GPIO27) MODE1(DPI_DE) MODE2(SPI1_A_MO) MODE3(CONN_DSP_JDO) MODE4(CLKM2) MODE5(C2K_DM_EINT2) MODE6(I2S3_LRCK) MODE7(DBG_MON_A33) 27 9 +GPIO28 = MODE0(GPIO28) MODE1(DPI_CK) MODE2(SPI1_A_CLK) MODE3(CONN_DSP_JINTP) MODE4(CLKM3) MODE5(C2K_DM_EINT3) MODE6(I2S3_DO) MODE7(DBG_MON_A34) 28 9 +GPIO29 = MODE0(GPIO29) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 29 10 +GPIO30 = MODE0(GPIO30) MODE1(MSDC1_CLK) MODE2(IO_JTAG_TCK) MODE3(UDI_TCK) MODE4(CONN_DSP_JCK) MODE5(C2K_DM_OTCK) MODE6(C2K_TCK) MODE7(DBG_MON_A53) 30 11 +GPIO31 = MODE0(GPIO31) MODE1(MSDC1_DAT3) MODE2() MODE3(DAP_SIB1_SWD) MODE4(CONN_DSP_JINTP) MODE5(C2K_DM_JTINTP) MODE6(C2K_RTCK) MODE7(DBG_MON_A54) 31 12 +GPIO32 = MODE0(GPIO32) MODE1(MSDC1_CMD) MODE2(IO_JTAG_TMS) MODE3(UDI_TMS) MODE4(CONN_DSP_JMS) MODE5(C2K_DM_OTMS) MODE6(C2K_TMS) MODE7(DBG_MON_A55) 32 13 +GPIO33 = MODE0(GPIO33) MODE1(MSDC1_DAT0) MODE2(IO_JTAG_TDI) MODE3(UDI_TDI) MODE4(CONN_DSP_JDI) MODE5(C2K_DM_OTDI) MODE6(C2K_TDI) MODE7(DBG_MON_A56) 33 12 +GPIO34 = MODE0(GPIO34) MODE1(MSDC1_DAT2) MODE2(IO_JTAG_TRSTN) MODE3(UDI_NTRST) MODE4() MODE5(DAP_SIB1_SWCK) MODE6(C2K_NTRST) MODE7(DBG_MON_A57) 34 12 +GPIO35 = MODE0(GPIO35) MODE1(MSDC1_DAT1) MODE2(IO_JTAG_TDO) MODE3(UDI_TDO) MODE4(CONN_DSP_JDO) MODE5(C2K_DM_OTDO) MODE6(C2K_TDO) MODE7(DBG_MON_A58) 35 12 +GPIO36 = MODE0(GPIO36) MODE1(MD1_SIM2_SIO) MODE2() MODE3(MD1_SIM1_SIO) MODE4() MODE5(C2K_UIM0_IO) MODE6(C2K_UIM1_IO) MODE7(DBG_MON_A38) 36 14 +GPIO37 = MODE0(GPIO37) MODE1(MD1_SIM2_SRST) MODE2() MODE3(MD1_SIM1_SRST) MODE4() MODE5(C2K_UIM0_RST) MODE6(C2K_UIM1_RST) MODE7(DBG_MON_A39) 37 14 +GPIO38 = MODE0(GPIO38) MODE1(MD1_SIM2_SCLK) MODE2() MODE3(MD1_SIM1_SCLK) MODE4() MODE5(C2K_UIM0_CLK) MODE6(C2K_UIM1_CLK) MODE7(DBG_MON_A40) 38 14 +GPIO39 = MODE0(GPIO39) MODE1(MD1_SIM1_SCLK) MODE2() MODE3(MD1_SIM2_SCLK) MODE4() MODE5(C2K_UIM0_CLK) MODE6(C2K_UIM1_CLK) MODE7(DBG_MON_A41) 39 15 +GPIO40 = MODE0(GPIO40) MODE1(MD1_SIM1_SRST) MODE2() MODE3(MD1_SIM2_SRST) MODE4() MODE5(C2K_UIM0_RST) MODE6(C2K_UIM1_RST) MODE7(DBG_MON_A42) 40 15 +GPIO41 = MODE0(GPIO41) MODE1(MD1_SIM1_SIO) MODE2() MODE3(MD1_SIM2_SIO) MODE4() MODE5(C2K_UIM0_IO) MODE6(C2K_UIM1_IO) MODE7(DBG_MON_A43) 41 15 +GPIO42 = MODE0(GPIO42) MODE1(IDDIG) MODE2(URXD1) MODE3(UCTS0) MODE4(SDA1) MODE5(EXT_FRAME_SYNC) MODE6(KPCOL2) MODE7(DBG_MON_A12) 42 16 +GPIO43 = MODE0(GPIO43) MODE1(USB_DRVVBUS) MODE2(UTXD1) MODE3(URTS0) MODE4(SCL1) MODE5(EXT_FRAME_SYNC) MODE6(KPROW2) MODE7(DBG_MON_A13) 43 16 +GPIO44 = MODE0(GPIO44) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A15) 44 17 +GPIO45 = MODE0(GPIO45) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(URXD1) MODE3(UCTS1) MODE4(CLKM0) MODE5(SPI5_MI) MODE6(IDDIG) MODE7(DBG_MON_A17) 45 18 +GPIO46 = MODE0(GPIO46) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2(UTXD1) MODE3(URTS1) MODE4(PWM_B) MODE5(SPI5_CSB) MODE6(USB_DRVVBUS) MODE7(DBG_MON_A18) 46 18 +GPIO47 = MODE0(GPIO47) MODE1(SCL_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 47 19 +GPIO48 = MODE0(GPIO48) MODE1(SDA_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 48 19 +GPIO49 = MODE0(GPIO49) MODE1(SCL3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 49 20 +GPIO50 = MODE0(GPIO50) MODE1(SDA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 50 20 +GPIO51 = MODE0(GPIO51) MODE1(BPI_BUS15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B0) 51 21 +GPIO52 = MODE0(GPIO52) MODE1(BPI_BUS14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B1) 52 21 +GPIO53 = MODE0(GPIO53) MODE1(BPI_BUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B2) 53 21 +GPIO54 = MODE0(GPIO54) MODE1(BPI_BUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B3) 54 21 +GPIO55 = MODE0(GPIO55) MODE1(BPI_BUS11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 55 21 +GPIO56 = MODE0(GPIO56) MODE1(BPI_BUS10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 56 21 +GPIO57 = MODE0(GPIO57) MODE1(BPI_BUS9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B4) 57 21 +GPIO58 = MODE0(GPIO58) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B5) 58 21 +GPIO59 = MODE0(GPIO59) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B6) 59 21 +GPIO60 = MODE0(GPIO60) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B7) 60 21 +GPIO61 = MODE0(GPIO61) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B8) 61 21 +GPIO62 = MODE0(GPIO62) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B9) 62 21 +GPIO63 = MODE0(GPIO63) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B10) 63 22 +GPIO64 = MODE0(GPIO64) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B11) 64 22 +GPIO65 = MODE0(GPIO65) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B12) 65 22 +GPIO66 = MODE0(GPIO66) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B13) 66 22 +GPIO67 = MODE0(GPIO67) MODE1(RFIC0_BSI_D2) MODE2(SPM_BSI_D2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B14) 67 23 +GPIO68 = MODE0(GPIO68) MODE1(RFIC0_BSI_D1) MODE2(SPM_BSI_D1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B15) 68 23 +GPIO69 = MODE0(GPIO69) MODE1(RFIC0_BSI_D0) MODE2(SPM_BSI_D0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) 69 23 +GPIO70 = MODE0(GPIO70) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO71 = MODE0(GPIO71) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO72 = MODE0(GPIO72) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO73 = MODE0(GPIO73) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO74 = MODE0(GPIO74) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO75 = MODE0(GPIO75) MODE1(MIPI3_SDATA) MODE2(PWM_C) MODE3(IRTX_OUT) MODE4(I2S0_DI) MODE5(I2S2_DI) MODE6(ANT_SEL5) MODE7(DBG_MON_B19) 75 24 +GPIO76 = MODE0(GPIO76) MODE1(MIPI3_SCLK) MODE2(CLKM3) MODE3(EXT_FRAME_SYNC) MODE4(I2S0_LRCK) MODE5(I2S2_LRCK) MODE6(ANT_SEL4) MODE7(DBG_MON_B20) 76 24 +GPIO77 = MODE0(GPIO77) MODE1(MIPI2_SDATA) MODE2(USB_DRVVBUS) MODE3(IRTX_OUT) MODE4(I2S0_BCK) MODE5(I2S2_BCK) MODE6(ANT_SEL3) MODE7(DBG_MON_B21) 77 24 +GPIO78 = MODE0(GPIO78) MODE1(MIPI2_SCLK) MODE2(IDDIG) MODE3(EXT_FRAME_SYNC) MODE4(I2S0_MCK) MODE5(I2S2_MCK) MODE6(PCM1_DO0) MODE7(DBG_MON_B22) 78 24 +GPIO79 = MODE0(GPIO79) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B23) 79 25 +GPIO80 = MODE0(GPIO80) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B24) 80 25 +GPIO81 = MODE0(GPIO81) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B25) 81 25 +GPIO82 = MODE0(GPIO82) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B26) 82 25 +GPIO83 = MODE0(GPIO83) MODE1(BPI_BUS23) MODE2(DET_BPI1) MODE3(SPI4_MI) MODE4(I2S3_DO) MODE5(I2S1_DO) MODE6(PCM1_DO1) MODE7(DBG_MON_B27) 83 26 +GPIO84 = MODE0(GPIO84) MODE1(BPI_BUS22) MODE2(DET_BPI0) MODE3(SPI4_CSB) MODE4(I2S3_LRCK) MODE5(I2S1_LRCK) MODE6(PCM1_CLK) MODE7(DBG_MON_B28) 84 26 +GPIO85 = MODE0(GPIO85) MODE1(BPI_BUS21) MODE2(TX_SWAP3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B29) 85 26 +GPIO86 = MODE0(GPIO86) MODE1(BPI_BUS20) MODE2(TX_SWAP2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B30) 86 26 +GPIO87 = MODE0(GPIO87) MODE1(BPI_BUS19) MODE2(TX_SWAP1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B31) 87 27 +GPIO88 = MODE0(GPIO88) MODE1(BPI_BUS18) MODE2(TX_SWAP0) MODE3() MODE4() MODE5() MODE6() MODE7() 88 27 +GPIO89 = MODE0(GPIO89) MODE1(BPI_BUS17) MODE2(PA_VM1) MODE3(SPI4_MO) MODE4(I2S3_BCK) MODE5(I2S1_BCK) MODE6(PCM1_SYNC) MODE7() 89 27 +GPIO90 = MODE0(GPIO90) MODE1(BPI_BUS16) MODE2(PA_VM0) MODE3(SPI4_CLK) MODE4(I2S3_MCK) MODE5(I2S1_MCK) MODE6(PCM1_DI) MODE7() 90 27 +GPIO91 = MODE0(GPIO91) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 91 28 +GPIO92 = MODE0(GPIO92) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 92 29 +GPIO93 = MODE0(GPIO93) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 93 29 +GPIO94 = MODE0(GPIO94) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 94 28 +GPIO95 = MODE0(GPIO95) MODE1(SPI0_MI) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(I2S1_BCK) MODE5(SPI0_MO) MODE6(DFD_TDO) MODE7(JTDO_SEL1) 95 30 +GPIO96 = MODE0(GPIO96) MODE1(SPI0_CSB) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(I2S1_LRCK) MODE5(SDA2) MODE6(DFD_TMS) MODE7(JTMS_SEL1) 96 30 +GPIO97 = MODE0(GPIO97) MODE1(SPI0_MO) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(I2S1_DO) MODE5(SPI0_MI) MODE6(DFD_TDI) MODE7(JTDI_SEL1) 97 30 +GPIO98 = MODE0(GPIO98) MODE1(SPI0_CLK) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(I2S1_MCK) MODE5(SCL2) MODE6(DFD_TCK_XI) MODE7(JTCK_SEL1) 98 30 +GPIO99 = MODE0(GPIO99) MODE1(SRCLKENAI0) MODE2(UTXD1) MODE3(EXT_FRAME_SYNC) MODE4(CLKM2) MODE5(PCC_PPC_IO) MODE6(ANT_SEL3) MODE7(JTRSTN_SEL1) 99 31 +GPIO100 = MODE0(GPIO100) MODE1(PWM_A) MODE2(URXD1) MODE3(MD_INT0) MODE4(CLKM3) MODE5(MD_INT2_C2K_UIM1_HOT_PLUG) MODE6(ANT_SEL4) MODE7(DBG_MON_A35) 100 31 +GPIO101 = MODE0(GPIO101) MODE1(KPROW1) MODE2(IRTX_OUT) MODE3(C2K_UTXD1) MODE4(C2K_UTXD0) MODE5(C2K_DM_EINT2) MODE6(ANT_SEL5) MODE7(DBG_MON_A36) 101 32 +GPIO102 = MODE0(GPIO102) MODE1(KPROW0) MODE2() MODE3() MODE4() MODE5(C2K_DM_EINT3) MODE6() MODE7(DBG_MON_A37) 102 32 +GPIO103 = MODE0(GPIO103) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5(C2K_DM_EINT0) MODE6() MODE7() 103 32 +GPIO104 = MODE0(GPIO104) MODE1(KPCOL1) MODE2() MODE3(C2K_URXD1) MODE4(C2K_URXD0) MODE5(C2K_DM_EINT1) MODE6(CMVREF0) MODE7(SPI2_MI) 104 32 +GPIO105 = MODE0(GPIO105) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD0) MODE4(MD_URXD1) MODE5(C2K_URXD0) MODE6(MD_URXD2) MODE7(C2K_URXD1) 105 33 +GPIO106 = MODE0(GPIO106) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD0) MODE4(MD_UTXD1) MODE5(C2K_UTXD0) MODE6(MD_UTXD2) MODE7(C2K_UTXD1) 106 33 +GPIO107 = MODE0(GPIO107) MODE1(UCTS0) MODE2(I2S2_MCK) MODE3(SPI3_CSB) MODE4(CONN_MCU_TDO) MODE5(C2K_DM_OTDO) MODE6(IO_JTAG_TDO) MODE7(DBG_MON_A6) 107 34 +GPIO108 = MODE0(GPIO108) MODE1(URTS0) MODE2(I2S2_BCK) MODE3(SPI3_MI) MODE4(CONN_MCU_TMS) MODE5(C2K_DM_OTMS) MODE6(IO_JTAG_TMS) MODE7(DBG_MON_A7) 108 34 +GPIO109 = MODE0(GPIO109) MODE1(CMMCLK1) MODE2(PWM_C) MODE3(MD_INT0) MODE4(CONN_MCU_AICE_TCKC) MODE5(MD_INT1_C2K_UIM0_HOT_PLUG) MODE6(CMFLASH) MODE7(DBG_MON_A9) 109 35 +GPIO110 = MODE0(GPIO110) MODE1(CLKM2) MODE2(I2S2_LRCK) MODE3(SPI3_CLK) MODE4(CONN_MCU_TCK) MODE5(C2K_DM_OTCK) MODE6(IO_JTAG_TCK) MODE7(DBG_MON_A10) 110 36 +GPIO111 = MODE0(GPIO111) MODE1(CLKM1) MODE2(I2S2_DI) MODE3(SPI3_MO) MODE4(CONN_MCU_TDI) MODE5(C2K_DM_OTDI) MODE6(IO_JTAG_TDI) MODE7(DBG_MON_A11) 111 36 +GPIO112 = MODE0(GPIO112) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 112 37 +GPIO113 = MODE0(GPIO113) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 113 37 +GPIO114 = MODE0(GPIO114) MODE1(ANT_SEL0) MODE2(PWM_A) MODE3(CLKM0) MODE4(IRTX_OUT) MODE5(PCC_PPC_IO) MODE6(DSI1_TE) MODE7(DBG_MON_A47) 114 38 +GPIO115 = MODE0(GPIO115) MODE1(ANT_SEL1) MODE2(PWM_B) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5(DAP_SIB1_SWD) MODE6() MODE7(DBG_MON_A48) 115 38 +GPIO116 = MODE0(GPIO116) MODE1(ANT_SEL2) MODE2(PWM_C) MODE3(CLKM2) MODE4(IDDIG) MODE5(DAP_SIB1_SWCK) MODE6(IRTX_OUT) MODE7(DBG_MON_A49) 116 38 +GPIO117 = MODE0(GPIO117) MODE1(F2W_DATA) MODE2(PTA_TXD) MODE3(PTA_RXD) MODE4(AUXIF_ST0) MODE5(C2K_UTXD1) MODE6(SDA0) MODE7(DBG_MON_A50) 117 39 +GPIO118 = MODE0(GPIO118) MODE1(F2W_CK) MODE2(PTA_RXD) MODE3(PTA_TXD) MODE4(AUXIF_CLK0) MODE5(C2K_URXD1) MODE6(SCL0) MODE7(DBG_MON_A51) 118 39 +GPIO119 = MODE0(GPIO119) MODE1(WB_RSTB) MODE2(URXD1) MODE3(UTXD1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A52) 119 40 +GPIO120 = MODE0(GPIO120) MODE1(WB_SCLK) MODE2(UTXD1) MODE3(URXD1) MODE4() MODE5() MODE6() MODE7() 120 40 +GPIO121 = MODE0(GPIO121) MODE1(WB_SDATA) MODE2(AGPS_SYNC) MODE3() MODE4(AUXIF_ST1) MODE5(C2K_UTXD0) MODE6(SDA1) MODE7() 121 40 +GPIO122 = MODE0(GPIO122) MODE1(WB_SEN) MODE2(SRCLKENAI1) MODE3() MODE4(AUXIF_CLK1) MODE5(C2K_URXD0) MODE6(SCL1) MODE7() 122 40 +GPIO123 = MODE0(GPIO123) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO124 = MODE0(GPIO124) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO125 = MODE0(GPIO125) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO126 = MODE0(GPIO126) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO127 = MODE0(GPIO127) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO128 = MODE0(GPIO128) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO129 = MODE0(GPIO129) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO130 = MODE0(GPIO130) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO131 = MODE0(GPIO131) MODE1(WB_CTRL0) MODE2(MSDC2_DAT1) MODE3() MODE4() MODE5(C2K_NTRST) MODE6() MODE7() 131 41 +GPIO132 = MODE0(GPIO132) MODE1(WB_CTRL1) MODE2(MSDC2_CMD) MODE3() MODE4() MODE5(C2K_TCK) MODE6() MODE7() 132 42 +GPIO133 = MODE0(GPIO133) MODE1(WB_CTRL2) MODE2(MSDC2_CLK) MODE3() MODE4() MODE5(C2K_TDI) MODE6() MODE7() 133 43 +GPIO134 = MODE0(GPIO134) MODE1(WB_CTRL3) MODE2(MSDC2_DAT3) MODE3() MODE4() MODE5(C2K_TMS) MODE6() MODE7() 134 41 +GPIO135 = MODE0(GPIO135) MODE1(WB_CTRL4) MODE2(MSDC2_DAT0) MODE3() MODE4() MODE5(C2K_TDO) MODE6() MODE7() 135 41 +GPIO136 = MODE0(GPIO136) MODE1(WB_CTRL5) MODE2(MSDC2_DAT2) MODE3() MODE4() MODE5(C2K_RTCK) MODE6() MODE7() 136 41 +GPIO137 = MODE0(GPIO137) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO138 = MODE0(GPIO138) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO139 = MODE0(GPIO139) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO140 = MODE0(GPIO140) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO141 = MODE0(GPIO141) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO142 = MODE0(GPIO142) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO143 = MODE0(GPIO143) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO144 = MODE0(GPIO144) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO145 = MODE0(GPIO145) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO146 = MODE0(GPIO146) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO147 = MODE0(GPIO147) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 44 +GPIO148 = MODE0(GPIO148) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 45 +GPIO149 = MODE0(GPIO149) MODE1(AUD_CLK_MOSI) MODE2() MODE3(I2S1_BCK) MODE4() MODE5() MODE6() MODE7() -1 46 +GPIO150 = MODE0(GPIO150) MODE1(AUD_DAT_MOSI) MODE2(AUD_DAT_MISO) MODE3(I2S1_LRCK) MODE4() MODE5() MODE6() MODE7() -1 46 +GPIO151 = MODE0(GPIO151) MODE1(AUD_DAT_MISO) MODE2(AUD_DAT_MOSI) MODE3(I2S1_DO) MODE4() MODE5() MODE6() MODE7() -1 46 +GPIO152 = MODE0(GPIO152) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO153 = MODE0(GPIO153) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO154 = MODE0(GPIO154) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO155 = MODE0(GPIO155) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 47 +GPIO156 = MODE0(GPIO156) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 48 +GPIO157 = MODE0(GPIO157) MODE1(DISP_PWM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A14) -1 17 +GPIO158 = MODE0(GPIO158) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A16) -1 17 +GPIO159 = MODE0(GPIO159) MODE1(RFIC0_BSI_EN) MODE2(SPM_BSI_EN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B17) -1 23 +GPIO160 = MODE0(GPIO160) MODE1(RFIC0_BSI_CK) MODE2(SPM_BSI_CK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B18) -1 23 +GPIO161 = MODE0(GPIO161) MODE1(CMMCLK0) MODE2() MODE3() MODE4(CONN_MCU_AICE_TMSC) MODE5() MODE6() MODE7(DBG_MON_A8) -1 49 +GPIO162 = MODE0(GPIO162) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO163 = MODE0(GPIO163) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO164 = MODE0(GPIO164) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO165 = MODE0(GPIO165) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO166 = MODE0(GPIO166) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO167 = MODE0(GPIO167) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO168 = MODE0(GPIO168) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO169 = MODE0(GPIO169) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO170 = MODE0(GPIO170) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO171 = MODE0(GPIO171) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO172 = MODE0(GPIO172) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO173 = MODE0(GPIO173) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO174 = MODE0(GPIO174) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO175 = MODE0(GPIO175) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO176 = MODE0(GPIO176) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO177 = MODE0(GPIO177) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 -1 +GPIO178 = MODE0(GPIO178) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A0) -1 50 +GPIO179 = MODE0(GPIO179) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A1) -1 51 +GPIO180 = MODE0(GPIO180) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A2) -1 52 +GPIO181 = MODE0(GPIO181) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A3) -1 50 +GPIO182 = MODE0(GPIO182) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A4) -1 50 +GPIO183 = MODE0(GPIO183) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A5) -1 50 +GPIO184 = MODE0(GPIO184) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A59) -1 50 +GPIO185 = MODE0(GPIO185) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A60) -1 53 +GPIO186 = MODE0(GPIO186) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A61) -1 50 +GPIO187 = MODE0(GPIO187) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A62) -1 50 +GPIO188 = MODE0(GPIO188) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A63) -1 50 +GPIO189 = MODE0(GPIO189) MODE1(MSDC0_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A64) -1 54 +GPIO190 = MODE0(GPIO190) MODE1(DSI1_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 55 +GPIO191 = MODE0(GPIO191) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 55 +GPIO192 = MODE0(GPIO192) MODE1(SCL4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 56 +GPIO193 = MODE0(GPIO193) MODE1(SDA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 56 + +[GPIO_EXT] +MIPI_PINS=63:64:65:66:75:76:77:78:137:138:139:140:141:142:143:144:145:146:162:163:164:165:166:167:168:169:170:171:172:173:174:175:176:177 + +[EINT] +EINT_COUNT = 153 +BUILTIN_EINT = 144/IDDIG:150/PWRAP_SPI0_MI:152/PWRAP_SPI0_MO +BUILTIN_144 = 0/4:6/3:11/2:23/2:42/1:45/6:78/2:116/4 +BUILTIN_150 = 152/1:154/2 +BUILTIN_152 = 152/2:154/1 +INTERNAL_EINT = 152/194:153/195:154/196:155/197:156/198:157/199:158/200:159/201:139/202:140/203:141/204:142/205:143/206:145/207:146/208:147/209:148/210:149/211 + +[EINT_MD1] +EINT_MD1_COUNT = 4 + +[ADC] +ADC_COUNT = 5 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 9 + +[CLK_BUF] +CLK_BUF_COUNT = 4 +DRIVING_CURRENT_PMIC_CLK_BUF1=2:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF2=1:2:1.4:1.9:2.4:2.9 +DRIVING_CURRENT_PMIC_CLK_BUF3=1:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_PMIC_CLK_BUF4=2:2:1.4:1.9:2.4:2.9 +DRIVING_CURRENT_RF_CLK_BUF1=2:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF2=0:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF3=1:2:0.4:0.9:1.4:1.9 +DRIVING_CURRENT_RF_CLK_BUF4=2:2:0.4:0.9:1.4:1.9 + +[SRC_PIN] +GPIO19::PAD_DPI_D6=2 +GPIO20::PAD_DPI_D7=1 +GPIO45::PAD_INT_SIM2=2 +GPIO46::PAD_INT_SIM1=1 +GPIO100::PAD_PWM_A=0 +GPIO109::PAD_CAM_CLK1=0 + +[POWER] +POWER_COUNT=4 +DVDD28_SIM1=VIO18:VIO28 +DVDD28_SIM2=VIO18:VIO28 +DVDD28_MC1=VIO18:VIO28 +DVDD28_MC2=VIO18:VIO28 diff --git a/tools/dct/config/MT6761.fig b/tools/dct/config/MT6761.fig new file mode 100644 index 000000000000..734bd20141d5 --- /dev/null +++ b/tools/dct/config/MT6761.fig @@ -0,0 +1,257 @@ +[Chip Type] +Chip = MT6761 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +GPIO_ModeNum = 8 +POWER_SUPPORT=0 +GPIO_COLUMN_ENABLE = 0 +GPIO_MODE_DIR_LINK = 1 +KEYPAD_EXTEND_TYPE=1 +POWER_TAB_ENABLE=0 +PMIC_APP_COUNT = 6 +AndroidPhone = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(UTXD1) MODE2(CLKM0) MODE3(MD_INT0) MODE4(I2S0_MCK) MODE5(MD_UTXD1) MODE6(TP_GPIO0_AO) MODE7(DBG_MON_B9) 0 60 +GPIO1 = MODE0(GPIO1) MODE1(URXD1) MODE2(CLKM1) MODE3() MODE4(I2S0_BCK) MODE5(MD_URXD1) MODE6(TP_GPIO1_AO) MODE7(DBG_MON_B10) 1 60 +GPIO2 = MODE0(GPIO2) MODE1(UCTS0) MODE2(CLKM2) MODE3(UTXD1) MODE4(I2S0_LRCK) MODE5(ANT_SEL6) MODE6(TP_GPIO2_AO) MODE7(DBG_MON_B11) 2 60 +GPIO3 = MODE0(GPIO3) MODE1(URTS0) MODE2(CLKM3) MODE3(URXD1) MODE4(I2S0_DI) MODE5(ANT_SEL7) MODE6(TP_GPIO3_AO) MODE7(DBG_MON_B12) 3 60 +GPIO4 = MODE0(GPIO4) MODE1(SPI1_B_MI) MODE2(SCP_SPI1_MI) MODE3(UCTS0) MODE4(I2S3_MCK) MODE5(SSPM_URXD_AO) MODE6(TP_GPIO4_AO) MODE7() 4 61 +GPIO5 = MODE0(GPIO5) MODE1(SPI1_B_CSB) MODE2(SCP_SPI1_CS) MODE3(URTS0) MODE4(I2S3_BCK) MODE5(SSPM_UTXD_AO) MODE6(TP_GPIO5_AO) MODE7() 5 61 +GPIO6 = MODE0(GPIO6) MODE1(SPI1_B_MO) MODE2(SCP_SPI1_MO) MODE3(PWM0) MODE4(I2S3_LRCK) MODE5(MD_UTXD0) MODE6(TP_GPIO6_AO) MODE7() 6 61 +GPIO7 = MODE0(GPIO7) MODE1(SPI1_B_CLK) MODE2(SCP_SPI1_CK) MODE3(PWM1) MODE4(I2S3_DO) MODE5(MD_URXD0) MODE6(TP_GPIO7_AO) MODE7() 7 61 +GPIO8 = MODE0(GPIO8) MODE1(UTXD1) MODE2(SRCLKENAI0) MODE3(MD_INT1_C2K_UIM0_HOT_PLUG) MODE4(ANT_SEL3) MODE5(MFG_JTAG_TRSTN) MODE6(I2S2_MCK) MODE7(JTRSTN_SEL1) 8 56 +GPIO9 = MODE0(GPIO9) MODE1(MD_INT0) MODE2(CMMCLK2) MODE3(CONN_MCU_TRST_B) MODE4(IDDIG) MODE5(SDA_6306) MODE6(MCUPM_JTAG_TRSTN) MODE7(DBG_MON_B22) 9 68 +GPIO10 = MODE0(GPIO10) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2() MODE3(CONN_MCU_DBGI_N) MODE4(SRCLKENAI1) MODE5(EXT_FRAME_SYNC) MODE6(CMVREF1) MODE7(DBG_MON_B23) 10 68 +GPIO11 = MODE0(GPIO11) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(CLKM3) MODE3(ANT_SEL6) MODE4(SRCLKENAI0) MODE5(EXT_FRAME_SYNC) MODE6(UCTS1) MODE7(DBG_MON_B24) 11 68 +GPIO12 = MODE0(GPIO12) MODE1(PWM0) MODE2(SRCLKENAI1) MODE3(EXT_FRAME_SYNC) MODE4(MD_INT0) MODE5(DVFSRC_EXT_REQ) MODE6(URTS1) MODE7() 12 14 +GPIO13 = MODE0(GPIO13) MODE1(ANT_SEL0) MODE2(SPI4_MI) MODE3(SCP_SPI0_MI) MODE4(MD_URXD0) MODE5(CLKM0) MODE6(I2S0_MCK) MODE7(DBG_MON_A0) 13 15 +GPIO14 = MODE0(GPIO14) MODE1(ANT_SEL1) MODE2(SPI4_CSB) MODE3(SCP_SPI0_CS) MODE4(MD_UTXD0) MODE5(CLKM1) MODE6(I2S0_BCK) MODE7(DBG_MON_A1) 14 15 +GPIO15 = MODE0(GPIO15) MODE1(ANT_SEL2) MODE2(SPI4_MO) MODE3(SCP_SPI0_MO) MODE4(MD_URXD1) MODE5(CLKM2) MODE6(I2S0_LRCK) MODE7(DBG_MON_A2) 15 15 +GPIO16 = MODE0(GPIO16) MODE1(ANT_SEL3) MODE2(SPI4_CLK) MODE3(SCP_SPI0_CK) MODE4(MD_UTXD1) MODE5(CLKM3) MODE6(I2S3_MCK) MODE7(DBG_MON_A3) 16 15 +GPIO17 = MODE0(GPIO17) MODE1(ANT_SEL4) MODE2(SPI2_MO) MODE3(SCP_SPI0_MO) MODE4(PWM1) MODE5(IDDIG) MODE6(I2S0_DI) MODE7(DBG_MON_A4) 17 16 +GPIO18 = MODE0(GPIO18) MODE1(ANT_SEL5) MODE2(SPI2_CLK) MODE3(SCP_SPI0_CK) MODE4(MD_INT0) MODE5(USB_DRVVBUS) MODE6(I2S3_BCK) MODE7(DBG_MON_A5) 18 16 +GPIO19 = MODE0(GPIO19) MODE1(ANT_SEL6) MODE2(SPI2_MI) MODE3(SCP_SPI0_MI) MODE4(MD_INT2_C2K_UIM1_HOT_PLUG) MODE5() MODE6(I2S3_LRCK) MODE7(DBG_MON_A6) 19 16 +GPIO20 = MODE0(GPIO20) MODE1(ANT_SEL7) MODE2(SPI2_CSB) MODE3(SCP_SPI0_CS) MODE4(MD_INT1_C2K_UIM0_HOT_PLUG) MODE5(CMMCLK3) MODE6(I2S3_DO) MODE7(DBG_MON_A7) 20 16 +GPIO21 = MODE0(GPIO21) MODE1(SPI3_MI) MODE2(SRCLKENAI1) MODE3(DAP_MD32_SWD) MODE4(CMVREF0) MODE5(SCP_SPI0_MI) MODE6(I2S2_MCK) MODE7(DBG_MON_A8) 21 17 +GPIO22 = MODE0(GPIO22) MODE1(SPI3_CSB) MODE2(SRCLKENAI0) MODE3(DAP_MD32_SWCK) MODE4(CMVREF1) MODE5(SCP_SPI0_CS) MODE6(I2S2_BCK) MODE7(DBG_MON_A9) 22 17 +GPIO23 = MODE0(GPIO23) MODE1(SPI3_MO) MODE2(PWM0) MODE3(KPROW7) MODE4(ANT_SEL3) MODE5(SCP_SPI0_MO) MODE6(I2S2_LRCK) MODE7(DBG_MON_A10) 23 17 +GPIO24 = MODE0(GPIO24) MODE1(SPI3_CLK) MODE2(UDI_TCK) MODE3(IO_JTAG_TCK) MODE4(SSPM_JTAG_TCK) MODE5(SCP_SPI0_CK) MODE6(I2S2_DI) MODE7(DBG_MON_A11) 24 17 +GPIO25 = MODE0(GPIO25) MODE1(SPI1_A_MI) MODE2(UDI_TMS) MODE3(IO_JTAG_TMS) MODE4(SSPM_JTAG_TMS) MODE5(KPROW3) MODE6(I2S1_MCK) MODE7(DBG_MON_A12) 25 18 +GPIO26 = MODE0(GPIO26) MODE1(SPI1_A_CSB) MODE2(UDI_TDI) MODE3(IO_JTAG_TDI) MODE4(SSPM_JTAG_TDI) MODE5(KPROW4) MODE6(I2S1_BCK) MODE7(DBG_MON_A13) 26 18 +GPIO27 = MODE0(GPIO27) MODE1(SPI1_A_MO) MODE2(UDI_TDO) MODE3(IO_JTAG_TDO) MODE4(SSPM_JTAG_TDO) MODE5(KPROW5) MODE6(I2S1_LRCK) MODE7(DBG_MON_A14) 27 18 +GPIO28 = MODE0(GPIO28) MODE1(SPI1_A_CLK) MODE2(UDI_NTRST) MODE3(IO_JTAG_TRSTN) MODE4(SSPM_JTAG_TRSTN) MODE5(KPROW6) MODE6(I2S1_DO) MODE7(DBG_MON_A15) 28 18 +GPIO29 = MODE0(GPIO29) MODE1(MSDC1_CLK) MODE2(IO_JTAG_TCK) MODE3(UDI_TCK) MODE4(CONN_DSP_JCK) MODE5(SSPM_JTAG_TCK) MODE6(CONN_MCU_AICE_TCKC) MODE7(DAP_MD32_SWCK) 29 19 +GPIO30 = MODE0(GPIO30) MODE1(MSDC1_CMD) MODE2(IO_JTAG_TMS) MODE3(UDI_TMS) MODE4(CONN_DSP_JMS) MODE5(SSPM_JTAG_TMS) MODE6(CONN_MCU_AICE_TMSC) MODE7(DAP_MD32_SWD) 30 20 +GPIO31 = MODE0(GPIO31) MODE1(MSDC1_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 31 21 +GPIO32 = MODE0(GPIO32) MODE1(MSDC1_DAT0) MODE2(IO_JTAG_TDI) MODE3(UDI_TDI) MODE4(CONN_DSP_JDI) MODE5(SSPM_JTAG_TDI) MODE6() MODE7() 32 21 +GPIO33 = MODE0(GPIO33) MODE1(MSDC1_DAT2) MODE2(IO_JTAG_TRSTN) MODE3(UDI_NTRST) MODE4(CONN_DSP_JINTP) MODE5(SSPM_JTAG_TRSTN) MODE6() MODE7() 33 21 +GPIO34 = MODE0(GPIO34) MODE1(MSDC1_DAT1) MODE2(IO_JTAG_TDO) MODE3(UDI_TDO) MODE4(CONN_DSP_JDO) MODE5(SSPM_JTAG_TDO) MODE6() MODE7() 34 21 +GPIO35 = MODE0(GPIO35) MODE1(MD1_SIM2_SIO) MODE2(CCU_JTAG_TDO) MODE3(MD1_SIM1_SIO) MODE4() MODE5(SCP_JTAG_TDO) MODE6(CONN_DSP_JDO) MODE7(DBG_MON_A16) 35 22 +GPIO36 = MODE0(GPIO36) MODE1(MD1_SIM2_SRST) MODE2(CCU_JTAG_TMS) MODE3(MD1_SIM1_SRST) MODE4(CONN_MCU_AICE_TMSC) MODE5(SCP_JTAG_TMS) MODE6(CONN_DSP_JMS) MODE7(DBG_MON_A17) 36 22 +GPIO37 = MODE0(GPIO37) MODE1(MD1_SIM2_SCLK) MODE2(CCU_JTAG_TDI) MODE3(MD1_SIM1_SCLK) MODE4() MODE5(SCP_JTAG_TDI) MODE6(CONN_DSP_JDI) MODE7(DBG_MON_A18) 37 23 +GPIO38 = MODE0(GPIO38) MODE1(MD1_SIM1_SCLK) MODE2() MODE3(MD1_SIM2_SCLK) MODE4() MODE5() MODE6() MODE7(DBG_MON_A19) 38 24 +GPIO39 = MODE0(GPIO39) MODE1(MD1_SIM1_SRST) MODE2(CCU_JTAG_TCK) MODE3(MD1_SIM2_SRST) MODE4(CONN_MCU_AICE_TCKC) MODE5(SCP_JTAG_TCK) MODE6(CONN_DSP_JCK) MODE7(DBG_MON_A20) 39 25 +GPIO40 = MODE0(GPIO40) MODE1(MD1_SIM1_SIO) MODE2(CCU_JTAG_TRST) MODE3(MD1_SIM2_SIO) MODE4() MODE5(SCP_JTAG_TRSTN) MODE6(CONN_DSP_JINTP) MODE7(DBG_MON_A21) 40 25 +GPIO41 = MODE0(GPIO41) MODE1(IDDIG) MODE2(URXD1) MODE3(UCTS0) MODE4(KPCOL2) MODE5(SSPM_UTXD_AO) MODE6(MD_INT0) MODE7(DBG_MON_A22) 41 29 +GPIO42 = MODE0(GPIO42) MODE1(USB_DRVVBUS) MODE2(UTXD1) MODE3(URTS0) MODE4(KPROW2) MODE5(SSPM_URXD_AO) MODE6(MD_INT1_C2K_UIM0_HOT_PLUG) MODE7(DBG_MON_A23) 42 29 +GPIO43 = MODE0(GPIO43) MODE1(DISP_PWM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A24) 43 30 +GPIO44 = MODE0(GPIO44) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A25) 44 31 +GPIO45 = MODE0(GPIO45) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A26) 45 32 +GPIO46 = MODE0(GPIO46) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(UCTS0) MODE3(UCTS1) MODE4(IDDIG) MODE5(SCL_6306) MODE6(TP_UCTS1_AO) MODE7(DBG_MON_A27) 46 33 +GPIO47 = MODE0(GPIO47) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2(URTS0) MODE3(URTS1) MODE4(USB_DRVVBUS) MODE5(SDA_6306) MODE6(TP_URTS1_AO) MODE7(DBG_MON_A28) 47 33 +GPIO48 = MODE0(GPIO48) MODE1(SCL5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A29) 48 27 +GPIO49 = MODE0(GPIO49) MODE1(SDA5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A30) 49 28 +GPIO50 = MODE0(GPIO50) MODE1(SCL3) MODE2(URXD1) MODE3(MD_URXD1) MODE4(SSPM_URXD_AO) MODE5(IDDIG) MODE6(TP_URXD1_AO) MODE7(DBG_MON_A31) 50 34 +GPIO51 = MODE0(GPIO51) MODE1(SDA3) MODE2(UTXD1) MODE3(MD_UTXD1) MODE4(SSPM_UTXD_AO) MODE5(USB_DRVVBUS) MODE6(TP_UTXD1_AO) MODE7(DBG_MON_A32) 51 35 +GPIO52 = MODE0(GPIO52) MODE1(BPI_BUS15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 52 41 +GPIO53 = MODE0(GPIO53) MODE1(BPI_BUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 53 41 +GPIO54 = MODE0(GPIO54) MODE1(BPI_BUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 54 41 +GPIO55 = MODE0(GPIO55) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 55 41 +GPIO56 = MODE0(GPIO56) MODE1(BPI_BUS9) MODE2(SCL_6306) MODE3() MODE4() MODE5() MODE6() MODE7() 56 41 +GPIO57 = MODE0(GPIO57) MODE1(BPI_BUS10) MODE2(SDA_6306) MODE3() MODE4() MODE5() MODE6() MODE7() 57 41 +GPIO58 = MODE0(GPIO58) MODE1(RFIC0_BSI_D2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 58 42 +GPIO59 = MODE0(GPIO59) MODE1(RFIC0_BSI_D1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 59 42 +GPIO60 = MODE0(GPIO60) MODE1(RFIC0_BSI_D0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 60 42 +GPIO61 = MODE0(GPIO61) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 61 44 +GPIO62 = MODE0(GPIO62) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 62 44 +GPIO63 = MODE0(GPIO63) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 63 45 +GPIO64 = MODE0(GPIO64) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 64 45 +GPIO65 = MODE0(GPIO65) MODE1(MIPI3_SDATA) MODE2(BPI_BUS16) MODE3() MODE4() MODE5() MODE6() MODE7() 65 46 +GPIO66 = MODE0(GPIO66) MODE1(MIPI3_SCLK) MODE2(BPI_BUS17) MODE3() MODE4() MODE5() MODE6() MODE7() 66 46 +GPIO67 = MODE0(GPIO67) MODE1(MIPI2_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 67 47 +GPIO68 = MODE0(GPIO68) MODE1(MIPI2_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 68 47 +GPIO69 = MODE0(GPIO69) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 69 48 +GPIO70 = MODE0(GPIO70) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 70 48 +GPIO71 = MODE0(GPIO71) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 71 48 +GPIO72 = MODE0(GPIO72) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 72 48 +GPIO73 = MODE0(GPIO73) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 73 48 +GPIO74 = MODE0(GPIO74) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 74 49 +GPIO75 = MODE0(GPIO75) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 75 49 +GPIO76 = MODE0(GPIO76) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 76 49 +GPIO77 = MODE0(GPIO77) MODE1(BPI_BUS14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 77 49 +GPIO78 = MODE0(GPIO78) MODE1(BPI_BUS11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 78 49 +GPIO79 = MODE0(GPIO79) MODE1(BPI_PA_VM1) MODE2(MIPI4_SDATA) MODE3() MODE4() MODE5() MODE6() MODE7() 79 50 +GPIO80 = MODE0(GPIO80) MODE1(BPI_PA_VM0) MODE2(MIPI4_SCLK) MODE3() MODE4() MODE5() MODE6() MODE7() 80 50 +GPIO81 = MODE0(GPIO81) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B0) 81 51 +GPIO82 = MODE0(GPIO82) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B1) 82 52 +GPIO83 = MODE0(GPIO83) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B2) 83 53 +GPIO84 = MODE0(GPIO84) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B3) 84 54 +GPIO85 = MODE0(GPIO85) MODE1(RFIC0_BSI_EN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 85 42 +GPIO86 = MODE0(GPIO86) MODE1(RFIC0_BSI_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 86 43 +GPIO87 = MODE0(GPIO87) MODE1() MODE2(MD_INT1_C2K_UIM0_HOT_PLUG) MODE3(CMVREF0) MODE4(MD_URXD0) MODE5(AGPS_SYNC) MODE6(EXT_FRAME_SYNC) MODE7() 87 40 +GPIO88 = MODE0(GPIO88) MODE1(CMMCLK3) MODE2(MD_INT2_C2K_UIM1_HOT_PLUG) MODE3(CMVREF1) MODE4(MD_UTXD0) MODE5(AGPS_SYNC) MODE6(DVFSRC_EXT_REQ) MODE7() 88 38 +GPIO89 = MODE0(GPIO89) MODE1(SRCLKENAI0) MODE2(PWM2) MODE3(MD_INT0) MODE4(USB_DRVVBUS) MODE5(SCL_6306) MODE6(TP_GPIO4_AO) MODE7(DBG_MON_B21) 89 67 +GPIO90 = MODE0(GPIO90) MODE1(URXD1) MODE2(PWM0) MODE3(MD_INT2_C2K_UIM1_HOT_PLUG) MODE4(ANT_SEL4) MODE5(USB_DRVVBUS) MODE6(I2S2_BCK) MODE7(DBG_MON_B4) 90 57 +GPIO91 = MODE0(GPIO91) MODE1(KPROW1) MODE2(PWM2) MODE3(MD_INT0) MODE4(ANT_SEL5) MODE5(IDDIG) MODE6(I2S2_LRCK) MODE7(DBG_MON_B5) 91 58 +GPIO92 = MODE0(GPIO92) MODE1(KPROW0) MODE2() MODE3() MODE4() MODE5(DVFSRC_EXT_REQ) MODE6(I2S2_DI) MODE7(DBG_MON_B6) 92 58 +GPIO93 = MODE0(GPIO93) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B7) 93 59 +GPIO94 = MODE0(GPIO94) MODE1(KPCOL1) MODE2() MODE3() MODE4() MODE5(CMFLASH) MODE6(CMVREF0) MODE7(DBG_MON_B8) 94 59 +GPIO95 = MODE0(GPIO95) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD0) MODE4(PTA_RXD) MODE5(SSPM_URXD_AO) MODE6(WIFI_RXD) MODE7() 95 62 +GPIO96 = MODE0(GPIO96) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD0) MODE4(PTA_TXD) MODE5(SSPM_UTXD_AO) MODE6(WIFI_TXD) MODE7() 96 62 +GPIO97 = MODE0(GPIO97) MODE1(UCTS0) MODE2(I2S1_MCK) MODE3(CONN_MCU_TDO) MODE4(SPI5_MI) MODE5(SCL_6306) MODE6(MCUPM_JTAG_TDO) MODE7(DBG_MON_B15) 97 63 +GPIO98 = MODE0(GPIO98) MODE1(URTS0) MODE2(I2S1_BCK) MODE3(CONN_MCU_TMS) MODE4(SPI5_CSB) MODE5() MODE6(MCUPM_JTAG_TMS) MODE7(DBG_MON_B16) 98 63 +GPIO99 = MODE0(GPIO99) MODE1(CMMCLK0) MODE2() MODE3() MODE4(AUXIF_CLK) MODE5(PTA_RXD) MODE6(CONN_UART0_RXD) MODE7(DBG_MON_B17) 99 64 +GPIO100 = MODE0(GPIO100) MODE1(CMMCLK1) MODE2() MODE3() MODE4(AUXIF_ST) MODE5(PTA_TXD) MODE6(CONN_UART0_TXD) MODE7(DBG_MON_B18) 100 65 +GPIO101 = MODE0(GPIO101) MODE1(CMFLASH) MODE2(I2S1_LRCK) MODE3(CONN_MCU_TCK) MODE4(SPI5_MO) MODE5() MODE6(MCUPM_JTAG_TCK) MODE7(DBG_MON_B19) 101 66 +GPIO102 = MODE0(GPIO102) MODE1(CMVREF0) MODE2(I2S1_DO) MODE3(CONN_MCU_TDI) MODE4(SPI5_CLK) MODE5(AGPS_SYNC) MODE6(MCUPM_JTAG_TDI) MODE7(DBG_MON_B20) 102 66 +GPIO103 = MODE0(GPIO103) MODE1(SCL2) MODE2(TP_UTXD1_AO) MODE3(MD_UTXD0) MODE4(MD_UTXD1) MODE5(TP_URTS2_AO) MODE6(WIFI_TXD) MODE7(DBG_MON_B25) 103 69 +GPIO104 = MODE0(GPIO104) MODE1(SDA2) MODE2(TP_URXD1_AO) MODE3(MD_URXD0) MODE4(MD_URXD1) MODE5(TP_UCTS2_AO) MODE6(WIFI_RXD) MODE7(DBG_MON_B26) 104 70 +GPIO105 = MODE0(GPIO105) MODE1(SCL4) MODE2() MODE3(MD_UTXD1) MODE4(MD_UTXD0) MODE5(TP_UTXD2_AO) MODE6(PTA_TXD) MODE7(DBG_MON_B27) 105 71 +GPIO106 = MODE0(GPIO106) MODE1(SDA4) MODE2() MODE3(MD_URXD1) MODE4(MD_URXD0) MODE5(TP_URXD2_AO) MODE6(PTA_RXD) MODE7(DBG_MON_B28) 106 72 +GPIO107 = MODE0(GPIO107) MODE1(UTXD1) MODE2(MD_UTXD0) MODE3(SDA_6306) MODE4(KPCOL3) MODE5(CMVREF0) MODE6(URTS0) MODE7(DBG_MON_B29) 107 73 +GPIO108 = MODE0(GPIO108) MODE1(CMMCLK2) MODE2(MD_INT0) MODE3(CONN_MCU_DBGACK_N) MODE4(KPCOL4) MODE5() MODE6(I2S3_MCK) MODE7(DBG_MON_B30) 108 74 +GPIO109 = MODE0(GPIO109) MODE1(URXD1) MODE2(MD_URXD0) MODE3(ANT_SEL7) MODE4(KPCOL5) MODE5(CMVREF1) MODE6(UCTS0) MODE7(DBG_MON_B31) 109 75 +GPIO110 = MODE0(GPIO110) MODE1(ANT_SEL0) MODE2(CLKM0) MODE3(PWM3) MODE4(MD_INT0) MODE5(IDDIG) MODE6(I2S3_BCK) MODE7(DBG_MON_B13) 110 78 +GPIO111 = MODE0(GPIO111) MODE1(ANT_SEL1) MODE2(CLKM1) MODE3(PWM4) MODE4(PTA_RXD) MODE5(CMVREF0) MODE6(I2S3_LRCK) MODE7(DBG_MON_B14) 111 79 +GPIO112 = MODE0(GPIO112) MODE1(ANT_SEL2) MODE2(CLKM2) MODE3(PWM5) MODE4(PTA_TXD) MODE5(CMVREF1) MODE6(I2S3_DO) MODE7() 112 80 +GPIO113 = MODE0(GPIO113) MODE1(CONN_TOP_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 81 +GPIO114 = MODE0(GPIO114) MODE1(CONN_TOP_DATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 82 +GPIO115 = MODE0(GPIO115) MODE1(CONN_BT_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 85 +GPIO116 = MODE0(GPIO116) MODE1(CONN_BT_DATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 86 +GPIO117 = MODE0(GPIO117) MODE1(CONN_WF_CTRL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 87 +GPIO118 = MODE0(GPIO118) MODE1(CONN_WF_CTRL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 88 +GPIO119 = MODE0(GPIO119) MODE1(CONN_WF_CTRL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 89 +GPIO120 = MODE0(GPIO120) MODE1(CONN_WB_PTA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 84 +GPIO121 = MODE0(GPIO121) MODE1(CONN_HRST_B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 83 +GPIO122 = MODE0(GPIO122) MODE1(MSDC0_CMD) MODE2(MSDC0_CMD) MODE3() MODE4() MODE5() MODE6() MODE7() -1 90 +GPIO123 = MODE0(GPIO123) MODE1(MSDC0_DAT0) MODE2(MSDC0_DAT4) MODE3() MODE4() MODE5() MODE6() MODE7() -1 91 +GPIO124 = MODE0(GPIO124) MODE1(MSDC0_CLK) MODE2(MSDC0_CLK) MODE3() MODE4() MODE5() MODE6() MODE7() -1 99 +GPIO125 = MODE0(GPIO125) MODE1(MSDC0_DAT2) MODE2(MSDC0_DAT5) MODE3() MODE4() MODE5() MODE6() MODE7() -1 92 +GPIO126 = MODE0(GPIO126) MODE1(MSDC0_DAT4) MODE2(MSDC0_DAT2) MODE3() MODE4() MODE5() MODE6() MODE7() -1 93 +GPIO127 = MODE0(GPIO127) MODE1(MSDC0_DAT6) MODE2(MSDC0_DAT1) MODE3() MODE4() MODE5() MODE6() MODE7() -1 94 +GPIO128 = MODE0(GPIO128) MODE1(MSDC0_DAT1) MODE2(MSDC0_DAT6) MODE3() MODE4() MODE5() MODE6() MODE7() -1 95 +GPIO129 = MODE0(GPIO129) MODE1(MSDC0_DAT5) MODE2(MSDC0_DAT0) MODE3() MODE4() MODE5() MODE6() MODE7() -1 96 +GPIO130 = MODE0(GPIO130) MODE1(MSDC0_DAT7) MODE2(MSDC0_DAT7) MODE3() MODE4() MODE5() MODE6() MODE7() -1 97 +GPIO131 = MODE0(GPIO131) MODE1(MSDC0_DSL) MODE2(MSDC0_DSL) MODE3() MODE4() MODE5() MODE6() MODE7() -1 98 +GPIO132 = MODE0(GPIO132) MODE1(MSDC0_DAT3) MODE2(MSDC0_DAT3) MODE3() MODE4() MODE5() MODE6() MODE7() -1 100 +GPIO133 = MODE0(GPIO133) MODE1(MSDC0_RSTB) MODE2(MSDC0_RSTB) MODE3() MODE4() MODE5() MODE6() MODE7() -1 101 +GPIO134 = MODE0(GPIO134) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 1 +GPIO135 = MODE0(GPIO135) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 2 +GPIO136 = MODE0(GPIO136) MODE1(AUD_CLK_MOSI) MODE2(AUD_CLK_MISO) MODE3(I2S1_MCK) MODE4() MODE5() MODE6() MODE7() -1 3 +GPIO137 = MODE0(GPIO137) MODE1(AUD_SYNC_MOSI) MODE2(AUD_SYNC_MISO) MODE3(I2S1_BCK) MODE4() MODE5() MODE6() MODE7() -1 4 +GPIO138 = MODE0(GPIO138) MODE1(AUD_DAT_MOSI0) MODE2(AUD_DAT_MISO0) MODE3(I2S1_LRCK) MODE4() MODE5() MODE6() MODE7() -1 5 +GPIO139 = MODE0(GPIO139) MODE1(AUD_DAT_MOSI1) MODE2(AUD_DAT_MISO1) MODE3(I2S1_DO) MODE4() MODE5() MODE6() MODE7() -1 6 +GPIO140 = MODE0(GPIO140) MODE1(AUD_CLK_MISO) MODE2(AUD_CLK_MOSI) MODE3(I2S2_MCK) MODE4() MODE5() MODE6() MODE7() -1 7 +GPIO141 = MODE0(GPIO141) MODE1(AUD_SYNC_MISO) MODE2(AUD_SYNC_MOSI) MODE3(I2S2_BCK) MODE4() MODE5() MODE6() MODE7() -1 8 +GPIO142 = MODE0(GPIO142) MODE1(AUD_DAT_MISO0) MODE2(AUD_DAT_MOSI0) MODE3(I2S2_LRCK) MODE4() MODE5() MODE6() MODE7() -1 9 +GPIO143 = MODE0(GPIO143) MODE1(AUD_DAT_MISO1) MODE2(AUD_DAT_MOSI1) MODE3(I2S2_DI) MODE4() MODE5() MODE6() MODE7() -1 10 +GPIO144 = MODE0(GPIO144) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO145 = MODE0(GPIO145) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO146 = MODE0(GPIO146) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO147 = MODE0(GPIO147) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO148 = MODE0(GPIO148) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 13 +GPIO149 = MODE0(GPIO149) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 13 +GPIO150 = MODE0(GPIO150) MODE1(PWM0) MODE2(CMFLASH) MODE3(ANT_SEL3) MODE4() MODE5(MD_URXD0) MODE6(TP_URXD2_AO) MODE7() -1 36 +GPIO151 = MODE0(GPIO151) MODE1(PWM1) MODE2(CMVREF0) MODE3(ANT_SEL4) MODE4() MODE5(MD_UTXD0) MODE6(TP_UTXD2_AO) MODE7() -1 36 +GPIO152 = MODE0(GPIO152) MODE1(PWM2) MODE2(CMVREF1) MODE3(ANT_SEL5) MODE4() MODE5(MD_URXD1) MODE6(TP_UCTS1_AO) MODE7() -1 37 +GPIO153 = MODE0(GPIO153) MODE1(PWM3) MODE2(CLKM0) MODE3(ANT_SEL6) MODE4() MODE5(MD_UTXD1) MODE6(TP_URTS1_AO) MODE7() -1 37 +GPIO154 = MODE0(GPIO154) MODE1(PWM5) MODE2(CLKM2) MODE3(USB_DRVVBUS) MODE4() MODE5(PTA_TXD) MODE6(CONN_UART0_TXD) MODE7() -1 39 +GPIO155 = MODE0(GPIO155) MODE1(SPI0_MI) MODE2(IDDIG) MODE3(AGPS_SYNC) MODE4(TP_GPIO0_AO) MODE5(MFG_JTAG_TDO) MODE6(DFD_TDO) MODE7(JTDO_SEL1) -1 55 +GPIO156 = MODE0(GPIO156) MODE1(SPI0_CSB) MODE2(USB_DRVVBUS) MODE3(DVFSRC_EXT_REQ) MODE4(TP_GPIO1_AO) MODE5(MFG_JTAG_TMS) MODE6(DFD_TMS) MODE7(JTMS_SEL1) -1 55 +GPIO157 = MODE0(GPIO157) MODE1(SPI0_MO) MODE2(MD_INT1_C2K_UIM0_HOT_PLUG) MODE3(CLKM0) MODE4(TP_GPIO2_AO) MODE5(MFG_JTAG_TDI) MODE6(DFD_TDI) MODE7(JTDI_SEL1) -1 55 +GPIO158 = MODE0(GPIO158) MODE1(SPI0_CLK) MODE2(MD_INT2_C2K_UIM1_HOT_PLUG) MODE3(EXT_FRAME_SYNC) MODE4(TP_GPIO3_AO) MODE5(MFG_JTAG_TCK) MODE6(DFD_TCK_XI) MODE7(JTCK_SEL1) -1 55 +GPIO159 = MODE0(GPIO159) MODE1(PWM4) MODE2(CLKM1) MODE3(ANT_SEL7) MODE4() MODE5(PTA_RXD) MODE6(CONN_UART0_RXD) MODE7() -1 39 +GPIO160 = MODE0(GPIO160) MODE1(CLKM0) MODE2(PWM2) MODE3(EXT_FRAME_SYNC) MODE4(TP_GPIO5_AO) MODE5(AGPS_SYNC) MODE6(DVFSRC_EXT_REQ) MODE7() -1 11 +GPIO161 = MODE0(GPIO161) MODE1(SCL6) MODE2(SCL_6306) MODE3(TP_GPIO6_AO) MODE4(KPCOL6) MODE5(PTA_RXD) MODE6(CONN_UART0_RXD) MODE7() -1 76 +GPIO162 = MODE0(GPIO162) MODE1(SDA6) MODE2(SDA_6306) MODE3(TP_GPIO7_AO) MODE4(KPCOL7) MODE5(PTA_TXD) MODE6(CONN_UART0_TXD) MODE7() -1 77 +GPIO163 = MODE0(GPIO163) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO164 = MODE0(GPIO164) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO165 = MODE0(GPIO165) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO166 = MODE0(GPIO166) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO167 = MODE0(GPIO167) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO168 = MODE0(GPIO168) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO169 = MODE0(GPIO169) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO170 = MODE0(GPIO170) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO171 = MODE0(GPIO171) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO172 = MODE0(GPIO172) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO173 = MODE0(GPIO173) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO174 = MODE0(GPIO174) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO175 = MODE0(GPIO175) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO176 = MODE0(GPIO176) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO177 = MODE0(GPIO177) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO178 = MODE0(GPIO178) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO179 = MODE0(GPIO179) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 151 -1 + +[EINT] +EINT_COUNT = 160 +BUILTIN_EINT=144/PWRAP_SPI0_MI:145/PWRAP_SPI0_MO:147/IDDIG +BUILTIN_147=9/4:17/5:41/1:46/4:50/5:91/5:110/5:155/2 +BUILTIN_144=144/1 +BUILTIN_145=146/1 + + +[EINT_MD1] +EINT_MD1_COUNT = 3 + +[ADC] +ADC_COUNT = 5 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 10 + +[CLK_BUF] +CLK_BUF_COUNT = 7 +DRIVING_CURRENT_PMIC_CLK_BUF1=2:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF2=1:1:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF3=1:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF4=2:1:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF5=0:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF6=0:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF7=0:1:0.6:1.0:1.4:1.7 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 4 + +[SRC_PIN] +GPIO0::PAD_EINT0=0 +GPIO8::PAD_EINT8=1 +GPIO9::PAD_EINT9=0 +GPIO10::PAD_EINT10=1 +GPIO11::PAD_EINT11=2 +GPIO12::PAD_EINT12=0 +GPIO18::PAD_SPI2_CLK=0 +GPIO19::PAD_SPI2_MI=2 +GPIO20::PAD_SPI2_CSB=1 +GPIO41::PAD_IDDIG=0 +GPOI42::PAD_DRVBUS=1 +GPIO46::PAD_INT_SIM2=2 +GPIO47::PAD_INT_SIM1=1 +GPIO87::PAD_CAM_RST3=1 +GPIO88::PAD_CAM_CLK3=2 +GPIO89::PAD_SRCLKENAI=0 +GPIO90::PAD_PWM0=2 +GPIO91::PAD_KPROW1=0 +GPIO108::PAD_CAM_CLK2=0 +GPIO110::PAD_ANT_SEL0=0 +GPIO157::PAD_SPI0_MO=1 +GPIO158::PAD_SPI0_CLK=2 + +[POWER] +POWER_COUNT=0 diff --git a/tools/dct/config/MT6763.fig b/tools/dct/config/MT6763.fig new file mode 100644 index 000000000000..4aa4118eea1f --- /dev/null +++ b/tools/dct/config/MT6763.fig @@ -0,0 +1,236 @@ +[Chip Type] +Chip = MT6763 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +GPIO_ModeNum = 8 +PMIC_APP_COUNT = 6 +KPD_EXTEND_ENABLE = 1 +AndroidPhone = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(PWM_B) MODE2(EXT_FRAME_SYNC) MODE3(CLKM0) MODE4(IDDIG) MODE5(MD_INT0) MODE6(I2S3_MCK) MODE7(SPI2_CSB) 0 0 +GPIO1 = MODE0(GPIO1) MODE1(PWM_C) MODE2(EXT_FRAME_SYNC) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5() MODE6(I2S3_BCK) MODE7(SPI2_MO) 1 0 +GPIO2 = MODE0(GPIO2) MODE1() MODE2(UTXD1) MODE3(CLKM2) MODE4(SCL6) MODE5() MODE6(I2S3_LRCK) MODE7(SPI2_CLK) 2 0 +GPIO3 = MODE0(GPIO3) MODE1(PWM_A) MODE2(URXD1) MODE3(CLKM3) MODE4(SDA6) MODE5() MODE6(I2S3_DO) MODE7(SPI1_B_MI) 3 0 +GPIO4 = MODE0(GPIO4) MODE1(PWM_B) MODE2(I2S0_MCK) MODE3(UCTS0) MODE4(MD_URXD1) MODE5(SSPM_URXD_AO) MODE6(ANT_SEL3) MODE7(SPI1_B_MI) 4 1 +GPIO5 = MODE0(GPIO5) MODE1(PWM_C) MODE2(I2S0_BCK) MODE3(URTS0) MODE4(MD_UTXD1) MODE5(SSPM_UTXD_AO) MODE6(ANT_SEL4) MODE7(SPI1_B_CSB) 5 1 +GPIO6 = MODE0(GPIO6) MODE1(PWM_A) MODE2(I2S0_LRCK) MODE3(IDDIG) MODE4(MD_URXD0) MODE5(CCU_URXD_AO) MODE6(ANT_SEL5) MODE7(SPI1_B_MO) 6 1 +GPIO7 = MODE0(GPIO7) MODE1(PWM_B) MODE2(I2S0_DI) MODE3(USB_DRVVBUS) MODE4(MD_UTXD0) MODE5(CCU_UTXD_AO) MODE6() MODE7(SPI1_B_CLK) 7 1 +GPIO8 = MODE0(GPIO8) MODE1(SRCLKENAI0) MODE2(UTXD1) MODE3(SCL6) MODE4(CONN_MCU_TRST_B) MODE5(EXT_FRAME_SYNC) MODE6(ANT_SEL3) MODE7(JTRSTN_SEL1) 8 2 +GPIO9 = MODE0(GPIO9) MODE1(PWM_A) MODE2(UCTS1) MODE3(DAP_MD32_SWD) MODE4(CONN_MCU_DBGACK_N) MODE5(SSPM_JTAG_TRSTN) MODE6(IO_JTAG_TRSTN) MODE7(DBG_MON_A43) 9 3 +GPIO10 = MODE0(GPIO10) MODE1(PWM_B) MODE2(URTS1) MODE3(DAP_MD32_SWCK) MODE4(CONN_MCU_DBGI_N) MODE5(EXT_FRAME_SYNC) MODE6() MODE7(DBG_MON_A44) 10 3 +GPIO11 = MODE0(GPIO11) MODE1(PWM_C) MODE2(IDDIG) MODE3(SCL6) MODE4(SRCLKENAI1) MODE5(CLKM0) MODE6() MODE7() 11 4 +GPIO12 = MODE0(GPIO12) MODE1(CMFLASH) MODE2(USB_DRVVBUS) MODE3(SDA6) MODE4(PWM_C) MODE5(CLKM3) MODE6() MODE7() 12 5 +GPIO13 = MODE0(GPIO13) MODE1(DPI_D0) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(MD_URXD0) MODE5(SPI4_MI) MODE6(I2S0_MCK) MODE7(DBG_MON_A7) 13 6 +GPIO14 = MODE0(GPIO14) MODE1(DPI_D1) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(MD_UTXD0) MODE5(SPI4_CSB) MODE6(I2S0_BCK) MODE7(DBG_MON_A8) 14 6 +GPIO15 = MODE0(GPIO15) MODE1(DPI_D2) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(MD_URXD1) MODE5(SPI4_MO) MODE6(I2S0_LRCK) MODE7(DBG_MON_A9) 15 6 +GPIO16 = MODE0(GPIO16) MODE1(DPI_D3) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(MD_UTXD1) MODE5(SPI4_CLK) MODE6(I2S0_DI) MODE7(DBG_MON_A10) 16 6 +GPIO17 = MODE0(GPIO17) MODE1(DPI_D4) MODE2(UCTS1) MODE3(CONN_MCU_TRST_B) MODE4(MD_INT0) MODE5(ANT_SEL4) MODE6(I2S3_MCK) MODE7(DBG_MON_A11) 17 7 +GPIO18 = MODE0(GPIO18) MODE1(DPI_D5) MODE2(URTS1) MODE3(CONN_MCU_DBGI_N) MODE4(MD_INT0) MODE5(ANT_SEL5) MODE6(I2S3_BCK) MODE7(DBG_MON_A12) 18 7 +GPIO19 = MODE0(GPIO19) MODE1(DPI_D6) MODE2(URXD1) MODE3(CONN_MCU_TDO) MODE4(MD_INT2_C2K_UIM1_HOT_PLUG) MODE5(SPI5_MO) MODE6(I2S3_LRCK) MODE7(DBG_MON_A13) 19 7 +GPIO20 = MODE0(GPIO20) MODE1(DPI_D7) MODE2(UTXD1) MODE3(CONN_MCU_DBGACK_N) MODE4(MD_INT1_C2K_UIM0_HOT_PLUG) MODE5(SPI5_CLK) MODE6(I2S3_DO) MODE7(DBG_MON_A14) 20 7 +GPIO21 = MODE0(GPIO21) MODE1(DPI_D8) MODE2(SRCLKENAI1) MODE3(CONN_MCU_TMS) MODE4(DAP_MD32_SWD) MODE5(CONN_MCU_AICE_TMSC) MODE6(I2S2_MCK) MODE7(DBG_MON_A15) 21 8 +GPIO22 = MODE0(GPIO22) MODE1(DPI_D9) MODE2(EXT_FRAME_SYNC) MODE3(CONN_MCU_TCK) MODE4(DAP_MD32_SWCK) MODE5(CONN_MCU_AICE_TCKC) MODE6(I2S2_BCK) MODE7(DBG_MON_A16) 22 8 +GPIO23 = MODE0(GPIO23) MODE1(DPI_D10) MODE2(IDDIG) MODE3(CONN_MCU_TDI) MODE4(CMVREF1) MODE5(ANT_SEL3) MODE6(I2S2_LRCK) MODE7(DBG_MON_A17) 23 8 +GPIO24 = MODE0(GPIO24) MODE1(DPI_D11) MODE2(USB_DRVVBUS) MODE3(SRCLKENAI0) MODE4(SPI1_A_MI) MODE5(IO_JTAG_TCK) MODE6(I2S2_DI) MODE7(DBG_MON_A18) 24 8 +GPIO25 = MODE0(GPIO25) MODE1(DPI_HSYNC) MODE2(SPI1_A_MI) MODE3() MODE4(CLKM0) MODE5(IO_JTAG_TMS) MODE6(I2S1_MCK) MODE7(DBG_MON_A19) 25 9 +GPIO26 = MODE0(GPIO26) MODE1(DPI_VSYNC) MODE2(SPI1_A_CSB) MODE3() MODE4(CLKM1) MODE5(IO_JTAG_TDI) MODE6(I2S1_BCK) MODE7(DBG_MON_A20) 26 9 +GPIO27 = MODE0(GPIO27) MODE1(DPI_DE) MODE2(SPI1_A_MO) MODE3() MODE4(CLKM2) MODE5(IO_JTAG_TDO) MODE6(I2S1_LRCK) MODE7(DBG_MON_A21) 27 9 +GPIO28 = MODE0(GPIO28) MODE1(DPI_CK) MODE2(SPI1_A_CLK) MODE3() MODE4(CLKM3) MODE5(IO_JTAG_TRSTN) MODE6(I2S1_DO) MODE7(DBG_MON_A22) 28 9 +GPIO29 = MODE0(GPIO29) MODE1(MSDC1_CLK) MODE2(IO_JTAG_TCK) MODE3(UDI_TCK) MODE4(CONN_DSP_JCK) MODE5(SSPM_JTAG_TCK) MODE6(PCM1_CLK) MODE7(DBG_MON_A23) 29 10 +GPIO30 = MODE0(GPIO30) MODE1(MSDC1_DAT3) MODE2(DAP_MD32_SWD) MODE3(CONN_MCU_AICE_TMSC) MODE4(CONN_DSP_JINTP) MODE5(SSPM_JTAG_TRSTN) MODE6(PCM1_DI) MODE7(DBG_MON_A24) 30 11 +GPIO31 = MODE0(GPIO31) MODE1(MSDC1_CMD) MODE2(IO_JTAG_TMS) MODE3(UDI_TMS) MODE4(CONN_DSP_JMS) MODE5(SSPM_JTAG_TMS) MODE6(PCM1_SYNC) MODE7(DBG_MON_A25) 31 12 +GPIO32 = MODE0(GPIO32) MODE1(MSDC1_DAT0) MODE2(IO_JTAG_TDI) MODE3(UDI_TDI) MODE4(CONN_DSP_JDI) MODE5(SSPM_JTAG_TDI) MODE6(PCM1_DO0) MODE7(DBG_MON_A26) 32 11 +GPIO33 = MODE0(GPIO33) MODE1(MSDC1_DAT2) MODE2(IO_JTAG_TRSTN) MODE3(UDI_NTRST) MODE4(DAP_MD32_SWCK) MODE5(CONN_MCU_AICE_TCKC) MODE6(PCM1_DO2) MODE7(DBG_MON_B32) 33 11 +GPIO34 = MODE0(GPIO34) MODE1(MSDC1_DAT1) MODE2(IO_JTAG_TDO) MODE3(UDI_TDO) MODE4(CONN_DSP_JDO) MODE5(SSPM_JTAG_TDO) MODE6(PCM1_DO1) MODE7(DBG_MON_A27) 34 11 +GPIO35 = MODE0(GPIO35) MODE1(MD1_SIM2_SIO) MODE2(CCU_JTAG_TDO) MODE3(MD1_SIM1_SIO) MODE4(LVTS_SCF) MODE5() MODE6(CONN_DSP_JMS) MODE7(DBG_MON_A28) 35 13 +GPIO36 = MODE0(GPIO36) MODE1(MD1_SIM2_SRST) MODE2(CCU_JTAG_TMS) MODE3(MD1_SIM1_SRST) MODE4(LVTS_SDI) MODE5() MODE6(CONN_DSP_JINTP) MODE7(DBG_MON_A29) 36 13 +GPIO37 = MODE0(GPIO37) MODE1(MD1_SIM2_SCLK) MODE2(CCU_JTAG_TDI) MODE3(MD1_SIM1_SCLK) MODE4(LVTS_SCK) MODE5() MODE6(CONN_DSP_JDO) MODE7(DBG_MON_A30) 37 13 +GPIO38 = MODE0(GPIO38) MODE1(MD1_SIM1_SCLK) MODE2() MODE3(MD1_SIM2_SCLK) MODE4(LVTS_26M) MODE5() MODE6() MODE7(DBG_MON_B0) 38 14 +GPIO39 = MODE0(GPIO39) MODE1(MD1_SIM1_SRST) MODE2(CCU_JTAG_TCK) MODE3(MD1_SIM2_SRST) MODE4(LVTS_SDO) MODE5() MODE6(CONN_DSP_JCK) MODE7(DBG_MON_A31) 39 14 +GPIO40 = MODE0(GPIO40) MODE1(MD1_SIM1_SIO) MODE2(CCU_JTAG_TRST) MODE3(MD1_SIM2_SIO) MODE4(LVTS_FOUT) MODE5() MODE6(CONN_DSP_JDI) MODE7(DBG_MON_A32) 40 14 +GPIO41 = MODE0(GPIO41) MODE1(IDDIG) MODE2(URXD1) MODE3(UCTS0) MODE4(SSPM_UTXD_AO) MODE5(EXT_FRAME_SYNC) MODE6(KPCOL2) MODE7(DBG_MON_B1) 41 15 +GPIO42 = MODE0(GPIO42) MODE1(USB_DRVVBUS) MODE2(UTXD1) MODE3(URTS0) MODE4(SSPM_URXD_AO) MODE5(EXT_FRAME_SYNC) MODE6(KPROW2) MODE7(DBG_MON_B2) 42 15 +GPIO43 = MODE0(GPIO43) MODE1(DISP_PWM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B3) 43 16 +GPIO44 = MODE0(GPIO44) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 44 16 +GPIO45 = MODE0(GPIO45) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 45 16 +GPIO46 = MODE0(GPIO46) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(URXD1) MODE3(UCTS1) MODE4(CCU_UTXD_AO) MODE5(SPI5_MI) MODE6(IDDIG) MODE7() 46 17 +GPIO47 = MODE0(GPIO47) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2(UTXD1) MODE3(URTS1) MODE4(CCU_URXD_AO) MODE5(SPI5_CSB) MODE6(USB_DRVVBUS) MODE7() 47 17 +GPIO48 = MODE0(GPIO48) MODE1(SCL_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 48 18 +GPIO49 = MODE0(GPIO49) MODE1(SDA_APPM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 49 18 +GPIO50 = MODE0(GPIO50) MODE1(SCL3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 50 19 +GPIO51 = MODE0(GPIO51) MODE1(SDA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 51 19 +GPIO52 = MODE0(GPIO52) MODE1(BPI_ANT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 52 20 +GPIO53 = MODE0(GPIO53) MODE1(BPI_ANT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 53 20 +GPIO54 = MODE0(GPIO54) MODE1(BPI_OLAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 54 20 +GPIO55 = MODE0(GPIO55) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 55 20 +GPIO56 = MODE0(GPIO56) MODE1(BPI_BUS9) MODE2( SCL_6306) MODE3() MODE4() MODE5() MODE6() MODE7() 56 20 +GPIO57 = MODE0(GPIO57) MODE1(BPI_BUS10) MODE2( SDA_6306) MODE3() MODE4() MODE5() MODE6() MODE7() 57 20 +GPIO58 = MODE0(GPIO58) MODE1(RFIC0_BSI_D2) MODE2(SPM_BSI_D2) MODE3(PWM_B) MODE4() MODE5() MODE6() MODE7(DBG_MON_B4) 58 21 +GPIO59 = MODE0(GPIO59) MODE1(RFIC0_BSI_D1) MODE2(SPM_BSI_D1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B5) 59 21 +GPIO60 = MODE0(GPIO60) MODE1(RFIC0_BSI_D0) MODE2(SPM_BSI_D0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B6) 60 21 +GPIO61 = MODE0(GPIO61) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B9) 61 22 +GPIO62 = MODE0(GPIO62) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B10) 62 22 +GPIO63 = MODE0(GPIO63) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B11) 63 22 +GPIO64 = MODE0(GPIO64) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B12) 64 22 +GPIO65 = MODE0(GPIO65) MODE1(MIPI3_SDATA) MODE2(BPI_OLAT2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B13) 65 23 +GPIO66 = MODE0(GPIO66) MODE1(MIPI3_SCLK) MODE2(BPI_OLAT3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B14) 66 23 +GPIO67 = MODE0(GPIO67) MODE1(MIPI2_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B15) 67 23 +GPIO68 = MODE0(GPIO68) MODE1(MIPI2_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) 68 23 +GPIO69 = MODE0(GPIO69) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B17) 69 24 +GPIO70 = MODE0(GPIO70) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B18) 70 24 +GPIO71 = MODE0(GPIO71) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B19) 71 24 +GPIO72 = MODE0(GPIO72) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B20) 72 25 +GPIO73 = MODE0(GPIO73) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B21) 73 25 +GPIO74 = MODE0(GPIO74) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B22) 74 25 +GPIO75 = MODE0(GPIO75) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B23) 75 25 +GPIO76 = MODE0(GPIO76) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B24) 76 25 +GPIO77 = MODE0(GPIO77) MODE1(BPI_ANT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B25) 77 26 +GPIO78 = MODE0(GPIO78) MODE1(BPI_OLAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B26) 78 26 +GPIO79 = MODE0(GPIO79) MODE1(BPI_PA_VM1) MODE2(MIPI4_SDATA) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B27) 79 26 +GPIO80 = MODE0(GPIO80) MODE1(BPI_PA_VM0) MODE2(MIPI4_SCLK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B28) 80 26 +GPIO81 = MODE0(GPIO81) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 81 27 +GPIO82 = MODE0(GPIO82) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 82 28 +GPIO83 = MODE0(GPIO83) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 83 28 +GPIO84 = MODE0(GPIO84) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 84 27 +GPIO85 = MODE0(GPIO85) MODE1(SPI0_MI) MODE2(MRG_SYNC) MODE3(PCM0_SYNC) MODE4(I2S1_BCK) MODE5(MFG_DFD_JTAG_TDO) MODE6(DFD_TDO) MODE7(JTDO_SEL1) 85 29 +GPIO86 = MODE0(GPIO86) MODE1(SPI0_CSB) MODE2(MRG_DO) MODE3(PCM0_DO) MODE4(I2S1_LRCK) MODE5(MFG_DFD_JTAG_TMS) MODE6(DFD_TMS) MODE7(JTMS_SEL1) 86 29 +GPIO87 = MODE0(GPIO87) MODE1(SPI0_MO) MODE2(MRG_CLK) MODE3(PCM0_CLK) MODE4(I2S1_DO) MODE5(MFG_DFD_JTAG_TDI) MODE6(DFD_TDI) MODE7(JTDI_SEL1) 87 29 +GPIO88 = MODE0(GPIO88) MODE1(SPI0_CLK) MODE2(MRG_DI) MODE3(PCM0_DI) MODE4(I2S1_MCK) MODE5(MFG_DFD_JTAG_TCK) MODE6(DFD_TCK_XI) MODE7(JTCK_SEL1) 88 29 +GPIO89 = MODE0(GPIO89) MODE1(SRCLKENAI0) MODE2(PWM_C) MODE3(CMMCLK2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A42) 89 30 +GPIO90 = MODE0(GPIO90) MODE1(PWM_A) MODE2(URXD1) MODE3(SDA6) MODE4() MODE5(MD_INT2_C2K_UIM1_HOT_PLUG) MODE6(ANT_SEL4) MODE7(DBG_MON_B29) 90 31 +GPIO91 = MODE0(GPIO91) MODE1(KPROW1) MODE2(PWM_B) MODE3() MODE4() MODE5() MODE6(ANT_SEL5) MODE7(DBG_MON_B30) 91 32 +GPIO92 = MODE0(GPIO92) MODE1(KPROW0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B31) 92 32 +GPIO93 = MODE0(GPIO93) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A33) 93 32 +GPIO94 = MODE0(GPIO94) MODE1(KPCOL1) MODE2() MODE3() MODE4() MODE5() MODE6(CMVREF0) MODE7(SPI2_MI) 94 32 +GPIO95 = MODE0(GPIO95) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD0) MODE4(MD_URXD1) MODE5(SSPM_URXD_AO) MODE6(CCU_URXD_AO) MODE7(DBG_MON_A34) 95 33 +GPIO96 = MODE0(GPIO96) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD0) MODE4(MD_UTXD1) MODE5(SSPM_UTXD_AO) MODE6(CCU_UTXD_AO) MODE7(DBG_MON_A35) 96 33 +GPIO97 = MODE0(GPIO97) MODE1(UCTS0) MODE2(I2S2_MCK) MODE3(SPI3_CSB) MODE4(CONN_MCU_TDO) MODE5(SSPM_JTAG_TDO) MODE6(IO_JTAG_TDO) MODE7(DBG_MON_A36) 97 34 +GPIO98 = MODE0(GPIO98) MODE1(URTS0) MODE2(I2S2_BCK) MODE3(SPI3_MI) MODE4(CONN_MCU_TMS) MODE5(SSPM_JTAG_TMS) MODE6(IO_JTAG_TMS) MODE7(DBG_MON_A37) 98 34 +GPIO99 = MODE0(GPIO99) MODE1(CMMCLK0) MODE2() MODE3() MODE4(CONN_MCU_AICE_TMSC) MODE5() MODE6() MODE7(DBG_MON_A38) 99 35 +GPIO100 = MODE0(GPIO100) MODE1(CMMCLK1) MODE2(PWM_C) MODE3(MD_INT1_C2K_UIM0_HOT_PLUG) MODE4(CONN_MCU_AICE_TCKC) MODE5() MODE6() MODE7(DBG_MON_A39) 100 36 +GPIO101 = MODE0(GPIO101) MODE1(CLKM2) MODE2(I2S2_LRCK) MODE3(SPI3_CLK) MODE4(CONN_MCU_TCK) MODE5(SSPM_JTAG_TCK) MODE6(IO_JTAG_TCK) MODE7(DBG_MON_A40) 101 37 +GPIO102 = MODE0(GPIO102) MODE1(CLKM1) MODE2(I2S2_DI) MODE3(SPI3_MO) MODE4(CONN_MCU_TDI) MODE5(SSPM_JTAG_TDI) MODE6(IO_JTAG_TDI) MODE7(DBG_MON_A41) 102 37 +GPIO103 = MODE0(GPIO103) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 103 38 +GPIO104 = MODE0(GPIO104) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 104 38 +GPIO105 = MODE0(GPIO105) MODE1(SCL4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 105 39 +GPIO106 = MODE0(GPIO106) MODE1(SDA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 106 39 +GPIO107 = MODE0(GPIO107) MODE1(ANT_SEL0) MODE2(PWM_A) MODE3(CLKM0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A45) 107 40 +GPIO108 = MODE0(GPIO108) MODE1(ANT_SEL1) MODE2(PWM_B) MODE3(CLKM1) MODE4(USB_DRVVBUS) MODE5(DAP_MD32_SWD) MODE6(PTA_RXD) MODE7(DBG_MON_A46) 108 40 +GPIO109 = MODE0(GPIO109) MODE1(ANT_SEL2) MODE2(PWM_C) MODE3(CLKM2) MODE4(IDDIG) MODE5(DAP_MD32_SWCK) MODE6(PTA_TXD) MODE7(DBG_MON_A47) 109 40 +GPIO110 = MODE0(GPIO110) MODE1(F2W_DATA) MODE2(PTA_TXD) MODE3(AUXIF_ST0) MODE4(SDA6) MODE5() MODE6() MODE7(DBG_MON_A48) 110 41 +GPIO111 = MODE0(GPIO111) MODE1(F2W_CK) MODE2(PTA_RXD) MODE3(AUXIF_CLK0) MODE4(SCL6) MODE5() MODE6() MODE7(DBG_MON_A49) 111 41 +GPIO112 = MODE0(GPIO112) MODE1(WB_RSTB) MODE2(URXD1) MODE3(PTA_RXD) MODE4() MODE5() MODE6() MODE7(DBG_MON_A50) 112 42 +GPIO113 = MODE0(GPIO113) MODE1(WB_SCLK) MODE2(UTXD1) MODE3(PTA_TXD) MODE4(AUXIF_CLK1) MODE5() MODE6() MODE7() 113 42 +GPIO114 = MODE0(GPIO114) MODE1(WB_SDATA) MODE2(AGPS_SYNC) MODE3(DAP_MD32_SWD) MODE4(AUXIF_ST1) MODE5() MODE6() MODE7() 114 42 +GPIO115 = MODE0(GPIO115) MODE1(WB_SEN) MODE2(SRCLKENAI1) MODE3(DAP_MD32_SWCK) MODE4() MODE5() MODE6() MODE7() 115 42 +GPIO116 = MODE0(GPIO116) MODE1(WB_CTRL0) MODE2(MSDC2_DAT1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A55) 116 43 +GPIO117 = MODE0(GPIO117) MODE1(WB_CTRL1) MODE2(MSDC2_CMD) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A53) 117 44 +GPIO118 = MODE0(GPIO118) MODE1(WB_CTRL2) MODE2(MSDC2_CLK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A54) 118 45 +GPIO119 = MODE0(GPIO119) MODE1(WB_CTRL3) MODE2(MSDC2_DAT3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A61) 119 43 +GPIO120 = MODE0(GPIO120) MODE1(WB_CTRL4) MODE2(MSDC2_DAT0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A51) 120 43 +GPIO121 = MODE0(GPIO121) MODE1(WB_CTRL5) MODE2(MSDC2_DAT2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A52) 121 43 +GPIO122 = MODE0(GPIO122) MODE1(MSDC0_CMD) MODE2() MODE3(ANT_SEL1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A0) 122 46 +GPIO123 = MODE0(GPIO123) MODE1(MSDC0_DAT0) MODE2(MSDC0_DAT4) MODE3(ANT_SEL0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A4) 123 47 +GPIO124 = MODE0(GPIO124) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A5) 124 48 +GPIO125 = MODE0(GPIO125) MODE1(MSDC0_DAT2) MODE2(MSDC0_DAT5) MODE3(MRG_CLK) MODE4() MODE5() MODE6() MODE7(DBG_MON_A6) 125 47 +GPIO126 = MODE0(GPIO126) MODE1(MSDC0_DAT4) MODE2(MSDC0_DAT2) MODE3(ANT_SEL5) MODE4() MODE5() MODE6(UFS_MPHY_SCL) MODE7(DBG_MON_A59) 126 47 +GPIO127 = MODE0(GPIO127) MODE1(MSDC0_DAT6) MODE2(MSDC0_DAT3) MODE3(ANT_SEL4) MODE4() MODE5() MODE6(UFS_MPHY_SDA) MODE7(DBG_MON_A58) 127 47 +GPIO128 = MODE0(GPIO128) MODE1(MSDC0_DAT1) MODE2(MSDC0_DAT6) MODE3(ANT_SEL2) MODE4() MODE5() MODE6(UFS_UNIPRO_SDA) MODE7(DBG_MON_A56) 128 47 +GPIO129 = MODE0(GPIO129) MODE1(MSDC0_DAT5) MODE2(MSDC0_DAT0) MODE3(ANT_SEL3) MODE4() MODE5() MODE6(UFS_UNIPRO_SCL) MODE7(DBG_MON_A57) 129 47 +GPIO130 = MODE0(GPIO130) MODE1(MSDC0_DAT7) MODE2() MODE3(MRG_DO) MODE4() MODE5() MODE6() MODE7(DBG_MON_A63) 130 47 +GPIO131 = MODE0(GPIO131) MODE1(MSDC0_DSL) MODE2() MODE3(MRG_SYNC) MODE4() MODE5() MODE6() MODE7(DBG_MON_A64) 131 49 +GPIO132 = MODE0(GPIO132) MODE1(MSDC0_DAT3) MODE2(MSDC0_DAT1) MODE3(MRG_DI) MODE4() MODE5() MODE6() MODE7(DBG_MON_A62) 132 47 +GPIO133 = MODE0(GPIO133) MODE1(MSDC0_RSTB) MODE2() MODE3(AGPS_SYNC) MODE4() MODE5() MODE6() MODE7(DBG_MON_A60) 133 50 +GPIO134 = MODE0(GPIO134) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 51 +GPIO135 = MODE0(GPIO135) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 52 +GPIO136 = MODE0(GPIO136) MODE1(AUD_CLK_MOSI) MODE2(AUD_CLK_MISO) MODE3(I2S1_MCK) MODE4() MODE5() MODE6() MODE7() -1 53 +GPIO137 = MODE0(GPIO137) MODE1(AUD_SYNC_MOSI) MODE2(AUD_SYNC_MISO) MODE3(I2S1_BCK) MODE4() MODE5() MODE6() MODE7() -1 53 +GPIO138 = MODE0(GPIO138) MODE1(AUD_DAT_MOSI0) MODE2(AUD_DAT_MISO0) MODE3(I2S1_LRCK) MODE4() MODE5() MODE6() MODE7(DBG_MON_A1) -1 53 +GPIO139 = MODE0(GPIO139) MODE1(AUD_DAT_MOSI1) MODE2(AUD_DAT_MISO1) MODE3(I2S1_DO) MODE4() MODE5() MODE6() MODE7() -1 53 +GPIO140 = MODE0(GPIO140) MODE1(AUD_CLK_MISO) MODE2(AUD_CLK_MOSI) MODE3(I2S0_MCK) MODE4() MODE5() MODE6() MODE7() -1 53 +GPIO141 = MODE0(GPIO141) MODE1(AUD_SYNC_MISO) MODE2(AUD_SYNC_MOSI) MODE3(I2S0_BCK) MODE4() MODE5() MODE6() MODE7() -1 53 +GPIO142 = MODE0(GPIO142) MODE1(AUD_DAT_MISO0) MODE2(AUD_DAT_MOSI0) MODE3(I2S0_LRCK) MODE4() MODE5() MODE6() MODE7(DBG_MON_A2) -1 53 +GPIO143 = MODE0(GPIO143) MODE1(AUD_DAT_MISO1) MODE2(AUD_DAT_MOSI1) MODE3(I2S0_DI) MODE4() MODE5() MODE6() MODE7(DBG_MON_A3) -1 53 +GPIO144 = MODE0(GPIO144) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() -1 54 +GPIO145 = MODE0(GPIO145) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 54 +GPIO146 = MODE0(GPIO146) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() -1 54 +GPIO147 = MODE0(GPIO147) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 54 +GPIO148 = MODE0(GPIO148) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 55 +GPIO149 = MODE0(GPIO149) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 56 +GPIO150 = MODE0(GPIO150) MODE1(RFIC0_BSI_EN) MODE2(SPM_BSI_EN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B7) -1 21 +GPIO151 = MODE0(GPIO151) MODE1(RFIC0_BSI_CK) MODE2(SPM_BSI_CK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B8) -1 21 +GPIO152 = MODE0(GPIO152) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 139 -1 +GPIO153 = MODE0(GPIO153) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 140 -1 +GPIO154 = MODE0(GPIO154) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 141 -1 +GPIO155 = MODE0(GPIO155) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 142 -1 +GPIO156 = MODE0(GPIO156) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 143 -1 +GPIO157 = MODE0(GPIO157) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 145 -1 +GPIO158 = MODE0(GPIO158) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 146 -1 +GPIO159 = MODE0(GPIO159) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 147 -1 +GPIO160 = MODE0(GPIO160) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 148 -1 +GPIO161 = MODE0(GPIO161) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 149 -1 +GPIO162 = MODE0(GPIO162) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 150 -1 +GPIO163 = MODE0(GPIO163) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 151 -1 + +[GPIO_EXT] +MIPI_PINS=61:62:63:64:65:66:67:68:79:80 + +[EINT] +EINT_COUNT = 152 +BUILTIN_EINT = 144/IDDIG +BUILTIN_144 = 0/4:6/3:11/2:23/2:41/1:46/6:109/4 + +[EINT_MD1] +EINT_MD1_COUNT = 3 + + +[ADC] +ADC_COUNT = 5 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 4 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 10 + +[CLK_BUF] +CLK_BUF_COUNT = 7 +DRIVING_CURRENT_PMIC_CLK_BUF1=2:0:AutoK:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF2=1:0:AutoK:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF3=1:0:AutoK:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF4=2:0:AutoK:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF5=0:0:AutoK:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF6=0:0:AutoK:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF7=1:0:AutoK:0.6:1.0:1.4:1.7 + +[SRC_PIN] +GPIO0::PAD_EINT0=0 +GPIO17::PAD_DPI_D4=0 +GPIO18::PAD_DPI_D5=0 +GPIO20::PAD_DPI_D7=1 +GPIO47::PAD_INT_SIM1=1 +GPIO100::PAD_CAM_CLK1=1 +GPIO19::PAD_DPI_D6=2 +GPIO46::PAD_INT_SIM2=2 +GPIO90::PAD_PWM_A=2 + +[POWER] +POWER_COUNT=11 +DVDD18_IOLT=VIO18 +DVDD18_IOLB=VIO18 +DVDD18_IOBL=VIO18 +DVDD18_IOBR=VIO18 +DVDD18_IORB=VIO18 +DVDD18_IORT1=VIO18 +DVDD18_IORT2=VIO18 +DVDD18_MSDC0=VIO18 +DVDD28_MSDC1=VIO18:VIO28 +DVDD28_SIM2=VIO18:VIO28 +DVDD28_SIM1=VIO18:VIO28 diff --git a/tools/dct/config/MT6765.fig b/tools/dct/config/MT6765.fig new file mode 100644 index 000000000000..05089e8168b7 --- /dev/null +++ b/tools/dct/config/MT6765.fig @@ -0,0 +1,256 @@ +[Chip Type] +Chip = MT6765 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +GPIO_ModeNum = 8 +GPIO_COLUMN_ENABLE = 0 +POWER_SUPPORT=0 +KEYPAD_EXTEND_TYPE=1 +POWER_TAB_ENABLE=0 +PMIC_APP_COUNT = 6 +AndroidPhone = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(UTXD1) MODE2(CLKM0) MODE3(MD_INT0) MODE4(I2S0_MCK) MODE5(MD_UTXD1) MODE6(TP_GPIO0_AO) MODE7(DBG_MON_B9) 0 60 +GPIO1 = MODE0(GPIO1) MODE1(URXD1) MODE2(CLKM1) MODE3() MODE4(I2S0_BCK) MODE5(MD_URXD1) MODE6(TP_GPIO1_AO) MODE7(DBG_MON_B10) 1 60 +GPIO2 = MODE0(GPIO2) MODE1(UCTS0) MODE2(CLKM2) MODE3(UTXD1) MODE4(I2S0_LRCK) MODE5(ANT_SEL6) MODE6(TP_GPIO2_AO) MODE7(DBG_MON_B11) 2 60 +GPIO3 = MODE0(GPIO3) MODE1(URTS0) MODE2(CLKM3) MODE3(URXD1) MODE4(I2S0_DI) MODE5(ANT_SEL7) MODE6(TP_GPIO3_AO) MODE7(DBG_MON_B12) 3 60 +GPIO4 = MODE0(GPIO4) MODE1(SPI1_B_MI) MODE2(SCP_SPI1_MI) MODE3(UCTS0) MODE4(I2S3_MCK) MODE5(SSPM_URXD_AO) MODE6(TP_GPIO4_AO) MODE7() 4 61 +GPIO5 = MODE0(GPIO5) MODE1(SPI1_B_CSB) MODE2(SCP_SPI1_CS) MODE3(URTS0) MODE4(I2S3_BCK) MODE5(SSPM_UTXD_AO) MODE6(TP_GPIO5_AO) MODE7() 5 61 +GPIO6 = MODE0(GPIO6) MODE1(SPI1_B_MO) MODE2(SCP_SPI1_MO) MODE3(PWM0) MODE4(I2S3_LRCK) MODE5(MD_UTXD0) MODE6(TP_GPIO6_AO) MODE7() 6 61 +GPIO7 = MODE0(GPIO7) MODE1(SPI1_B_CLK) MODE2(SCP_SPI1_CK) MODE3(PWM1) MODE4(I2S3_DO) MODE5(MD_URXD0) MODE6(TP_GPIO7_AO) MODE7() 7 61 +GPIO8 = MODE0(GPIO8) MODE1(UTXD1) MODE2(SRCLKENAI0) MODE3(MD_INT1_C2K_UIM0_HOT_PLUG) MODE4(ANT_SEL3) MODE5(MFG_JTAG_TRSTN) MODE6(I2S2_MCK) MODE7(JTRSTN_SEL1) 8 56 +GPIO9 = MODE0(GPIO9) MODE1(MD_INT0) MODE2(CMMCLK2) MODE3(CONN_MCU_TRST_B) MODE4(IDDIG) MODE5(SDA_6306) MODE6(MCUPM_JTAG_TRSTN) MODE7(DBG_MON_B22) 9 68 +GPIO10 = MODE0(GPIO10) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2() MODE3(CONN_MCU_DBGI_N) MODE4(SRCLKENAI1) MODE5(EXT_FRAME_SYNC) MODE6(CMVREF1) MODE7(DBG_MON_B23) 10 68 +GPIO11 = MODE0(GPIO11) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(CLKM3) MODE3(ANT_SEL6) MODE4(SRCLKENAI0) MODE5(EXT_FRAME_SYNC) MODE6(UCTS1) MODE7(DBG_MON_B24) 11 68 +GPIO12 = MODE0(GPIO12) MODE1(PWM0) MODE2(SRCLKENAI1) MODE3(EXT_FRAME_SYNC) MODE4(MD_INT0) MODE5(DVFSRC_EXT_REQ) MODE6(URTS1) MODE7() 12 14 +GPIO13 = MODE0(GPIO13) MODE1(ANT_SEL0) MODE2(SPI4_MI) MODE3(SCP_SPI0_MI) MODE4(MD_URXD0) MODE5(CLKM0) MODE6(I2S0_MCK) MODE7(DBG_MON_A0) 13 15 +GPIO14 = MODE0(GPIO14) MODE1(ANT_SEL1) MODE2(SPI4_CSB) MODE3(SCP_SPI0_CS) MODE4(MD_UTXD0) MODE5(CLKM1) MODE6(I2S0_BCK) MODE7(DBG_MON_A1) 14 15 +GPIO15 = MODE0(GPIO15) MODE1(ANT_SEL2) MODE2(SPI4_MO) MODE3(SCP_SPI0_MO) MODE4(MD_URXD1) MODE5(CLKM2) MODE6(I2S0_LRCK) MODE7(DBG_MON_A2) 15 15 +GPIO16 = MODE0(GPIO16) MODE1(ANT_SEL3) MODE2(SPI4_CLK) MODE3(SCP_SPI0_CK) MODE4(MD_UTXD1) MODE5(CLKM3) MODE6(I2S3_MCK) MODE7(DBG_MON_A3) 16 15 +GPIO17 = MODE0(GPIO17) MODE1(ANT_SEL4) MODE2(SPI2_MO) MODE3(SCP_SPI0_MO) MODE4(PWM1) MODE5(IDDIG) MODE6(I2S0_DI) MODE7(DBG_MON_A4) 17 16 +GPIO18 = MODE0(GPIO18) MODE1(ANT_SEL5) MODE2(SPI2_CLK) MODE3(SCP_SPI0_CK) MODE4(MD_INT0) MODE5(USB_DRVVBUS) MODE6(I2S3_BCK) MODE7(DBG_MON_A5) 18 16 +GPIO19 = MODE0(GPIO19) MODE1(ANT_SEL6) MODE2(SPI2_MI) MODE3(SCP_SPI0_MI) MODE4(MD_INT2_C2K_UIM1_HOT_PLUG) MODE5() MODE6(I2S3_LRCK) MODE7(DBG_MON_A6) 19 16 +GPIO20 = MODE0(GPIO20) MODE1(ANT_SEL7) MODE2(SPI2_CSB) MODE3(SCP_SPI0_CS) MODE4(MD_INT1_C2K_UIM0_HOT_PLUG) MODE5(CMMCLK3) MODE6(I2S3_DO) MODE7(DBG_MON_A7) 20 16 +GPIO21 = MODE0(GPIO21) MODE1(SPI3_MI) MODE2(SRCLKENAI1) MODE3(DAP_MD32_SWD) MODE4(CMVREF0) MODE5(SCP_SPI0_MI) MODE6(I2S2_MCK) MODE7(DBG_MON_A8) 21 17 +GPIO22 = MODE0(GPIO22) MODE1(SPI3_CSB) MODE2(SRCLKENAI0) MODE3(DAP_MD32_SWCK) MODE4(CMVREF1) MODE5(SCP_SPI0_CS) MODE6(I2S2_BCK) MODE7(DBG_MON_A9) 22 17 +GPIO23 = MODE0(GPIO23) MODE1(SPI3_MO) MODE2(PWM0) MODE3(KPROW7) MODE4(ANT_SEL3) MODE5(SCP_SPI0_MO) MODE6(I2S2_LRCK) MODE7(DBG_MON_A10) 23 17 +GPIO24 = MODE0(GPIO24) MODE1(SPI3_CLK) MODE2(UDI_TCK) MODE3(IO_JTAG_TCK) MODE4(SSPM_JTAG_TCK) MODE5(SCP_SPI0_CK) MODE6(I2S2_DI) MODE7(DBG_MON_A11) 24 17 +GPIO25 = MODE0(GPIO25) MODE1(SPI1_A_MI) MODE2(UDI_TMS) MODE3(IO_JTAG_TMS) MODE4(SSPM_JTAG_TMS) MODE5(KPROW3) MODE6(I2S1_MCK) MODE7(DBG_MON_A12) 25 18 +GPIO26 = MODE0(GPIO26) MODE1(SPI1_A_CSB) MODE2(UDI_TDI) MODE3(IO_JTAG_TDI) MODE4(SSPM_JTAG_TDI) MODE5(KPROW4) MODE6(I2S1_BCK) MODE7(DBG_MON_A13) 26 18 +GPIO27 = MODE0(GPIO27) MODE1(SPI1_A_MO) MODE2(UDI_TDO) MODE3(IO_JTAG_TDO) MODE4(SSPM_JTAG_TDO) MODE5(KPROW5) MODE6(I2S1_LRCK) MODE7(DBG_MON_A14) 27 18 +GPIO28 = MODE0(GPIO28) MODE1(SPI1_A_CLK) MODE2(UDI_NTRST) MODE3(IO_JTAG_TRSTN) MODE4(SSPM_JTAG_TRSTN) MODE5(KPROW6) MODE6(I2S1_DO) MODE7(DBG_MON_A15) 28 18 +GPIO29 = MODE0(GPIO29) MODE1(MSDC1_CLK) MODE2(IO_JTAG_TCK) MODE3(UDI_TCK) MODE4(CONN_DSP_JCK) MODE5(SSPM_JTAG_TCK) MODE6(CONN_MCU_AICE_TCKC) MODE7(DAP_MD32_SWCK) 29 19 +GPIO30 = MODE0(GPIO30) MODE1(MSDC1_CMD) MODE2(IO_JTAG_TMS) MODE3(UDI_TMS) MODE4(CONN_DSP_JMS) MODE5(SSPM_JTAG_TMS) MODE6(CONN_MCU_AICE_TMSC) MODE7(DAP_MD32_SWD) 30 20 +GPIO31 = MODE0(GPIO31) MODE1(MSDC1_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 31 21 +GPIO32 = MODE0(GPIO32) MODE1(MSDC1_DAT0) MODE2(IO_JTAG_TDI) MODE3(UDI_TDI) MODE4(CONN_DSP_JDI) MODE5(SSPM_JTAG_TDI) MODE6() MODE7() 32 21 +GPIO33 = MODE0(GPIO33) MODE1(MSDC1_DAT2) MODE2(IO_JTAG_TRSTN) MODE3(UDI_NTRST) MODE4(CONN_DSP_JINTP) MODE5(SSPM_JTAG_TRSTN) MODE6() MODE7() 33 21 +GPIO34 = MODE0(GPIO34) MODE1(MSDC1_DAT1) MODE2(IO_JTAG_TDO) MODE3(UDI_TDO) MODE4(CONN_DSP_JDO) MODE5(SSPM_JTAG_TDO) MODE6() MODE7() 34 21 +GPIO35 = MODE0(GPIO35) MODE1(MD1_SIM2_SIO) MODE2(CCU_JTAG_TDO) MODE3(MD1_SIM1_SIO) MODE4() MODE5(SCP_JTAG_TDO) MODE6(CONN_DSP_JDO) MODE7(DBG_MON_A16) 35 22 +GPIO36 = MODE0(GPIO36) MODE1(MD1_SIM2_SRST) MODE2(CCU_JTAG_TMS) MODE3(MD1_SIM1_SRST) MODE4(CONN_MCU_AICE_TMSC) MODE5(SCP_JTAG_TMS) MODE6(CONN_DSP_JMS) MODE7(DBG_MON_A17) 36 22 +GPIO37 = MODE0(GPIO37) MODE1(MD1_SIM2_SCLK) MODE2(CCU_JTAG_TDI) MODE3(MD1_SIM1_SCLK) MODE4() MODE5(SCP_JTAG_TDI) MODE6(CONN_DSP_JDI) MODE7(DBG_MON_A18) 37 23 +GPIO38 = MODE0(GPIO38) MODE1(MD1_SIM1_SCLK) MODE2() MODE3(MD1_SIM2_SCLK) MODE4() MODE5() MODE6() MODE7(DBG_MON_A19) 38 24 +GPIO39 = MODE0(GPIO39) MODE1(MD1_SIM1_SRST) MODE2(CCU_JTAG_TCK) MODE3(MD1_SIM2_SRST) MODE4(CONN_MCU_AICE_TCKC) MODE5(SCP_JTAG_TCK) MODE6(CONN_DSP_JCK) MODE7(DBG_MON_A20) 39 25 +GPIO40 = MODE0(GPIO40) MODE1(MD1_SIM1_SIO) MODE2(CCU_JTAG_TRST) MODE3(MD1_SIM2_SIO) MODE4() MODE5(SCP_JTAG_TRSTN) MODE6(CONN_DSP_JINTP) MODE7(DBG_MON_A21) 40 25 +GPIO41 = MODE0(GPIO41) MODE1(IDDIG) MODE2(URXD1) MODE3(UCTS0) MODE4(KPCOL2) MODE5(SSPM_UTXD_AO) MODE6(MD_INT0) MODE7(DBG_MON_A22) 41 29 +GPIO42 = MODE0(GPIO42) MODE1(USB_DRVVBUS) MODE2(UTXD1) MODE3(URTS0) MODE4(KPROW2) MODE5(SSPM_URXD_AO) MODE6(MD_INT1_C2K_UIM0_HOT_PLUG) MODE7(DBG_MON_A23) 42 29 +GPIO43 = MODE0(GPIO43) MODE1(DISP_PWM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A24) 43 30 +GPIO44 = MODE0(GPIO44) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A25) 44 31 +GPIO45 = MODE0(GPIO45) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A26) 45 32 +GPIO46 = MODE0(GPIO46) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(UCTS0) MODE3(UCTS1) MODE4(IDDIG) MODE5(SCL_6306) MODE6(TP_UCTS1_AO) MODE7(DBG_MON_A27) 46 33 +GPIO47 = MODE0(GPIO47) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2(URTS0) MODE3(URTS1) MODE4(USB_DRVVBUS) MODE5(SDA_6306) MODE6(TP_URTS1_AO) MODE7(DBG_MON_A28) 47 33 +GPIO48 = MODE0(GPIO48) MODE1(SCL5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A29) 48 27 +GPIO49 = MODE0(GPIO49) MODE1(SDA5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A30) 49 28 +GPIO50 = MODE0(GPIO50) MODE1(SCL3) MODE2(URXD1) MODE3(MD_URXD1) MODE4(SSPM_URXD_AO) MODE5(IDDIG) MODE6(TP_URXD1_AO) MODE7(DBG_MON_A31) 50 34 +GPIO51 = MODE0(GPIO51) MODE1(SDA3) MODE2(UTXD1) MODE3(MD_UTXD1) MODE4(SSPM_UTXD_AO) MODE5(USB_DRVVBUS) MODE6(TP_UTXD1_AO) MODE7(DBG_MON_A32) 51 35 +GPIO52 = MODE0(GPIO52) MODE1(BPI_BUS15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 52 41 +GPIO53 = MODE0(GPIO53) MODE1(BPI_BUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 53 41 +GPIO54 = MODE0(GPIO54) MODE1(BPI_BUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 54 41 +GPIO55 = MODE0(GPIO55) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 55 41 +GPIO56 = MODE0(GPIO56) MODE1(BPI_BUS9) MODE2(SCL_6306) MODE3() MODE4() MODE5() MODE6() MODE7() 56 41 +GPIO57 = MODE0(GPIO57) MODE1(BPI_BUS10) MODE2(SDA_6306) MODE3() MODE4() MODE5() MODE6() MODE7() 57 41 +GPIO58 = MODE0(GPIO58) MODE1(RFIC0_BSI_D2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 58 42 +GPIO59 = MODE0(GPIO59) MODE1(RFIC0_BSI_D1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 59 42 +GPIO60 = MODE0(GPIO60) MODE1(RFIC0_BSI_D0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 60 42 +GPIO61 = MODE0(GPIO61) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 61 44 +GPIO62 = MODE0(GPIO62) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 62 44 +GPIO63 = MODE0(GPIO63) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 63 45 +GPIO64 = MODE0(GPIO64) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 64 45 +GPIO65 = MODE0(GPIO65) MODE1(MIPI3_SDATA) MODE2(BPI_BUS16) MODE3() MODE4() MODE5() MODE6() MODE7() 65 46 +GPIO66 = MODE0(GPIO66) MODE1(MIPI3_SCLK) MODE2(BPI_BUS17) MODE3() MODE4() MODE5() MODE6() MODE7() 66 46 +GPIO67 = MODE0(GPIO67) MODE1(MIPI2_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 67 47 +GPIO68 = MODE0(GPIO68) MODE1(MIPI2_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 68 47 +GPIO69 = MODE0(GPIO69) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 69 48 +GPIO70 = MODE0(GPIO70) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 70 48 +GPIO71 = MODE0(GPIO71) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 71 48 +GPIO72 = MODE0(GPIO72) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 72 48 +GPIO73 = MODE0(GPIO73) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 73 48 +GPIO74 = MODE0(GPIO74) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 74 49 +GPIO75 = MODE0(GPIO75) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 75 49 +GPIO76 = MODE0(GPIO76) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 76 49 +GPIO77 = MODE0(GPIO77) MODE1(BPI_BUS14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 77 49 +GPIO78 = MODE0(GPIO78) MODE1(BPI_BUS11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 78 49 +GPIO79 = MODE0(GPIO79) MODE1(BPI_PA_VM1) MODE2(MIPI4_SDATA) MODE3() MODE4() MODE5() MODE6() MODE7() 79 50 +GPIO80 = MODE0(GPIO80) MODE1(BPI_PA_VM0) MODE2(MIPI4_SCLK) MODE3() MODE4() MODE5() MODE6() MODE7() 80 50 +GPIO81 = MODE0(GPIO81) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B0) 81 51 +GPIO82 = MODE0(GPIO82) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B1) 82 52 +GPIO83 = MODE0(GPIO83) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B2) 83 53 +GPIO84 = MODE0(GPIO84) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B3) 84 54 +GPIO85 = MODE0(GPIO85) MODE1(RFIC0_BSI_EN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 85 42 +GPIO86 = MODE0(GPIO86) MODE1(RFIC0_BSI_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 86 43 +GPIO87 = MODE0(GPIO87) MODE1() MODE2(MD_INT1_C2K_UIM0_HOT_PLUG) MODE3(CMVREF0) MODE4(MD_URXD0) MODE5(AGPS_SYNC) MODE6(EXT_FRAME_SYNC) MODE7() 87 40 +GPIO88 = MODE0(GPIO88) MODE1(CMMCLK3) MODE2(MD_INT2_C2K_UIM1_HOT_PLUG) MODE3(CMVREF1) MODE4(MD_UTXD0) MODE5(AGPS_SYNC) MODE6(DVFSRC_EXT_REQ) MODE7() 88 38 +GPIO89 = MODE0(GPIO89) MODE1(SRCLKENAI0) MODE2(PWM2) MODE3(MD_INT0) MODE4(USB_DRVVBUS) MODE5(SCL_6306) MODE6(TP_GPIO4_AO) MODE7(DBG_MON_B21) 89 67 +GPIO90 = MODE0(GPIO90) MODE1(URXD1) MODE2(PWM0) MODE3(MD_INT2_C2K_UIM1_HOT_PLUG) MODE4(ANT_SEL4) MODE5(USB_DRVVBUS) MODE6(I2S2_BCK) MODE7(DBG_MON_B4) 90 57 +GPIO91 = MODE0(GPIO91) MODE1(KPROW1) MODE2(PWM2) MODE3(MD_INT0) MODE4(ANT_SEL5) MODE5(IDDIG) MODE6(I2S2_LRCK) MODE7(DBG_MON_B5) 91 58 +GPIO92 = MODE0(GPIO92) MODE1(KPROW0) MODE2() MODE3() MODE4() MODE5(DVFSRC_EXT_REQ) MODE6(I2S2_DI) MODE7(DBG_MON_B6) 92 58 +GPIO93 = MODE0(GPIO93) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B7) 93 59 +GPIO94 = MODE0(GPIO94) MODE1(KPCOL1) MODE2() MODE3() MODE4() MODE5(CMFLASH) MODE6(CMVREF0) MODE7(DBG_MON_B8) 94 59 +GPIO95 = MODE0(GPIO95) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD0) MODE4(PTA_RXD) MODE5(SSPM_URXD_AO) MODE6(WIFI_RXD) MODE7() 95 62 +GPIO96 = MODE0(GPIO96) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD0) MODE4(PTA_TXD) MODE5(SSPM_UTXD_AO) MODE6(WIFI_TXD) MODE7() 96 62 +GPIO97 = MODE0(GPIO97) MODE1(UCTS0) MODE2(I2S1_MCK) MODE3(CONN_MCU_TDO) MODE4(SPI5_MI) MODE5(SCL_6306) MODE6(MCUPM_JTAG_TDO) MODE7(DBG_MON_B15) 97 63 +GPIO98 = MODE0(GPIO98) MODE1(URTS0) MODE2(I2S1_BCK) MODE3(CONN_MCU_TMS) MODE4(SPI5_CSB) MODE5() MODE6(MCUPM_JTAG_TMS) MODE7(DBG_MON_B16) 98 63 +GPIO99 = MODE0(GPIO99) MODE1(CMMCLK0) MODE2() MODE3() MODE4(AUXIF_CLK) MODE5(PTA_RXD) MODE6(CONN_UART0_RXD) MODE7(DBG_MON_B17) 99 64 +GPIO100 = MODE0(GPIO100) MODE1(CMMCLK1) MODE2() MODE3() MODE4(AUXIF_ST) MODE5(PTA_TXD) MODE6(CONN_UART0_TXD) MODE7(DBG_MON_B18) 100 65 +GPIO101 = MODE0(GPIO101) MODE1(CMFLASH) MODE2(I2S1_LRCK) MODE3(CONN_MCU_TCK) MODE4(SPI5_MO) MODE5() MODE6(MCUPM_JTAG_TCK) MODE7(DBG_MON_B19) 101 66 +GPIO102 = MODE0(GPIO102) MODE1(CMVREF0) MODE2(I2S1_DO) MODE3(CONN_MCU_TDI) MODE4(SPI5_CLK) MODE5(AGPS_SYNC) MODE6(MCUPM_JTAG_TDI) MODE7(DBG_MON_B20) 102 66 +GPIO103 = MODE0(GPIO103) MODE1(SCL2) MODE2(TP_UTXD1_AO) MODE3(MD_UTXD0) MODE4(MD_UTXD1) MODE5(TP_URTS2_AO) MODE6(WIFI_TXD) MODE7(DBG_MON_B25) 103 69 +GPIO104 = MODE0(GPIO104) MODE1(SDA2) MODE2(TP_URXD1_AO) MODE3(MD_URXD0) MODE4(MD_URXD1) MODE5(TP_UCTS2_AO) MODE6(WIFI_RXD) MODE7(DBG_MON_B26) 104 70 +GPIO105 = MODE0(GPIO105) MODE1(SCL4) MODE2() MODE3(MD_UTXD1) MODE4(MD_UTXD0) MODE5(TP_UTXD2_AO) MODE6(PTA_TXD) MODE7(DBG_MON_B27) 105 71 +GPIO106 = MODE0(GPIO106) MODE1(SDA4) MODE2() MODE3(MD_URXD1) MODE4(MD_URXD0) MODE5(TP_URXD2_AO) MODE6(PTA_RXD) MODE7(DBG_MON_B28) 106 72 +GPIO107 = MODE0(GPIO107) MODE1(UTXD1) MODE2(MD_UTXD0) MODE3(SDA_6306) MODE4(KPCOL3) MODE5(CMVREF0) MODE6(URTS0) MODE7(DBG_MON_B29) 107 73 +GPIO108 = MODE0(GPIO108) MODE1(CMMCLK2) MODE2(MD_INT0) MODE3(CONN_MCU_DBGACK_N) MODE4(KPCOL4) MODE5() MODE6(I2S3_MCK) MODE7(DBG_MON_B30) 108 74 +GPIO109 = MODE0(GPIO109) MODE1(URXD1) MODE2(MD_URXD0) MODE3(ANT_SEL7) MODE4(KPCOL5) MODE5(CMVREF1) MODE6(UCTS0) MODE7(DBG_MON_B31) 109 75 +GPIO110 = MODE0(GPIO110) MODE1(ANT_SEL0) MODE2(CLKM0) MODE3(PWM3) MODE4(MD_INT0) MODE5(IDDIG) MODE6(I2S3_BCK) MODE7(DBG_MON_B13) 110 78 +GPIO111 = MODE0(GPIO111) MODE1(ANT_SEL1) MODE2(CLKM1) MODE3(PWM4) MODE4(PTA_RXD) MODE5(CMVREF0) MODE6(I2S3_LRCK) MODE7(DBG_MON_B14) 111 79 +GPIO112 = MODE0(GPIO112) MODE1(ANT_SEL2) MODE2(CLKM2) MODE3(PWM5) MODE4(PTA_TXD) MODE5(CMVREF1) MODE6(I2S3_DO) MODE7() 112 80 +GPIO113 = MODE0(GPIO113) MODE1(CONN_TOP_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 81 +GPIO114 = MODE0(GPIO114) MODE1(CONN_TOP_DATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 82 +GPIO115 = MODE0(GPIO115) MODE1(CONN_BT_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 85 +GPIO116 = MODE0(GPIO116) MODE1(CONN_BT_DATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 86 +GPIO117 = MODE0(GPIO117) MODE1(CONN_WF_CTRL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 87 +GPIO118 = MODE0(GPIO118) MODE1(CONN_WF_CTRL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 88 +GPIO119 = MODE0(GPIO119) MODE1(CONN_WF_CTRL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 89 +GPIO120 = MODE0(GPIO120) MODE1(CONN_WB_PTA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 84 +GPIO121 = MODE0(GPIO121) MODE1(CONN_HRST_B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 83 +GPIO122 = MODE0(GPIO122) MODE1(MSDC0_CMD) MODE2(MSDC0_CMD) MODE3() MODE4() MODE5() MODE6() MODE7() -1 90 +GPIO123 = MODE0(GPIO123) MODE1(MSDC0_DAT0) MODE2(MSDC0_DAT4) MODE3() MODE4() MODE5() MODE6() MODE7() -1 91 +GPIO124 = MODE0(GPIO124) MODE1(MSDC0_CLK) MODE2(MSDC0_CLK) MODE3() MODE4() MODE5() MODE6() MODE7() -1 99 +GPIO125 = MODE0(GPIO125) MODE1(MSDC0_DAT2) MODE2(MSDC0_DAT5) MODE3() MODE4() MODE5() MODE6() MODE7() -1 92 +GPIO126 = MODE0(GPIO126) MODE1(MSDC0_DAT4) MODE2(MSDC0_DAT2) MODE3() MODE4() MODE5() MODE6() MODE7() -1 93 +GPIO127 = MODE0(GPIO127) MODE1(MSDC0_DAT6) MODE2(MSDC0_DAT1) MODE3() MODE4() MODE5() MODE6() MODE7() -1 94 +GPIO128 = MODE0(GPIO128) MODE1(MSDC0_DAT1) MODE2(MSDC0_DAT6) MODE3() MODE4() MODE5() MODE6() MODE7() -1 95 +GPIO129 = MODE0(GPIO129) MODE1(MSDC0_DAT5) MODE2(MSDC0_DAT0) MODE3() MODE4() MODE5() MODE6() MODE7() -1 96 +GPIO130 = MODE0(GPIO130) MODE1(MSDC0_DAT7) MODE2(MSDC0_DAT7) MODE3() MODE4() MODE5() MODE6() MODE7() -1 97 +GPIO131 = MODE0(GPIO131) MODE1(MSDC0_DSL) MODE2(MSDC0_DSL) MODE3() MODE4() MODE5() MODE6() MODE7() -1 98 +GPIO132 = MODE0(GPIO132) MODE1(MSDC0_DAT3) MODE2(MSDC0_DAT3) MODE3() MODE4() MODE5() MODE6() MODE7() -1 100 +GPIO133 = MODE0(GPIO133) MODE1(MSDC0_RSTB) MODE2(MSDC0_RSTB) MODE3() MODE4() MODE5() MODE6() MODE7() -1 101 +GPIO134 = MODE0(GPIO134) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 1 +GPIO135 = MODE0(GPIO135) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 2 +GPIO136 = MODE0(GPIO136) MODE1(AUD_CLK_MOSI) MODE2(AUD_CLK_MISO) MODE3(I2S1_MCK) MODE4() MODE5() MODE6() MODE7() -1 3 +GPIO137 = MODE0(GPIO137) MODE1(AUD_SYNC_MOSI) MODE2(AUD_SYNC_MISO) MODE3(I2S1_BCK) MODE4() MODE5() MODE6() MODE7() -1 4 +GPIO138 = MODE0(GPIO138) MODE1(AUD_DAT_MOSI0) MODE2(AUD_DAT_MISO0) MODE3(I2S1_LRCK) MODE4() MODE5() MODE6() MODE7() -1 5 +GPIO139 = MODE0(GPIO139) MODE1(AUD_DAT_MOSI1) MODE2(AUD_DAT_MISO1) MODE3(I2S1_DO) MODE4() MODE5() MODE6() MODE7() -1 6 +GPIO140 = MODE0(GPIO140) MODE1(AUD_CLK_MISO) MODE2(AUD_CLK_MOSI) MODE3(I2S2_MCK) MODE4() MODE5() MODE6() MODE7() -1 7 +GPIO141 = MODE0(GPIO141) MODE1(AUD_SYNC_MISO) MODE2(AUD_SYNC_MOSI) MODE3(I2S2_BCK) MODE4() MODE5() MODE6() MODE7() -1 8 +GPIO142 = MODE0(GPIO142) MODE1(AUD_DAT_MISO0) MODE2(AUD_DAT_MOSI0) MODE3(I2S2_LRCK) MODE4() MODE5() MODE6() MODE7() -1 9 +GPIO143 = MODE0(GPIO143) MODE1(AUD_DAT_MISO1) MODE2(AUD_DAT_MOSI1) MODE3(I2S2_DI) MODE4() MODE5() MODE6() MODE7() -1 10 +GPIO144 = MODE0(GPIO144) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO145 = MODE0(GPIO145) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO146 = MODE0(GPIO146) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO147 = MODE0(GPIO147) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 12 +GPIO148 = MODE0(GPIO148) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 13 +GPIO149 = MODE0(GPIO149) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 13 +GPIO150 = MODE0(GPIO150) MODE1(PWM0) MODE2(CMFLASH) MODE3(ANT_SEL3) MODE4() MODE5(MD_URXD0) MODE6(TP_URXD2_AO) MODE7() -1 36 +GPIO151 = MODE0(GPIO151) MODE1(PWM1) MODE2(CMVREF0) MODE3(ANT_SEL4) MODE4() MODE5(MD_UTXD0) MODE6(TP_UTXD2_AO) MODE7() -1 36 +GPIO152 = MODE0(GPIO152) MODE1(PWM2) MODE2(CMVREF1) MODE3(ANT_SEL5) MODE4() MODE5(MD_URXD1) MODE6(TP_UCTS1_AO) MODE7() -1 37 +GPIO153 = MODE0(GPIO153) MODE1(PWM3) MODE2(CLKM0) MODE3(ANT_SEL6) MODE4() MODE5(MD_UTXD1) MODE6(TP_URTS1_AO) MODE7() -1 37 +GPIO154 = MODE0(GPIO154) MODE1(PWM5) MODE2(CLKM2) MODE3(USB_DRVVBUS) MODE4() MODE5(PTA_TXD) MODE6(CONN_UART0_TXD) MODE7() -1 39 +GPIO155 = MODE0(GPIO155) MODE1(SPI0_MI) MODE2(IDDIG) MODE3(AGPS_SYNC) MODE4(TP_GPIO0_AO) MODE5(MFG_JTAG_TDO) MODE6(DFD_TDO) MODE7(JTDO_SEL1) -1 55 +GPIO156 = MODE0(GPIO156) MODE1(SPI0_CSB) MODE2(USB_DRVVBUS) MODE3(DVFSRC_EXT_REQ) MODE4(TP_GPIO1_AO) MODE5(MFG_JTAG_TMS) MODE6(DFD_TMS) MODE7(JTMS_SEL1) -1 55 +GPIO157 = MODE0(GPIO157) MODE1(SPI0_MO) MODE2(MD_INT1_C2K_UIM0_HOT_PLUG) MODE3(CLKM0) MODE4(TP_GPIO2_AO) MODE5(MFG_JTAG_TDI) MODE6(DFD_TDI) MODE7(JTDI_SEL1) -1 55 +GPIO158 = MODE0(GPIO158) MODE1(SPI0_CLK) MODE2(MD_INT2_C2K_UIM1_HOT_PLUG) MODE3(EXT_FRAME_SYNC) MODE4(TP_GPIO3_AO) MODE5(MFG_JTAG_TCK) MODE6(DFD_TCK_XI) MODE7(JTCK_SEL1) -1 55 +GPIO159 = MODE0(GPIO159) MODE1(PWM4) MODE2(CLKM1) MODE3(ANT_SEL7) MODE4() MODE5(PTA_RXD) MODE6(CONN_UART0_RXD) MODE7() -1 39 +GPIO160 = MODE0(GPIO160) MODE1(CLKM0) MODE2(PWM2) MODE3(EXT_FRAME_SYNC) MODE4(TP_GPIO5_AO) MODE5(AGPS_SYNC) MODE6(DVFSRC_EXT_REQ) MODE7() -1 11 +GPIO161 = MODE0(GPIO161) MODE1(SCL6) MODE2(SCL_6306) MODE3(TP_GPIO6_AO) MODE4(KPCOL6) MODE5(PTA_RXD) MODE6(CONN_UART0_RXD) MODE7() -1 76 +GPIO162 = MODE0(GPIO162) MODE1(SDA6) MODE2(SDA_6306) MODE3(TP_GPIO7_AO) MODE4(KPCOL7) MODE5(PTA_TXD) MODE6(CONN_UART0_TXD) MODE7() -1 77 +GPIO163 = MODE0(GPIO163) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO164 = MODE0(GPIO164) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO165 = MODE0(GPIO165) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO166 = MODE0(GPIO166) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO167 = MODE0(GPIO167) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO168 = MODE0(GPIO168) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO169 = MODE0(GPIO169) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO170 = MODE0(GPIO170) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 0 +GPIO171 = MODE0(GPIO171) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO172 = MODE0(GPIO172) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO173 = MODE0(GPIO173) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO174 = MODE0(GPIO174) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO175 = MODE0(GPIO175) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO176 = MODE0(GPIO176) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO177 = MODE0(GPIO177) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO178 = MODE0(GPIO178) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 26 +GPIO179 = MODE0(GPIO179) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 151 -1 + +[EINT] +EINT_COUNT = 160 +BUILTIN_EINT=144/PWRAP_SPI0_MI:145/PWRAP_SPI0_MO:147/IDDIG +BUILTIN_147=9/4:17/5:41/1:46/4:50/5:91/5:110/5:155/2 +BUILTIN_144=144/1 +BUILTIN_145=146/1 + + +[EINT_MD1] +EINT_MD1_COUNT = 3 + +[ADC] +ADC_COUNT = 5 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 10 + +[CLK_BUF] +CLK_BUF_COUNT = 7 +DRIVING_CURRENT_PMIC_CLK_BUF1=2:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF2=1:1:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF3=1:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF4=2:1:1.0:2.0:3.0:3.8 +DRIVING_CURRENT_PMIC_CLK_BUF5=0:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF6=0:1:0.6:1.0:1.4:1.7 +DRIVING_CURRENT_PMIC_CLK_BUF7=0:1:0.6:1.0:1.4:1.7 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 4 + +[SRC_PIN] +GPIO0::PAD_EINT0=0 +GPIO8::PAD_EINT8=1 +GPIO9::PAD_EINT9=0 +GPIO10::PAD_EINT10=1 +GPIO11::PAD_EINT11=2 +GPIO12::PAD_EINT12=0 +GPIO18::PAD_SPI2_CLK=0 +GPIO19::PAD_SPI2_MI=2 +GPIO20::PAD_SPI2_CSB=1 +GPIO41::PAD_IDDIG=0 +GPOI42::PAD_DRVBUS=1 +GPIO46::PAD_INT_SIM2=2 +GPIO47::PAD_INT_SIM1=1 +GPIO87::PAD_CAM_RST3=1 +GPIO88::PAD_CAM_CLK3=2 +GPIO89::PAD_SRCLKENAI=0 +GPIO90::PAD_PWM0=2 +GPIO91::PAD_KPROW1=0 +GPIO108::PAD_CAM_CLK2=0 +GPIO110::PAD_ANT_SEL0=0 +GPIO157::PAD_SPI0_MO=1 +GPIO158::PAD_SPI0_CLK=2 + +[POWER] +POWER_COUNT=0 diff --git a/tools/dct/config/MT6779.fig b/tools/dct/config/MT6779.fig new file mode 100644 index 000000000000..9ac630f79c02 --- /dev/null +++ b/tools/dct/config/MT6779.fig @@ -0,0 +1,281 @@ +[Chip Type] +Chip = MT6779 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +GPIO_ModeNum = 8 +GPIO_COLUMN_ENABLE=0 +POWER_TAB_ENABLE=0 +PMIC_APP_COUNT = 6 +AndroidPhone = 1 +CLK_BUF_UI_NEW = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(SPI6_MI) MODE2(I2S5_LRCK) MODE3(TDM_LRCK_2ND) MODE4(PCM1_SYNC) MODE5(SCL_6306) MODE6(TP_GPIO0_AO) MODE7(PTA_RXD) 0 0 +GPIO1 = MODE0(GPIO1) MODE1(SPI6_CSB) MODE2(I2S5_DO) MODE3(TDM_DATA0_2ND) MODE4(PCM1_DO0) MODE5(SDA_6306) MODE6(TP_GPIO1_AO) MODE7(PTA_TXD) 1 0 +GPIO2 = MODE0(GPIO2) MODE1(SPI6_MO) MODE2(I2S5_BCK) MODE3(TDM_BCK_2ND) MODE4(PCM1_CLK) MODE5(MD_INT1_C2K_UIM0_HOT_PLUG) MODE6(TP_GPIO2_AO) MODE7() 2 0 +GPIO3 = MODE0(GPIO3) MODE1(SPI6_CLK) MODE2(I2S5_MCK) MODE3(TDM_MCK_2ND) MODE4(EXT_FRAME_SYNC) MODE5(MD_INT2_C2K_UIM1_HOT_PLUG) MODE6(TP_GPIO3_AO) MODE7() 3 0 +GPIO4 = MODE0(GPIO4) MODE1(SPI7_MI) MODE2(I2S0_MCK) MODE3(TDM_DATA1_2ND) MODE4(PCM1_DO1) MODE5(DMIC1_CLK) MODE6(TP_GPIO4_AO) MODE7(SCL8) 4 0 +GPIO5 = MODE0(GPIO5) MODE1(SPI7_CSB) MODE2(I2S0_BCK) MODE3(TDM_DATA2_2ND) MODE4(PCM1_DO2) MODE5(DMIC1_DAT) MODE6(TP_GPIO5_AO) MODE7(SDA8) 5 0 +GPIO6 = MODE0(GPIO6) MODE1(SPI7_MO) MODE2(I2S0_LRCK) MODE3(TDM_DATA3_2ND) MODE4(PCM1_DI) MODE5(DMIC_CLK) MODE6(TP_GPIO6_AO) MODE7(SCL9) 6 0 +GPIO7 = MODE0(GPIO7) MODE1(SPI7_CLK) MODE2(I2S0_DI) MODE3(SRCLKENAI1) MODE4(DVFSRC_EXT_REQ) MODE5(DMIC_DAT) MODE6(TP_GPIO7_AO) MODE7(SDA9) 7 0 +GPIO8 = MODE0(GPIO8) MODE1(PWM_0) MODE2(I2S2_DI2) MODE3(SRCLKENAI0) MODE4(URXD1) MODE5(I2S0_MCK) MODE6(CONN_MCU_DBGACK_N) MODE7(IDDIG) 8 0 +GPIO9 = MODE0(GPIO9) MODE1(PWM_3) MODE2(MD_INT0) MODE3(SRCLKENAI1) MODE4(UTXD1) MODE5(I2S0_BCK) MODE6(CONN_MCU_TRST_B) MODE7(USB_DRVVBUS) 9 0 +GPIO10 = MODE0(GPIO10) MODE1(MSDC1_CLK_A) MODE2(TP_URXD1_AO) MODE3(I2S1_LRCK) MODE4(UCTS0) MODE5(DMIC1_CLK) MODE6(KPCOL2) MODE7(SCL8) 10 13 +GPIO11 = MODE0(GPIO11) MODE1(MSDC1_CMD_A) MODE2(TP_UTXD1_AO) MODE3(I2S1_DO) MODE4(URTS0) MODE5(DMIC1_DAT) MODE6(KPROW2) MODE7(SDA8) 11 14 +GPIO12 = MODE0(GPIO12) MODE1(MSDC1_DAT3_A) MODE2(TP_URXD2_AO) MODE3(I2S1_MCK) MODE4(UCTS1) MODE5(DMIC_CLK) MODE6(ANT_SEL9) MODE7(SCL9) 12 15 +GPIO13 = MODE0(GPIO13) MODE1(MSDC1_DAT0_A) MODE2(TP_UTXD2_AO) MODE3(I2S1_BCK) MODE4(URTS1) MODE5(DMIC_DAT) MODE6(ANT_SEL10) MODE7(SDA9) 13 15 +GPIO14 = MODE0(GPIO14) MODE1(MSDC1_DAT2_A) MODE2(PWM_3) MODE3(IDDIG) MODE4(MD_INT0) MODE5(PTA_RXD) MODE6(ANT_SEL11) MODE7() 14 15 +GPIO15 = MODE0(GPIO15) MODE1(MSDC1_DAT1_A) MODE2(DVFSRC_EXT_REQ) MODE3(USB_DRVVBUS) MODE4(MD_INT1_C2K_UIM0_HOT_PLUG) MODE5(PTA_TXD) MODE6(ANT_SEL12) MODE7() 15 15 +GPIO16 = MODE0(GPIO16) MODE1(SRCLKENAI0) MODE2(EXT_FRAME_SYNC) MODE3(MFG_EJTAG_TRSTN) MODE4(MD_INT2_C2K_UIM1_HOT_PLUG) MODE5(CONN_TCXOENA_REQ) MODE6(PWM_2) MODE7(JTRSTN_SEL1) 16 16 +GPIO17 = MODE0(GPIO17) MODE1(SPI0_A_MI) MODE2(SCP_SPI0_MI) MODE3(MFG_EJTAG_TDO) MODE4(DPI_HSYNC) MODE5(MFG_DFD_JTAG_TDO) MODE6(DFD_TDO) MODE7(JTDO_SEL1) 17 7 +GPIO18 = MODE0(GPIO18) MODE1(SPI0_A_MO) MODE2(SCP_SPI0_MO) MODE3(MFG_EJTAG_TDI) MODE4(DPI_VSYNC) MODE5(MFG_DFD_JTAG_TDI) MODE6(DFD_TDI) MODE7(JTDI_SEL1) 18 7 +GPIO19 = MODE0(GPIO19) MODE1(SPI0_A_CSB) MODE2(SCP_SPI0_CS) MODE3(MFG_EJTAG_TMS) MODE4(DPI_DE) MODE5(MFG_DFD_JTAG_TMS) MODE6(DFD_TMS) MODE7(JTMS_SEL1) 19 7 +GPIO20 = MODE0(GPIO20) MODE1(SPI0_A_CLK) MODE2(SCP_SPI0_CK) MODE3(MFG_EJTAG_TCK) MODE4(DPI_CK) MODE5(MFG_DFD_JTAG_TCK) MODE6(DFD_TCK_XI) MODE7(JTCK_SEL1) 20 7 +GPIO21 = MODE0(GPIO21) MODE1(PWM_0) MODE2(CMFLASH0) MODE3(CMVREF2) MODE4(CLKM0) MODE5(ANT_SEL9) MODE6(CONN_TCXOENA_REQ) MODE7(DBG_MON_A27) 21 81 +GPIO22 = MODE0(GPIO22) MODE1(PWM_1) MODE2(CMFLASH1) MODE3(CMVREF3) MODE4(CLKM1) MODE5(ANT_SEL10) MODE6() MODE7(DBG_MON_A28) 22 81 +GPIO23 = MODE0(GPIO23) MODE1(PWM_2) MODE2(CMFLASH2) MODE3(CMVREF0) MODE4(CLKM2) MODE5(ANT_SEL11) MODE6() MODE7(DBG_MON_A29) 23 81 +GPIO24 = MODE0(GPIO24) MODE1(PWM_0) MODE2(CMFLASH3) MODE3(CMVREF1) MODE4(CLKM3) MODE5(ANT_SEL12) MODE6() MODE7(DBG_MON_A30) 24 81 +GPIO25 = MODE0(GPIO25) MODE1(SRCLKENAI0) MODE2(UCTS0) MODE3(SCL8) MODE4(CMVREF4) MODE5(I2S0_LRCK) MODE6(CONN_TCXOENA_REQ) MODE7(DBG_MON_A31) 25 82 +GPIO26 = MODE0(GPIO26) MODE1(PWM_0) MODE2(URTS0) MODE3(SDA8) MODE4(CLKM0) MODE5(I2S0_DI) MODE6(AGPS_SYNC) MODE7(DBG_MON_A32) 26 83 +GPIO27 = MODE0(GPIO27) MODE1(AP_GOOD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 27 1 +GPIO28 = MODE0(GPIO28) MODE1(SCL5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 28 2 +GPIO29 = MODE0(GPIO29) MODE1(SDA5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 29 3 +GPIO30 = MODE0(GPIO30) MODE1(I2S1_MCK) MODE2(I2S3_MCK) MODE3(I2S2_MCK) MODE4(DPI_D0) MODE5(SPI4_MI) MODE6(CONN_MCU_DBGI_N) MODE7() 30 4 +GPIO31 = MODE0(GPIO31) MODE1(I2S1_BCK) MODE2(I2S3_BCK) MODE3(I2S2_BCK) MODE4(DPI_D1) MODE5(SPI4_CSB) MODE6(CONN_MCU_TDO) MODE7() 31 4 +GPIO32 = MODE0(GPIO32) MODE1(I2S1_LRCK) MODE2(I2S3_LRCK) MODE3(I2S2_LRCK) MODE4(DPI_D2) MODE5(SPI4_MO) MODE6(CONN_MCU_TDI) MODE7() 32 4 +GPIO33 = MODE0(GPIO33) MODE1(I2S2_DI) MODE2(I2S0_DI) MODE3(I2S5_DO) MODE4(DPI_D3) MODE5(SPI4_CLK) MODE6(CONN_MCU_TMS) MODE7() 33 5 +GPIO34 = MODE0(GPIO34) MODE1(I2S1_DO) MODE2(I2S3_DO) MODE3(I2S2_DI2) MODE4(DPI_D4) MODE5(AGPS_SYNC) MODE6(CONN_MCU_TCK) MODE7() 34 4 +GPIO35 = MODE0(GPIO35) MODE1(TDM_LRCK) MODE2(I2S1_LRCK) MODE3(I2S5_LRCK) MODE4(DPI_D5) MODE5(SPI5_A_MO) MODE6(IO_JTAG_TDI) MODE7(PWM_2) 35 6 +GPIO36 = MODE0(GPIO36) MODE1(TDM_BCK) MODE2(I2S1_BCK) MODE3(I2S5_BCK) MODE4(DPI_D6) MODE5(SPI5_A_CSB) MODE6(IO_JTAG_TRSTN) MODE7(SRCLKENAI1) 36 6 +GPIO37 = MODE0(GPIO37) MODE1(TDM_MCK) MODE2(I2S1_MCK) MODE3(I2S5_MCK) MODE4(DPI_D7) MODE5(SPI5_A_MI) MODE6(IO_JTAG_TCK) MODE7(SRCLKENAI0) 37 6 +GPIO38 = MODE0(GPIO38) MODE1(TDM_DATA0) MODE2(I2S2_DI) MODE3(I2S5_DO) MODE4(DPI_D8) MODE5(SPI5_A_CLK) MODE6(IO_JTAG_TDO) MODE7(CONN_TCXOENA_REQ) 38 6 +GPIO39 = MODE0(GPIO39) MODE1(TDM_DATA1) MODE2(I2S1_DO) MODE3(I2S2_DI2) MODE4(DPI_D9) MODE5(DVFSRC_EXT_REQ) MODE6(IO_JTAG_TMS) MODE7(IDDIG) 39 6 +GPIO40 = MODE0(GPIO40) MODE1(TDM_DATA2) MODE2(SCL9) MODE3(PWM_3) MODE4(DPI_D10) MODE5(SRCLKENAI0) MODE6(DAP_MD32_SWD) MODE7(USB_DRVVBUS) 40 6 +GPIO41 = MODE0(GPIO41) MODE1(TDM_DATA3) MODE2(SDA9) MODE3(PWM_1) MODE4(DPI_D11) MODE5(CLKM1) MODE6(DAP_MD32_SWCK) MODE7() 41 6 +GPIO42 = MODE0(GPIO42) MODE1(DISP_PWM) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 42 8 +GPIO43 = MODE0(GPIO43) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 43 11 +GPIO44 = MODE0(GPIO44) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 44 12 +GPIO45 = MODE0(GPIO45) MODE1(SCL6) MODE2(SCP_SCL0) MODE3(SCP_SCL1) MODE4(SCL_6306) MODE5() MODE6() MODE7() 45 17 +GPIO46 = MODE0(GPIO46) MODE1(SDA6) MODE2(SCP_SDA0) MODE3(SCP_SDA1) MODE4(SDA_6306) MODE5() MODE6() MODE7() 46 18 +GPIO47 = MODE0(GPIO47) MODE1(SPI1_A_MI) MODE2(SCP_SPI1_A_MI) MODE3(KPCOL2) MODE4(MD_URXD0) MODE5(CONN_UART0_RXD) MODE6(SSPM_URXD_AO) MODE7(DBG_MON_B32) 47 19 +GPIO48 = MODE0(GPIO48) MODE1(SPI1_A_CSB) MODE2(SCP_SPI1_A_CS) MODE3(KPROW2) MODE4(MD_UTXD0) MODE5(CONN_UART0_TXD) MODE6(SSPM_UTXD_AO) MODE7(DBG_MON_B31) 48 19 +GPIO49 = MODE0(GPIO49) MODE1(SPI1_A_MO) MODE2(SCP_SPI1_A_MO) MODE3(UCTS0) MODE4(MD_URXD1) MODE5(PWM_1) MODE6(TP_URXD2_AO) MODE7(DBG_MON_B30) 49 19 +GPIO50 = MODE0(GPIO50) MODE1(SPI1_A_CLK) MODE2(SCP_SPI1_A_CK) MODE3(URTS0) MODE4(MD_UTXD1) MODE5(WIFI_TXD) MODE6(TP_UTXD2_AO) MODE7(DBG_MON_B29) 50 19 +GPIO51 = MODE0(GPIO51) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 51 20 +GPIO52 = MODE0(GPIO52) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 52 21 +GPIO53 = MODE0(GPIO53) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD0) MODE4(MD_URXD1) MODE5(SSPM_URXD_AO) MODE6() MODE7(CONN_UART0_RXD) 53 22 +GPIO54 = MODE0(GPIO54) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD0) MODE4(MD_UTXD1) MODE5(SSPM_UTXD_AO) MODE6(WIFI_TXD) MODE7(CONN_UART0_TXD) 54 23 +GPIO55 = MODE0(GPIO55) MODE1(SCL3) MODE2(SCP_SCL0) MODE3(SCP_SCL1) MODE4(SCL_6306) MODE5() MODE6() MODE7() 55 24 +GPIO56 = MODE0(GPIO56) MODE1(SDA3) MODE2(SCP_SDA0) MODE3(SCP_SDA1) MODE4(SDA_6306) MODE5() MODE6() MODE7() 56 25 +GPIO57 = MODE0(GPIO57) MODE1(KPROW1) MODE2(PWM_1) MODE3(DVFSRC_EXT_REQ) MODE4(CLKM1) MODE5(IDDIG) MODE6(CONN_TCXOENA_REQ) MODE7(MBISTREADEN_TRIGGER) 57 26 +GPIO58 = MODE0(GPIO58) MODE1(KPROW0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B28) 58 26 +GPIO59 = MODE0(GPIO59) MODE1(KPCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B27) 59 26 +GPIO60 = MODE0(GPIO60) MODE1(KPCOL1) MODE2(PWM_2) MODE3(UCTS1) MODE4(CLKM2) MODE5(USB_DRVVBUS) MODE6() MODE7(MBISTWRITEEN_TRIGGER) 60 26 +GPIO61 = MODE0(GPIO61) MODE1(SCL1) MODE2(SCP_SCL0) MODE3(SCP_SCL1) MODE4() MODE5() MODE6() MODE7() 61 27 +GPIO62 = MODE0(GPIO62) MODE1(SDA1) MODE2(SCP_SDA0) MODE3(SCP_SDA1) MODE4() MODE5() MODE6() MODE7() 62 28 +GPIO63 = MODE0(GPIO63) MODE1(SPI2_MI) MODE2(SCP_SPI2_MI) MODE3(KPCOL2) MODE4(MRG_DI) MODE5(MD_URXD0) MODE6(CONN_UART0_RXD) MODE7(DBG_MON_B26) 63 29 +GPIO64 = MODE0(GPIO64) MODE1(SPI2_CSB) MODE2(SCP_SPI2_CS) MODE3(KPROW2) MODE4(MRG_SYNC) MODE5(MD_UTXD0) MODE6(CONN_UART0_TXD) MODE7(DBG_MON_B25) 64 29 +GPIO65 = MODE0(GPIO65) MODE1(SPI2_MO) MODE2(SCP_SPI2_MO) MODE3(SCP_SDA1) MODE4(MRG_DO) MODE5(MD_URXD1) MODE6(PWM_3) MODE7() 65 29 +GPIO66 = MODE0(GPIO66) MODE1(SPI2_CLK) MODE2(SCP_SPI2_CK) MODE3(SCP_SCL1) MODE4(MRG_CLK) MODE5(MD_UTXD1) MODE6(WIFI_TXD) MODE7() 66 29 +GPIO67 = MODE0(GPIO67) MODE1(I2S3_LRCK) MODE2(I2S1_LRCK) MODE3(URXD1) MODE4(PCM0_SYNC) MODE5(I2S5_LRCK) MODE6(ANT_SEL9) MODE7(DBG_MON_B10) 67 41 +GPIO68 = MODE0(GPIO68) MODE1(I2S3_DO) MODE2(I2S1_DO) MODE3(UTXD1) MODE4(PCM0_DO) MODE5(I2S5_DO) MODE6(ANT_SEL10) MODE7(DBG_MON_B9) 68 41 +GPIO69 = MODE0(GPIO69) MODE1(I2S3_MCK) MODE2(I2S1_MCK) MODE3(URTS1) MODE4(AGPS_SYNC) MODE5(I2S5_MCK) MODE6(DVFSRC_EXT_REQ) MODE7(DBG_MON_B8) 69 41 +GPIO70 = MODE0(GPIO70) MODE1(I2S0_DI) MODE2(I2S2_DI) MODE3(KPCOL2) MODE4(PCM0_DI) MODE5(I2S2_DI2) MODE6(ANT_SEL11) MODE7(DBG_MON_B7) 70 42 +GPIO71 = MODE0(GPIO71) MODE1(I2S3_BCK) MODE2(I2S1_BCK) MODE3(KPROW2) MODE4(PCM0_CLK) MODE5(I2S5_BCK) MODE6(ANT_SEL12) MODE7(DBG_MON_B6) 71 41 +GPIO72 = MODE0(GPIO72) MODE1(BPI_BUS19_OLAT0) MODE2(CONN_BPI_BUS19_OLAT0) MODE3() MODE4() MODE5() MODE6() MODE7() 72 35 +GPIO73 = MODE0(GPIO73) MODE1(BPI_BUS18_PA_VM1) MODE2(CONN_MIPI5_SCLK) MODE3(MIPI5_SCLK) MODE4() MODE5() MODE6() MODE7() 73 35 +GPIO74 = MODE0(GPIO74) MODE1(BPI_BUS17_PA_VM0) MODE2(CONN_MIPI5_SDATA) MODE3(MIPI5_SDATA) MODE4() MODE5() MODE6() MODE7() 74 35 +GPIO75 = MODE0(GPIO75) MODE1(BPI_BUS20_OLAT1) MODE2(CONN_BPI_BUS20_OLAT1) MODE3(RFIC0_BSI_D2) MODE4() MODE5() MODE6() MODE7() 75 35 +GPIO76 = MODE0(GPIO76) MODE1(RFIC0_BSI_D1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 76 36 +GPIO77 = MODE0(GPIO77) MODE1(RFIC0_BSI_D0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 77 36 +GPIO78 = MODE0(GPIO78) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B24) 78 37 +GPIO79 = MODE0(GPIO79) MODE1(BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B23) 79 37 +GPIO80 = MODE0(GPIO80) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B22) 80 37 +GPIO81 = MODE0(GPIO81) MODE1(BPI_BUS9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B21) 81 37 +GPIO82 = MODE0(GPIO82) MODE1(BPI_BUS10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B20) 82 37 +GPIO83 = MODE0(GPIO83) MODE1(BPI_BUS11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B19) 83 37 +GPIO84 = MODE0(GPIO84) MODE1(BPI_BUS12) MODE2(CONN_BPI_BUS12) MODE3() MODE4() MODE5() MODE6() MODE7() 84 37 +GPIO85 = MODE0(GPIO85) MODE1(BPI_BUS13) MODE2(CONN_BPI_BUS13) MODE3() MODE4() MODE5() MODE6() MODE7() 85 37 +GPIO86 = MODE0(GPIO86) MODE1(BPI_BUS14) MODE2(CONN_BPI_BUS14) MODE3() MODE4() MODE5() MODE6() MODE7() 86 37 +GPIO87 = MODE0(GPIO87) MODE1(BPI_BUS15) MODE2(CONN_BPI_BUS15) MODE3() MODE4() MODE5() MODE6() MODE7() 87 38 +GPIO88 = MODE0(GPIO88) MODE1(BPI_BUS16) MODE2(CONN_BPI_BUS16) MODE3() MODE4() MODE5() MODE6() MODE7() 88 38 +GPIO89 = MODE0(GPIO89) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B18) 89 38 +GPIO90 = MODE0(GPIO90) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B17) 90 38 +GPIO91 = MODE0(GPIO91) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 91 38 +GPIO92 = MODE0(GPIO92) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) 92 38 +GPIO93 = MODE0(GPIO93) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 93 33 +GPIO94 = MODE0(GPIO94) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B15) 94 38 +GPIO95 = MODE0(GPIO95) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 95 34 +GPIO96 = MODE0(GPIO96) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 96 34 +GPIO97 = MODE0(GPIO97) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 97 34 +GPIO98 = MODE0(GPIO98) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 98 34 +GPIO99 = MODE0(GPIO99) MODE1(MIPI2_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B14) 99 39 +GPIO100 = MODE0(GPIO100) MODE1(MIPI2_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B13) 100 39 +GPIO101 = MODE0(GPIO101) MODE1(MIPI3_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B12) 101 39 +GPIO102 = MODE0(GPIO102) MODE1(MIPI3_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B11) 102 39 +GPIO103 = MODE0(GPIO103) MODE1(MIPI4_SCLK) MODE2(CONN_MIPI4_SCLK) MODE3() MODE4() MODE5() MODE6() MODE7() 103 39 +GPIO104 = MODE0(GPIO104) MODE1(MIPI4_SDATA) MODE2(CONN_MIPI4_SDATA) MODE3() MODE4() MODE5() MODE6() MODE7() 104 39 +GPIO105 = MODE0(GPIO105) MODE1(BPI_BUS22_OLAT3) MODE2(CONN_BPI_BUS22_OLAT3) MODE3() MODE4() MODE5() MODE6() MODE7() 105 40 +GPIO106 = MODE0(GPIO106) MODE1(BPI_BUS21_OLAT2) MODE2(CONN_BPI_BUS21_OLAT2) MODE3() MODE4() MODE5() MODE6() MODE7() 106 40 +GPIO107 = MODE0(GPIO107) MODE1(BPI_BUS24_ANT1) MODE2(CONN_BPI_BUS24_ANT1) MODE3() MODE4() MODE5() MODE6() MODE7() 107 40 +GPIO108 = MODE0(GPIO108) MODE1(BPI_BUS25_ANT2) MODE2(CONN_BPI_BUS25_ANT2) MODE3() MODE4() MODE5() MODE6() MODE7() 108 40 +GPIO109 = MODE0(GPIO109) MODE1(BPI_BUS23_ANT0) MODE2(CONN_BPI_BUS23_ANT0) MODE3() MODE4() MODE5() MODE6() MODE7() 109 40 +GPIO110 = MODE0(GPIO110) MODE1(SCL4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 110 43 +GPIO111 = MODE0(GPIO111) MODE1(SDA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 111 44 +GPIO112 = MODE0(GPIO112) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 112 45 +GPIO113 = MODE0(GPIO113) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 113 46 +GPIO114 = MODE0(GPIO114) MODE1(CLKM0) MODE2(SPI3_MI) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B5) 114 47 +GPIO115 = MODE0(GPIO115) MODE1(CLKM1) MODE2(SPI3_CSB) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B4) 115 47 +GPIO116 = MODE0(GPIO116) MODE1(CMMCLK0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B3) 116 48 +GPIO117 = MODE0(GPIO117) MODE1(CMMCLK1) MODE2(DVFSRC_EXT_REQ) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B2) 117 49 +GPIO118 = MODE0(GPIO118) MODE1(CLKM2) MODE2(SPI3_MO) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B1) 118 47 +GPIO119 = MODE0(GPIO119) MODE1(CLKM3) MODE2(SPI3_CLK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B0) 119 47 +GPIO120 = MODE0(GPIO120) MODE1(CMMCLK2) MODE2(CLKM2) MODE3() MODE4() MODE5() MODE6(ANT_SEL12) MODE7(TP_UCTS2_AO) 120 50 +GPIO121 = MODE0(GPIO121) MODE1(CMMCLK3) MODE2(CLKM3) MODE3(DVFSRC_EXT_REQ) MODE4() MODE5() MODE6(ANT_SEL11) MODE7(TP_URTS2_AO) 121 51 +GPIO122 = MODE0(GPIO122) MODE1(CMVREF1) MODE2(PCM0_SYNC) MODE3(SRCLKENAI1) MODE4(AGPS_SYNC) MODE5(PWM_1) MODE6(ANT_SEL9) MODE7(TP_UCTS1_AO) 122 52 +GPIO123 = MODE0(GPIO123) MODE1() MODE2(PCM0_DI) MODE3(ADSP_JTAG_TRSTN) MODE4(VPU_UDI_NTRST) MODE5(SPM_JTAG_TRSTN) MODE6(SSPM_JTAG_TRSTN) MODE7() 123 52 +GPIO124 = MODE0(GPIO124) MODE1(CMVREF2) MODE2(PCM0_CLK) MODE3(MD_INT0) MODE4(EXT_FRAME_SYNC) MODE5(PWM_2) MODE6(ANT_SEL10) MODE7(TP_URTS1_AO) 124 52 +GPIO125 = MODE0(GPIO125) MODE1(CMVREF3) MODE2(PCM0_DO) MODE3(ADSP_JTAG_TMS) MODE4(VPU_UDI_TMS) MODE5(SPM_JTAG_TMS) MODE6(SSPM_JTAG_TMS) MODE7() 125 52 +GPIO126 = MODE0(GPIO126) MODE1(CMVREF4) MODE2(CMFLASH0) MODE3() MODE4() MODE5() MODE6(CONN_MCU_AICE_TMSC) MODE7() 126 54 +GPIO127 = MODE0(GPIO127) MODE1(CMVREF0) MODE2(CMFLASH1) MODE3() MODE4() MODE5() MODE6(CONN_MCU_AICE_TCKC) MODE7() 127 54 +GPIO128 = MODE0(GPIO128) MODE1(MD1_SIM1_SIO) MODE2(MD1_SIM2_SIO) MODE3(CCU_JTAG_TRST) MODE4(CONN_DSP_JINTP) MODE5(SCP_JTAG_TRSTN) MODE6(LVTS_FOUT) MODE7(DBG_MON_A3) 128 59 +GPIO129 = MODE0(GPIO129) MODE1(MD1_SIM1_SRST) MODE2(MD1_SIM2_SRST) MODE3(CCU_JTAG_TCK) MODE4(CONN_DSP_JCK) MODE5(SCP_JTAG_TCK) MODE6(LVTS_SDO) MODE7(DBG_MON_A4) 129 59 +GPIO130 = MODE0(GPIO130) MODE1(MD1_SIM1_SCLK) MODE2(MD1_SIM2_SCLK) MODE3() MODE4() MODE5() MODE6(LVTS_26M) MODE7(DBG_MON_A5) 130 59 +GPIO131 = MODE0(GPIO131) MODE1(MD1_SIM2_SCLK) MODE2(MD1_SIM1_SCLK) MODE3(CCU_JTAG_TDI) MODE4(CONN_DSP_JDI) MODE5(SCP_JTAG_TDI) MODE6(LVTS_SCK) MODE7(DBG_MON_A0) 131 58 +GPIO132 = MODE0(GPIO132) MODE1(MD1_SIM2_SRST) MODE2(MD1_SIM1_SRST) MODE3(CCU_JTAG_TMS) MODE4(CONN_DSP_JMS) MODE5(SCP_JTAG_TMS) MODE6(LVTS_SDI) MODE7(DBG_MON_A1) 132 58 +GPIO133 = MODE0(GPIO133) MODE1(MD1_SIM2_SIO) MODE2(MD1_SIM1_SIO) MODE3(CCU_JTAG_TDO) MODE4(CONN_DSP_JDO) MODE5(SCP_JTAG_TDO) MODE6(LVTS_SCF) MODE7(DBG_MON_A2) 133 58 +GPIO134 = MODE0(GPIO134) MODE1(MSDC1_CLK) MODE2(PCM1_CLK) MODE3(SPI5_B_MI) MODE4(UDI_TCK) MODE5(CONN_DSP_JCK) MODE6(IPU_JTAG_TCK) MODE7(JTCK_SEL3) 134 55 +GPIO135 = MODE0(GPIO135) MODE1(MSDC1_CMD) MODE2(PCM1_SYNC) MODE3(SPI5_B_CSB) MODE4(UDI_TMS) MODE5(CONN_DSP_JMS) MODE6(IPU_JTAG_TMS) MODE7(JTMS_SEL3) 135 56 +GPIO136 = MODE0(GPIO136) MODE1(MSDC1_DAT3) MODE2(PCM1_DI) MODE3(SPI5_B_MO) MODE4(CONN_TCXOENA_REQ) MODE5(CONN_DSP_JINTP) MODE6(CONN_MCU_AICE_TMSC) MODE7() 136 57 +GPIO137 = MODE0(GPIO137) MODE1(MSDC1_DAT0) MODE2(PCM1_DO0) MODE3(SPI5_B_CLK) MODE4(UDI_TDI) MODE5(CONN_DSP_JDI) MODE6(IPU_JTAG_TDI) MODE7(JTDI_SEL3) 137 57 +GPIO138 = MODE0(GPIO138) MODE1(MSDC1_DAT2) MODE2(PCM1_DO2) MODE3(ANT_SEL11) MODE4(UDI_NTRST) MODE5(CONN_MCU_AICE_TCKC) MODE6(IPU_JTAG_TRST) MODE7(JTRSTN_SEL3) 138 57 +GPIO139 = MODE0(GPIO139) MODE1(MSDC1_DAT1) MODE2(PCM1_DO1) MODE3(ANT_SEL12) MODE4(UDI_TDO) MODE5(CONN_DSP_JDO) MODE6(IPU_JTAG_TDO) MODE7(JTDO_SEL3) 139 57 +GPIO140 = MODE0(GPIO140) MODE1(MD_INT1_C2K_UIM0_HOT_PLUG) MODE2(MD_INT2_C2K_UIM1_HOT_PLUG) MODE3(ADSP_URXD0) MODE4(SCL_6306) MODE5(PTA_RXD) MODE6(SSPM_URXD_AO) MODE7() 140 60 +GPIO141 = MODE0(GPIO141) MODE1(MD_INT2_C2K_UIM1_HOT_PLUG) MODE2(MD_INT1_C2K_UIM0_HOT_PLUG) MODE3(ADSP_UTXD0) MODE4(SDA_6306) MODE5(PTA_TXD) MODE6(SSPM_UTXD_AO) MODE7() 141 61 +GPIO142 = MODE0(GPIO142) MODE1(SCP_VREQ_VAO) MODE2(DVFSRC_EXT_REQ) MODE3() MODE4() MODE5() MODE6() MODE7() 142 64 +GPIO143 = MODE0(GPIO143) MODE1(AUD_DAT_MOSI2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A9) 143 68 +GPIO144 = MODE0(GPIO144) MODE1(AUD_NLE_MOSI1) MODE2(AUD_CLK_MISO) MODE3(I2S2_MCK) MODE4() MODE5(UDI_TCK) MODE6(UFS_UNIPRO_SDA) MODE7(DBG_MON_A10) 144 68 +GPIO145 = MODE0(GPIO145) MODE1(AUD_NLE_MOSI0) MODE2(AUD_SYNC_MISO) MODE3(I2S2_BCK) MODE4() MODE5(UDI_TMS) MODE6() MODE7(DBG_MON_A11) 145 68 +GPIO146 = MODE0(GPIO146) MODE1(AUD_DAT_MISO2) MODE2() MODE3(I2S2_DI2) MODE4() MODE5(UDI_TDO) MODE6() MODE7(DBG_MON_A14) 146 68 +GPIO147 = MODE0(GPIO147) MODE1(ANT_SEL0) MODE2(PWM_3) MODE3() MODE4() MODE5() MODE6() MODE7() 147 69 +GPIO148 = MODE0(GPIO148) MODE1(ANT_SEL1) MODE2(SPI0_B_MI) MODE3(SSPM_URXD_AO) MODE4() MODE5(TP_UCTS2_AO) MODE6(CLKM0) MODE7() 148 69 +GPIO149 = MODE0(GPIO149) MODE1(ANT_SEL2) MODE2(SPI0_B_CSB) MODE3(SSPM_UTXD_AO) MODE4() MODE5(TP_URTS2_AO) MODE6(CONN_TCXOENA_REQ) MODE7() 149 69 +GPIO150 = MODE0(GPIO150) MODE1(ANT_SEL3) MODE2(SPI0_B_MO) MODE3(UCTS1) MODE4() MODE5(TP_UCTS1_AO) MODE6(IDDIG) MODE7(SCL9) 150 69 +GPIO151 = MODE0(GPIO151) MODE1(ANT_SEL4) MODE2(SPI0_B_CLK) MODE3(URTS1) MODE4() MODE5(TP_URTS1_AO) MODE6(USB_DRVVBUS) MODE7(SDA9) 151 69 +GPIO152 = MODE0(GPIO152) MODE1(ANT_SEL5) MODE2(SPI1_B_MI) MODE3(CLKM3) MODE4() MODE5(TP_URXD1_AO) MODE6(SCP_SPI1_B_MI) MODE7(SCL8) 152 69 +GPIO153 = MODE0(GPIO153) MODE1(ANT_SEL6) MODE2(SPI1_B_CSB) MODE3(SRCLKENAI0) MODE4(PWM_0) MODE5(TP_UTXD1_AO) MODE6(SCP_SPI1_B_CS) MODE7(SDA8) 153 69 +GPIO154 = MODE0(GPIO154) MODE1(ANT_SEL7) MODE2(SPI1_B_MO) MODE3(SRCLKENAI1) MODE4() MODE5(TP_URXD2_AO) MODE6(SCP_SPI1_B_MO) MODE7() 154 69 +GPIO155 = MODE0(GPIO155) MODE1(ANT_SEL8) MODE2(SPI1_B_CLK) MODE3(MD_INT0) MODE4() MODE5(TP_UTXD2_AO) MODE6(SCP_SPI1_B_CK) MODE7(DBG_MON_A15) 155 69 +GPIO156 = MODE0(GPIO156) MODE1(CONN_TOP_CLK) MODE2(AUXIF_CLK0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A16) 156 70 +GPIO157 = MODE0(GPIO157) MODE1(CONN_TOP_DATA) MODE2(AUXIF_ST0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A17) 157 71 +GPIO158 = MODE0(GPIO158) MODE1(CONN_HRST_B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A18) 158 72 +GPIO159 = MODE0(GPIO159) MODE1(CONN_WB_PTA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A19) 159 73 +GPIO160 = MODE0(GPIO160) MODE1(CONN_BT_CLK) MODE2(AUXIF_CLK1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A20) 160 74 +GPIO161 = MODE0(GPIO161) MODE1(CONN_BT_DATA) MODE2(AUXIF_ST1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A21) 161 75 +GPIO162 = MODE0(GPIO162) MODE1(CONN_WF_CTRL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A22) 162 76 +GPIO163 = MODE0(GPIO163) MODE1(CONN_WF_CTRL1) MODE2(UFS_MPHY_SCL) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A23) 163 76 +GPIO164 = MODE0(GPIO164) MODE1(CONN_WF_CTRL2) MODE2(UFS_MPHY_SDA) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A24) 164 76 +GPIO165 = MODE0(GPIO165) MODE1(CONN_WF_CTRL3) MODE2(UFS_UNIPRO_SDA) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A25) 165 76 +GPIO166 = MODE0(GPIO166) MODE1(CONN_WF_CTRL4) MODE2(UFS_UNIPRO_SCL) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A26) 166 76 +GPIO167 = MODE0(GPIO167) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 167 77 +GPIO168 = MODE0(GPIO168) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 168 78 +GPIO169 = MODE0(GPIO169) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 169 78 +GPIO170 = MODE0(GPIO170) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 170 78 +GPIO171 = MODE0(GPIO171) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 171 78 +GPIO172 = MODE0(GPIO172) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 172 78 +GPIO173 = MODE0(GPIO173) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 173 78 +GPIO174 = MODE0(GPIO174) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 174 78 +GPIO175 = MODE0(GPIO175) MODE1(MSDC0_DSL) MODE2(ANT_SEL9) MODE3() MODE4() MODE5() MODE6() MODE7() 175 79 +GPIO176 = MODE0(GPIO176) MODE1(MSDC0_CLK) MODE2(ANT_SEL10) MODE3() MODE4() MODE5() MODE6() MODE7() 176 80 +GPIO177 = MODE0(GPIO177) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 177 78 +GPIO178 = MODE0(GPIO178) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 178 78 +GPIO179 = MODE0(GPIO179) MODE1(RFIC0_BSI_EN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 36 +GPIO180 = MODE0(GPIO180) MODE1(RFIC0_BSI_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 36 +GPIO181 = MODE0(GPIO181) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 62 +GPIO182 = MODE0(GPIO182) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 63 +GPIO183 = MODE0(GPIO183) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 65 +GPIO184 = MODE0(GPIO184) MODE1(PWRAP_SPI0_MI) MODE2(PWRAP_SPI0_MO) MODE3() MODE4() MODE5() MODE6() MODE7() -1 66 +GPIO185 = MODE0(GPIO185) MODE1(PWRAP_SPI0_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 66 +GPIO186 = MODE0(GPIO186) MODE1(PWRAP_SPI0_MO) MODE2(PWRAP_SPI0_MI) MODE3() MODE4() MODE5() MODE6() MODE7() -1 66 +GPIO187 = MODE0(GPIO187) MODE1(PWRAP_SPI0_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 66 +GPIO188 = MODE0(GPIO188) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -1 67 +GPIO189 = MODE0(GPIO189) MODE1(AUD_CLK_MOSI) MODE2() MODE3(I2S1_MCK) MODE4() MODE5() MODE6(UFS_UNIPRO_SCL) MODE7() -1 68 +GPIO190 = MODE0(GPIO190) MODE1(AUD_SYNC_MOSI) MODE2() MODE3(I2S1_BCK) MODE4() MODE5() MODE6() MODE7(DBG_MON_A6) -1 68 +GPIO191 = MODE0(GPIO191) MODE1(AUD_DAT_MOSI0) MODE2() MODE3(I2S1_LRCK) MODE4() MODE5() MODE6() MODE7(DBG_MON_A7) -1 68 +GPIO192 = MODE0(GPIO192) MODE1(AUD_DAT_MOSI1) MODE2() MODE3(I2S1_DO) MODE4() MODE5() MODE6(UFS_MPHY_SDA) MODE7(DBG_MON_A8) -1 68 +GPIO193 = MODE0(GPIO193) MODE1(AUD_DAT_MISO0) MODE2(VOW_DAT_MISO) MODE3(I2S2_LRCK) MODE4() MODE5(UDI_TDI) MODE6() MODE7(DBG_MON_A12) -1 68 +GPIO194 = MODE0(GPIO194) MODE1(AUD_DAT_MISO1) MODE2(VOW_CLK_MISO) MODE3(I2S2_DI) MODE4() MODE5(UDI_NTRST) MODE6(UFS_MPHY_SCL) MODE7(DBG_MON_A13) -1 68 +GPIO195 = MODE0(GPIO195) MODE1() MODE2() MODE3(ADSP_JTAG_TCK) MODE4(VPU_UDI_TCK) MODE5(SPM_JTAG_TCK) MODE6(SSPM_JTAG_TCK) MODE7() 179 52 +GPIO196 = MODE0(GPIO196) MODE1(CMMCLK4) MODE2() MODE3(ADSP_JTAG_TDI) MODE4(VPU_UDI_TDI) MODE5(SPM_JTAG_TDI) MODE6(SSPM_JTAG_TDI) MODE7() 180 53 +GPIO197 = MODE0(GPIO197) MODE1() MODE2() MODE3(ADSP_JTAG_TDO) MODE4(VPU_UDI_TDO) MODE5(SPM_JTAG_TDO) MODE6(SSPM_JTAG_TDO) MODE7() 181 52 +GPIO198 = MODE0(GPIO198) MODE1(SCL7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 182 30 +GPIO199 = MODE0(GPIO199) MODE1(SDA7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 183 31 +GPIO200 = MODE0(GPIO200) MODE1(URXD1) MODE2(ADSP_URXD0) MODE3(TP_URXD1_AO) MODE4(SSPM_URXD_AO) MODE5(TP_URXD2_AO) MODE6(MBISTREADEN_TRIGGER) MODE7() 184 9 +GPIO201 = MODE0(GPIO201) MODE1(UTXD1) MODE2(ADSP_UTXD0) MODE3(TP_UTXD1_AO) MODE4(SSPM_UTXD_AO) MODE5(TP_UTXD2_AO) MODE6(MBISTWRITEEN_TRIGGER) MODE7() 185 10 +GPIO202 = MODE0(GPIO202) MODE1(PWM_3) MODE2(CLKM3) MODE3() MODE4() MODE5() MODE6() MODE7() 186 32 +GPIO203 = MODE0(GPIO203) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 187 -1 +GPIO204 = MODE0(GPIO204) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 188 -1 +GPIO205 = MODE0(GPIO205) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 189 -1 +GPIO206 = MODE0(GPIO206) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 190 -1 +GPIO207 = MODE0(GPIO207) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 191 -1 +GPIO208 = MODE0(GPIO208) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 193 -1 +GPIO209 = MODE0(GPIO209) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() 194 -1 + +[GPIO_EXT] +MIPI_PINS=95:96:97:98:99:100:101:102:103:104 + +[EINT] +EINT_COUNT = 195 + +[EINT_MD1] +EINT_MD1_COUNT = 3 + +[ADC] +ADC_COUNT = 5 + +[ADC_EX_PIN] +0 = 0 +1 = 1 +2 = 2 +3 = 3 +4 = 4 + +[CLK_BUF] +CLK_BUF_COUNT = 5 +DRIVING_CURRENT_PMIC_CLK_BUF1=2/6:70:60:55:50:45:35:30:25/-1 +DRIVING_CURRENT_PMIC_CLK_BUF2=1/4:50:45:40:35:30:25:20:15/4:0 ohm:90 ohm:160 ohm:230 ohm:390 ohm:600 ohm:830 ohm:1100 ohm +DRIVING_CURRENT_PMIC_CLK_BUF3=1/6:70:60:55:50:45:35:30:25/0:13x driving:8x driving:4x driving:1x driving +DRIVING_CURRENT_PMIC_CLK_BUF4=2/4:50:45:40:35:30:25:20:15/4:0 ohm:90 ohm:160 ohm:230 ohm:390 ohm:600 ohm:830 ohm:1100 ohm +DRIVING_CURRENT_PMIC_CLK_BUF7=1/6:70:60:55:50:45:35:30:25/-1 + +[CLK_BUF_EX_PIN] +0 = 1 +1 = 2 +2 = 3 +3 = 4 +4 = 7 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 10 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[SRC_PIN] +GPIO2::EINT2=1 +GPIO3::EINT3=2 +GPIO9::EINT9=0 +GPIO14::EINT14=0 +GPIO15::EINT15=1 +GPIO16::EINT16=2 +GPIO124::CAM_RST2=0 +GPIO140::INT_SIM1_MODE1=1 +GPIO140::INT_SIM1_MODE2=2 +GPIO141::INT_SIM2_MODE1=2 +GPIO141::INT_SIM2_MODE2=1 +GPIO155::ANT_SEL8=0 + +[POWER] +POWER_COUNT=0 diff --git a/tools/dct/config/PMIC_MT6335PMUMP.cmp b/tools/dct/config/PMIC_MT6335PMUMP.cmp new file mode 100644 index 000000000000..1acb3a47ee17 --- /dev/null +++ b/tools/dct/config/PMIC_MT6335PMUMP.cmp @@ -0,0 +1,50 @@ +[PMIC_TABLE] +CHIP = MT6335 +NUM_LDO = 11 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = VCAMA1 +PARAMETER_NAME = MT6335_PMIC_RG_VCAMA1_SW_EN + +[LDO_NAME2] +LDO_NAME = VCAMA2 +PARAMETER_NAME = MT6335_PMIC_RG_VCAMA2_SW_EN + +[LDO_NAME3] +LDO_NAME = VSIM1 +PARAMETER_NAME = MT6335_PMIC_RG_VSIM1_SW_EN + +[LDO_NAME4] +LDO_NAME = VSIM2 +PARAMETER_NAME = MT6335_PMIC_RG_VSIM2_SW_EN + +[LDO_NAME5] +LDO_NAME = VCAMAF +PARAMETER_NAME = MT6335_PMIC_RG_VCAMAF_SW_EN + +[LDO_NAME6] +LDO_NAME = VTOUCH +PARAMETER_NAME = MT6335_PMIC_RG_VTOUCH_SW_EN + +[LDO_NAME7] +LDO_NAME = VGP3 +PARAMETER_NAME = MT6335_PMIC_RG_VGP3_SW_EN + +[LDO_NAME8] +LDO_NAME = VIBR +PARAMETER_NAME = MT6335_PMIC_RG_VIBR_SW_EN + +[LDO_NAME9] +LDO_NAME = VCAMD1 +PARAMETER_NAME = MT6335_PMIC_RG_VCAMD1_SW_EN + +[LDO_NAME10] +LDO_NAME = VCAMD2 +PARAMETER_NAME = MT6335_PMIC_RG_VCAMD2_SW_EN + +[LDO_NAME11] +LDO_NAME = VCAMIO +PARAMETER_NAME = MT6335_PMIC_RG_VCAMIO_SW_EN diff --git a/tools/dct/config/PMIC_MT6350PMUMP.cmp b/tools/dct/config/PMIC_MT6350PMUMP.cmp new file mode 100644 index 000000000000..006921590511 --- /dev/null +++ b/tools/dct/config/PMIC_MT6350PMUMP.cmp @@ -0,0 +1,79 @@ +[PMIC_TABLE] +CHIP = MT6350 +NUM_LDO = 18 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + + +[LDO_NAME1] +LDO_NAME=VMC +PARAMETER_NAME = PMIC_RG_VMC_EN + +[LDO_NAME2] +LDO_NAME=VMCH +PARAMETER_NAME = PMIC_RG_VMCH_EN + +[LDO_NAME3] +LDO_NAME=VEMC_3V3 +PARAMETER_NAME = PMIC_RG_VEMC_3V3_EN + +[LDO_NAME4] +LDO_NAME=VGP1 +PARAMETER_NAME = PMIC_RG_VGP1_EN + +[LDO_NAME5] +LDO_NAME=VGP2 +PARAMETER_NAME = PMIC_RG_VGP2_EN + +[LDO_NAME6] +LDO_NAME=VGP3 +PARAMETER_NAME = PMIC_RG_VGP3_EN + +[LDO_NAME7] +LDO_NAME=VCN_1V8 +PARAMETER_NAME = PMIC_RG_VCN_1V8_EN + +[LDO_NAME8] +LDO_NAME=VSIM1 +PARAMETER_NAME = PMIC_RG_VSIM1_EN + +[LDO_NAME9] +LDO_NAME=VSIM2 +PARAMETER_NAME = PMIC_RG_VSIM2_EN + +[LDO_NAME10] +LDO_NAME=VCAMAF +PARAMETER_NAME = PMIC_RG_VCAM_AF_EN + +[LDO_NAME11] +LDO_NAME=VIBR +PARAMETER_NAME = PMIC_RG_VIBR_EN + +[LDO_NAME12] +LDO_NAME=VM +PARAMETER_NAME = PMIC_RG_VM_EN + +[LDO_NAME13] +LDO_NAME=VRF18 +PARAMETER_NAME = PMIC_RG_VRF18_EN + +[LDO_NAME14] +LDO_NAME=VCAMD +PARAMETER_NAME = PMIC_RG_VCAMD_EN + +[LDO_NAME15] +LDO_NAME=VCAMIO +PARAMETER_NAME = PMIC_RG_VCAM_IO_EN + +[LDO_NAME16] +LDO_NAME=VCAMA +PARAMETER_NAME = PMIC_RG_VCAMA_EN + +[LDO_NAME17] +LDO_NAME=VCN33_WIFI +PARAMETER_NAME = PMIC_RG_VCN33_EN_WIFI + +[LDO_NAME18] +LDO_NAME=VCN28 +PARAMETER_NAME = PMIC_RG_VCN28_EN diff --git a/tools/dct/config/PMIC_MT6351PMUMP.cmp b/tools/dct/config/PMIC_MT6351PMUMP.cmp new file mode 100644 index 000000000000..5177a0be9836 --- /dev/null +++ b/tools/dct/config/PMIC_MT6351PMUMP.cmp @@ -0,0 +1,38 @@ +[PMIC_TABLE] +CHIP = MT6351 +NUM_LDO = 8 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = VCAMA +PARAMETER_NAME = MT6351_PMIC_RG_VCAMA_EN + +[LDO_NAME2] +LDO_NAME = VSIM1 +PARAMETER_NAME = MT6351_PMIC_RG_VSIM1_EN + +[LDO_NAME3] +LDO_NAME = VSIM2 +PARAMETER_NAME = MT6351_PMIC_RG_VSIM2_EN + +[LDO_NAME4] +LDO_NAME = VLDO28 +PARAMETER_NAME = MT6351_PMIC_RG_VLDO28_EN_0 + +[LDO_NAME5] +LDO_NAME = VGP3 +PARAMETER_NAME = MT6351_PMIC_RG_VGP3_EN + +[LDO_NAME6] +LDO_NAME = VIBR +PARAMETER_NAME = MT6351_PMIC_RG_VIBR_EN + +[LDO_NAME7] +LDO_NAME = VCAMD +PARAMETER_NAME = MT6351_PMIC_RG_VCAMD_EN + +[LDO_NAME8] +LDO_NAME = VCAMIO +PARAMETER_NAME = MT6351_PMIC_RG_VCAMIO_EN diff --git a/tools/dct/config/PMIC_MT6353PMUMP.cmp b/tools/dct/config/PMIC_MT6353PMUMP.cmp new file mode 100644 index 000000000000..4b721ecbe2f6 --- /dev/null +++ b/tools/dct/config/PMIC_MT6353PMUMP.cmp @@ -0,0 +1,35 @@ +[PMIC_TABLE] +CHIP = MT6353 +NUM_LDO = 7 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + + +[LDO_NAME1] +LDO_NAME = VCAMA +PARAMETER_NAME = PMIC_LDO_VCAMA + +[LDO_NAME2] +LDO_NAME = VSIM1 +PARAMETER_NAME = PMIC_LDO_VSIM1 + +[LDO_NAME3] +LDO_NAME=VSIM2 +PARAMETER_NAME = PMIC_LDO_VSIM2 + +[LDO_NAME4] +LDO_NAME=VLDO28 +PARAMETER_NAME = PMIC_LDO_VLDO28 + +[LDO_NAME5] +LDO_NAME=VIBR +PARAMETER_NAME = PMIC_LDO_VIBR + +[LDO_NAME6] +LDO_NAME=VCAMD +PARAMETER_NAME = PMIC_LDO_VCAMD + +[LDO_NAME7] +LDO_NAME=VCAMIO +PARAMETER_NAME = PMIC_LDO_VCAMIO diff --git a/tools/dct/config/PMIC_MT6355PMUMP.cmp b/tools/dct/config/PMIC_MT6355PMUMP.cmp new file mode 100644 index 000000000000..847578400fc1 --- /dev/null +++ b/tools/dct/config/PMIC_MT6355PMUMP.cmp @@ -0,0 +1,38 @@ +[PMIC_TABLE] +CHIP = MT6355 +NUM_LDO = 8 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = VCAMA1 +PARAMETER_NAME = PMIC_RG_LDO_VCAMA1_EN + +[LDO_NAME2] +LDO_NAME = VCAMA2 +PARAMETER_NAME = PMIC_RG_LDO_VCAMA2_EN + +[LDO_NAME3] +LDO_NAME = VSIM1 +PARAMETER_NAME = PMIC_RG_LDO_VSIM1_EN + +[LDO_NAME4] +LDO_NAME = VSIM2 +PARAMETER_NAME = PMIC_RG_LDO_VSIM2_EN + +[LDO_NAME5] +LDO_NAME = VCAMD1 +PARAMETER_NAME = PMIC_RG_LDO_VCAMD1_EN + +[LDO_NAME6] +LDO_NAME = VCAMD2 +PARAMETER_NAME = PMIC_RG_LDO_VCAMD2_EN + +[LDO_NAME7] +LDO_NAME = VCAMIO +PARAMETER_NAME = PMIC_RG_LDO_VCAMIO_EN + +[LDO_NAME8] +LDO_NAME = VLDO28 +PARAMETER_NAME = PMIC_RG_LDO_VLDO28_EN_AF diff --git a/tools/dct/config/PMIC_MT6356PMUMP.cmp b/tools/dct/config/PMIC_MT6356PMUMP.cmp new file mode 100644 index 000000000000..42130b9ed519 --- /dev/null +++ b/tools/dct/config/PMIC_MT6356PMUMP.cmp @@ -0,0 +1,30 @@ +[PMIC_TABLE] +CHIP = MT6356 +NUM_LDO = 6 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = VCAMA +PARAMETER_NAME = PMIC_RG_LDO_VCAMA_EN + +[LDO_NAME2] +LDO_NAME = VSIM1 +PARAMETER_NAME = PMIC_RG_LDO_VSIM1_EN + +[LDO_NAME3] +LDO_NAME = VSIM2 +PARAMETER_NAME = PMIC_RG_LDO_VSIM2_EN + +[LDO_NAME4] +LDO_NAME = VCAMD +PARAMETER_NAME = PMIC_RG_LDO_VCAMD_EN + +[LDO_NAME5] +LDO_NAME = VCAMIO +PARAMETER_NAME = PMIC_RG_LDO_VCAMIO_EN + +[LDO_NAME6] +LDO_NAME = VLDO28 +PARAMETER_NAME = PMIC_RG_LDO_VLDO28_EN_0 diff --git a/tools/dct/config/PMIC_MT6357PMUMP.cmp b/tools/dct/config/PMIC_MT6357PMUMP.cmp new file mode 100644 index 000000000000..494af0320cf1 --- /dev/null +++ b/tools/dct/config/PMIC_MT6357PMUMP.cmp @@ -0,0 +1,30 @@ +[PMIC_TABLE] +CHIP = MT6357 +NUM_LDO = 6 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = VCAMA +PARAMETER_NAME = PMIC_RG_LDO_VCAMA_EN + +[LDO_NAME2] +LDO_NAME = VSIM1 +PARAMETER_NAME = PMIC_RG_LDO_VSIM1_EN + +[LDO_NAME3] +LDO_NAME = VSIM2 +PARAMETER_NAME = PMIC_RG_LDO_VSIM2_EN + +[LDO_NAME4] +LDO_NAME = VCAMD +PARAMETER_NAME = PMIC_RG_LDO_VCAMD_EN + +[LDO_NAME5] +LDO_NAME = VCAMIO +PARAMETER_NAME = PMIC_RG_LDO_VCAMIO_EN + +[LDO_NAME6] +LDO_NAME = VLDO28 +PARAMETER_NAME = PMIC_RG_LDO_VLDO28_EN_0 diff --git a/tools/dct/config/PMIC_MT6358PMUMP.cmp b/tools/dct/config/PMIC_MT6358PMUMP.cmp new file mode 100644 index 000000000000..972550b49fb3 --- /dev/null +++ b/tools/dct/config/PMIC_MT6358PMUMP.cmp @@ -0,0 +1,34 @@ +[PMIC_TABLE] +CHIP = MT6358 +NUM_LDO = 7 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = VCAMA1 +PARAMETER_NAME = PMIC_RG_LDO_VCAMA1_EN + +[LDO_NAME2] +LDO_NAME = VCAMA2 +PARAMETER_NAME = PMIC_RG_LDO_VCAMA2_EN + +[LDO_NAME3] +LDO_NAME = VSIM1 +PARAMETER_NAME = PMIC_RG_LDO_VSIM1_EN + +[LDO_NAME4] +LDO_NAME = VSIM2 +PARAMETER_NAME = PMIC_RG_LDO_VSIM2_EN + +[LDO_NAME5] +LDO_NAME = VCAMD +PARAMETER_NAME = PMIC_RG_LDO_VCAMD_EN + +[LDO_NAME6] +LDO_NAME = VCAMIO +PARAMETER_NAME = PMIC_RG_LDO_VCAMIO_EN + +[LDO_NAME7] +LDO_NAME = VLDO28 +PARAMETER_NAME = PMIC_RG_LDO_VLDO28_EN_0 diff --git a/tools/dct/config/PMIC_MT6359PMUMP.cmp b/tools/dct/config/PMIC_MT6359PMUMP.cmp new file mode 100644 index 000000000000..63feba8a91f2 --- /dev/null +++ b/tools/dct/config/PMIC_MT6359PMUMP.cmp @@ -0,0 +1,14 @@ +[PMIC_TABLE] +CHIP = MT6359 +NUM_LDO = 2 +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = VCAMIO +PARAMETER_NAME = PMIC_RG_LDO_VCAMIO_EN + +[LDO_NAME2] +LDO_NAME = VTP +PARAMETER_NAME = diff --git a/tools/dct/config/PMIC_NCPMUMP.cmp b/tools/dct/config/PMIC_NCPMUMP.cmp new file mode 100644 index 000000000000..4e48b25cfab1 --- /dev/null +++ b/tools/dct/config/PMIC_NCPMUMP.cmp @@ -0,0 +1,10 @@ +[PMIC_TABLE] +CHIP = +NUM_LDO = +FUNCTION = pmic_set_register_value +LDO_APPNAME_DEFAULT = MT65XX_POWER_NONE +INCLUDE_HEADER = linux/types.h:mach/mt_typedefs.h:mach/upmu_common.h:mach/upmu_hw.h:mach/mt_pm_ldo.h + +[LDO_NAME1] +LDO_NAME = +PARAMETER_NAME = diff --git a/tools/dct/config/YuSu.cmp b/tools/dct/config/YuSu.cmp new file mode 100644 index 000000000000..8f1cbe2ef4a4 --- /dev/null +++ b/tools/dct/config/YuSu.cmp @@ -0,0 +1,1094 @@ +[ADC_variables] +TEMPERATURE +TEMPERATURE1 +REF_CURRENT +BATTERY_VOLTAGE +CHARGER_VOLTAGE +LCM_VOLTAGE +HF_MIC +UTMS +BOARD_ID +BOARD_ID_2 +BOARD_ID_3 +ADC_FDD_RF_PARAMS_DYNAMIC_CUSTOM_CH + +[EINT_variables] +MT7118_WIMAX +MT5921_WIFI +BT +KPD_PWRKEY +KPD_SLIDE +TOUCH +TOUCH_PANEL +MT6326_PMIC +HEADSET +MHALL +HALL_1 +HALL_2 +HALL_3 +FM_RDS +HALL_4 +ALS +OFN +WIFI +COMBO_BGF +COMBO_ALL +GSE_1 +GSE_2 +MSE +MHL +GYRO +ACCDET +SWTP +SWTP1 +OTG_IDDIG +CMMB +NFC +IRQ_NFC +HEADSET_HOOK +MT6329_PMIC +EINT_HDMI_HPD +DT_EXT_MD_EXP +DT_EXT_MD_WDT +DT_EXT_MD_WK_UP +DT_EXT_MD_WK_UP_USB +DT_EXT_MD_EXP +EVDO_DT_EXT_MDM_RDY +EVDO_DT_EXT_MDM_WAKE_AP +EVDO_DT_EXT_MDM_RST_IND +EVDO_DT_EXT_MDM_PWR_ON +EVDO_DT_EXT_UART_MDM_WAKE_AP +EVDO_DT_EXT_MDM_ACK +EVDO_DT_EXT_MDM_FLOW_CTRL +MT6280_USB_WAKEUP +MT6280_WD +SIM1_HOT_PLUG +SIM2_HOT_PLUG +SIM3_HOT_PLUG +MSDC1_INS +MSDC2_INS +MT6322_PMIC +MT6323_PMIC +MT6333_PMIC +MT6397_PMIC +CHR_STAT +LTE_SDIO +LTE_WDT +EXT_BUCK_OC +EDP_INTN +DSI_TE +DSI_TE_1 +VBUS_DETECT_PIN_EINT +FPC1145 +GOODIX_FP +SENSORHUB +MRDUMP_EXT_RST +EXT_DBG_KEY +EINT_SIL7033_INT +EINT_FUSB300_DET_IN +SMART_PA +RT9465_SLAVE_CHR +MT6336_CHR +MT6311_PMIC +MT6313_PMIC +MT6351_PMIC +MT6353_PMIC +MT6335_PMIC +MT6337_PMIC +MT6350_PMIC +RT1711H_PD +VPROC_BUCK +RT1711_PD_CTRL +RT9750_CHR_1 +RT9750_CHR_2 +MT6355_PMIC +RT5081_PMU_EINT +RT5081_PD +ALSPS_MTK +MT6370_PMU_EINT +MT6370_PD +MAIN_PMIC +SUBPMIC_PMU_EINT +TCPC_PD +EINT_WPC + +[GPIO_variables] +GPIO_AST_RST_PIN +GPIO_AST_CS_PIN +GPIO_AST_CLK32K_PIN +GPIO_AST_WAKEUP_PIN +GPIO_AST_INTR_PIN +GPIO_AST_WAKEUP_INTR_PIN +GPIO_AST_AFC_SWITCH_PIN +GPIO_HEADSET_INSERT_PIN +GPIO_HEADSET_REMOTE_BUTTON_PIN +GPIO_EXTERNAL_AMPLIFIER_PIN +GPIO_BT_POWREN_PIN +GPIO_BT_RESET_PIN +GPIO_BT_EINT_PIN +GPIO_BT_CLK_PIN +GPIO_BYPASS_BOOST_PIN +GPIO_CMMB_EINT_PIN +GPIO_CMMB_LDO_EN_PIN +GPIO_CMMB_RST_PIN +GPIO_I2C_APPM_SCA_PIN +GPIO_I2C_APPM_SDA_PIN +GPIO_I2C0_SCA_PIN +GPIO_I2C0_SDA_PIN +GPIO_I2C1_SCA_PIN +GPIO_I2C1_SDA_PIN +GPIO_I2C2_SCA_PIN +GPIO_I2C2_SDA_PIN +GPIO_I2C3_SCA_PIN +GPIO_I2C3_SDA_PIN +GPIO_I2C4_SCA_PIN +GPIO_I2C4_SDA_PIN +GPIO_I2C5_SDA_PIN +GPIO_I2C5_SCA_PIN +GPIO_I2C6_SDA_PIN +GPIO_I2C6_SCA_PIN +GPIO_I2C7_SDA_PIN +GPIO_I2C7_SCA_PIN +GPIO_NFC_FIRM_PIN +GPIO_NFC_EINT_PIN +GPIO_NFC_VENB_PIN +GPIO_NFC_OSC_EN_PIN +GPIO_IRQ_NFC_PIN +GPIO_NFC_RST_PIN +GPIO_SPI_CS_PIN +GPIO_SPI_SCK_PIN +GPIO_SPI_MISO_PIN +GPIO_SPI_MOSI_PIN +GPIO_SPI2_CS_PIN +GPIO_SPI2_SCK_PIN +GPIO_SPI2_MISO_PIN +GPIO_SPI2_MOSI_PIN +GPIO_PWM_1_PIN +GPIO_PWM_2_PIN +GPIO_PWM_3_PIN +GPIO_PWM_4_PIN +GPIO_PWM_5_PIN +GPIO_PWM_6_PIN +GPIO_PWM_7_PIN +GPIO_PWR_AVAIL_WLC +GPIO_PWR_BUTTON_PIN +GPIO_PMIC_EINT_PIN +GPIO_RFIC0_BSI_CK +GPIO_RFIC0_BSI_CS +GPIO_RFIC0_BSI_D0 +GPIO_RFIC0_BSI_D1 +GPIO_RFIC0_BSI_D2 +GPIO_SDHC_EINT_PIN +GPIO_SDHC_MC2CM_PIN +GPIO_SDHC_MC2DA2_PIN +GPIO_SDHC_MC2DA3_PIN +GPIO_SDHC_MC2WP_PIN +GPIO_SDHC_MC2PWRON_PIN +GPIO_SDHC_MC2INS_PIN +GPIO_TDM_REQ +GPIO_DISP_LSCK_PIN +GPIO_DISP_LSA0_PIN +GPIO_DISP_LSDA_PIN +GPIO_DISP_LSCE_PIN +GPIO_DISP_ID0_PIN +GPIO_DISP_ID1_PIN +GPIO_GPS_PWREN_PIN +GPIO_GPS_SYNC_PIN +GPIO_GPS_EINT_PIN +GPIO_GPS_CLK_PIN +GPIO_GPS_RST_PIN +GPIO_GPS_LNA_PIN +GPIO_UART_URXD0_PIN +GPIO_UART_UTXD0_PIN +GPIO_UART_UCTS0_PIN +GPIO_UART_URTS0_PIN +GPIO_UART_URXD1_PIN +GPIO_UART_UTXD1_PIN +GPIO_UART_UCTS1_PIN +GPIO_UART_URTS1_PIN +GPIO_UART_URXD2_PIN +GPIO_UART_UTXD2_PIN +GPIO_UART_UCTS2_PIN +GPIO_UART_URTS2_PIN +GPIO_UART_URXD3_PIN +GPIO_UART_UTXD3_PIN +GPIO_UART_UCTS3_PIN +GPIO_UART_URTS3_PIN +GPIO_UART_URXD4_PIN +GPIO_UART_UTXD4_PIN +GPIO_UART_UCTS4_PIN +GPIO_UART_URTS4_PIN +GPIO_KPD_KCOL0_PIN +GPIO_KPD_KCOL1_PIN +GPIO_KPD_KCOL2_PIN +GPIO_KPD_KCOL3_PIN +GPIO_KPD_KCOL4_PIN +GPIO_KPD_KCOL5_PIN +GPIO_KPD_KCOL6_PIN +GPIO_KPD_KCOL7_PIN +GPIO_KPD_KROW0_PIN +GPIO_KPD_KROW1_PIN +GPIO_KPD_KROW2_PIN +GPIO_KPD_KROW3_PIN +GPIO_KPD_KROW4_PIN +GPIO_KPD_KROW5_PIN +GPIO_KPD_KROW6_PIN +GPIO_KPD_KROW7_PIN +GPIO_CTP_EINT_PIN +GPIO_CTP_EN_PIN +GPIO_CTP_RST_PIN +GPIO_WIFI_RST_PIN +GPIO_WIFI_CLK_PIN +GPIO_WIFI_EINT_PIN +GPIO_WIFI_PMU_EN_PIN +GPIO_WIFI_LDO_EN_PIN +GPIO_BQ_INT_PIN +GPIO_WIMAX_INT_PIN +GPIO_WIMAX_RST_PIN +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_FLASH_EN_PIN +GPIO_CAMERA_FLASH_MODE_PIN +GPIO_CAMERA_LDO_EN_PIN +GPIO_CAMERA_AF_EN_PIN +GPIO_CAMERA_RCN_PIN +GPIO_CAMERA_RCP_PIN +GPIO_CAMERA_RDN0_PIN +GPIO_CAMERA_RDP0_PIN +GPIO_CAMERA_RDN1_PIN +GPIO_CAMERA_RDP1_PIN +GPIO_CAMERA_RDN2_PIN +GPIO_CAMERA_RDP2_PIN +GPIO_CAMERA_RDN3_PIN +GPIO_CAMERA_RDP3_PIN +GPIO_CAMERA_RCN_A_PIN +GPIO_CAMERA_RCP_A_PIN +GPIO_CAMERA_RDN0_A_PIN +GPIO_CAMERA_RDP0_A_PIN +GPIO_CAMERA_RDN1_A_PIN +GPIO_CAMERA_RDP1_A_PIN +GPIO_CAMERA_RDN2_A_PIN +GPIO_CAMERA_RDP2_A_PIN +GPIO_CAMERA_RDN3_A_PIN +GPIO_CAMERA_RDP3_A_PIN +GPIO_CAMERA_RCN_B_PIN +GPIO_CAMERA_RCP_B_PIN +GPIO_CAMERA_RDN0_B_PIN +GPIO_CAMERA_RDP0_B_PIN +GPIO_CAMERA_RDN1_B_PIN +GPIO_CAMERA_RDP1_B_PIN +GPIO_PMIC_EINT_PIN +GPIO_PCM_DAICLK_PIN +GPIO_PCM_DAIPCMOUT_PIN +GPIO_PCM_DAIPCMIN_PIN +GPIO_PCM_DAISYNC_PIN +GPIO_JBD_INPUT_UP_PIN +GPIO_JBD_INPUT_LEFT_PIN +GPIO_JBD_INPUT_RIGHT_PIN +GPIO_JBD_INPUT_DOWN_PIN +GPIO_JTAG_TMS_PIN +GPIO_JTAG_TCK_PIN +GPIO_JTAG_TDI_PIN +GPIO_JTAG_TDO_PIN +GPIO_JTAG_TRSTN_PIN +GPIO_QWERTYSLIDE_EINT_PIN +GPIO_CAPTOUCH_EINT_PIN +GPIO_HALL_1_PIN +GPIO_HALL_2_PIN +GPIO_HALL_3_PIN +GPIO_HALL_4_PIN +GPIO_OFN_EINT_PIN +GPIO_OFN_DWN_PIN +GPIO_OFN_RST_PIN +GPIO_MHALL_EINT_PIN +GPIO_FM_RDS_PIN +GPIO_FM_CLK_PIN +GPIO_ALS_EINT_PIN +GPIO_MATV_PWR_ENABLE +GPIO_MATV_N_RST +GPIO_I2S_DATA +GPIO_SPEAKER_EN_PIN +GPIO_RECEIVER_EN_PIN +GPIO_SPEAKER_EARPIECE_SWITCH_PIN +GPIO_SWCHARGER_EN_PIN +GPIO_COMBO_PMU_EN_PIN +GPIO_COMBO_PMUV28_EN_PIN +GPIO_COMBO_RST_PIN +GPIO_COMBO_RTCCLK_PIN +GPIO_COMBO_BGF_EINT_PIN +GPIO_COMBO_ALL_EINT_PIN +GPIO_COMBO_6620_LDO_EN_PIN +GPIO_COMBO_I2S_CK_PIN +GPIO_COMBO_I2S_DAT_PIN +GPIO_COMBO_I2S_WS_PIN +GPIO_COMBO_UTXD_PIN +GPIO_COMBO_URXD_PIN +GPIO_I2S0_CK_PIN +GPIO_I2S0_DAT_PIN +GPIO_I2S0_MCLK_PIN +GPIO_I2S0_WS_PIN +GPIO_I2S1_CK_PIN +GPIO_I2S1_DAT_PIN +GPIO_I2S1_MCLK_PIN +GPIO_I2S1_WS_PIN +GPIO_GSE_1_EINT_PIN +GPIO_GSE_2_EINT_PIN +GPIO_MSE_EINT_PIN +GPIO_GYRO_EINT_PIN +GPIO_ACCDET_EINT_PIN +GPIO_OTG_IDDIG_EINT_PIN +GPIO_OTG_DRVVBUS_PIN +GPIO_VBUS_DETECT_PIN +GPIO_USB_DEFAULT_DEVICE_MODE +GPIO_HEADSET_SW_EN_PIN +GPIO_HEADSET_JPOLE_PIN +GPIO_HEADSET_REMOTE_BUTTON_PIN +GPIO_DISP_LRSTB_PIN +GPIO_HDMI_I2S_OUT_CK_PIN +GPIO_HDMI_I2S_OUT_WS_PIN +GPIO_HDMI_I2S_OUT_DAT_PIN +GPIO_HDMI_I2C_SCL +GPIO_HDMI_I2C_SDA +GPIO_HDMI_POWER_CONTROL +GPIO_HDMI_9024_RESET +GPIO_HDMI_EINT_PIN +GPIO_HDMI_LCD_SW_EN +GPIO_HDMI_PWR_1_2V_EN +GPIO_HIFI_VCCA_EN_PIN +GPIO_HIFI_AVCC_EN_PIN +GPIO_HIFI_DVCC_EN_PIN +GPIO_HW_VER_CHECK_PIN +GPIO_MATV_I2S_CK_PIN +GPIO_MATV_I2S_WS_PIN +GPIO_MATV_I2S_DAT_PIN +GPIO_2G_TX_FILTER_MODE_PIN +GPIO_2G_RX_ACTIVE_PIN +GPIO_4G_RX_ACTIVE_PIN +GPIO_4G_TX_FILTER_MODE_PIN +GPIO_52_RST +GPIO_52_TO_2G +GPIO_52_3G_USB_RESUME +GPIO_52_KCOL0 +GPIO_52_REC_SW +GPIO_52_WD +GPIO_52_USB_SW2 +GPIO_52_TO_3G +GPIO_52_PWR_KEY +GPIO_52_USB_SW1 +GPIO_EXT_BUCK_EN_A_PIN +GPIO_EXT_BUCK_EN_B_PIN +GPIO_EXT_BUCK_IC_EN_PIN +GPIO_EXT_BUCK_OC_EINT_PIN +GPIO_EXT_MD_RST +GPIO_EXT_MD_PWR_KEY +GPIO_EXT_MD_DL_KEY +GPIO_EXT_MD_WD +GPIO_EXT_MD_EXP +GPIO_EXT_MD_WK_AP +GPIO_EXT_MD_META +GPIO_EXT_AP_WK_MD +GPIO_EXT_USB_SW1 +GPIO_EXT_USB_SW2 +GPIO_EXT_USB_RESUME +GPIO_EXT_SSW_S1 +GPIO_EXT_SSW_S2 +GPIO_EXT_SSW_EN +GPIO_EXT_MD_DUMP +GPIO_EXT_SPKAMP_EN_PIN +GPIO_6280_USB_SW1 +GPIO_6280_USB_SW2 +GPIO_6280_KCOL0 +GPIO_6280_USB_WAKEUP_EINT +GPIO_6280_WD +GPIO_6280_RST +GPIO_VIA_MDM_RST +GPIO_VIA_MDM_RST_IND +GPIO_VIA_MDM_PWR_EN +GPIO_VIA_MDM_PWR_ON +GPIO_VIA_CP_BOOT_SEL +GPIO_VIA_AP_WAKE_MDM +GPIO_VIA_MDM_RDY +GPIO_VIA_MDM_WAKE_AP +GPIO_VIA_AP_RDY +GPIO_VIA_SDIO_ACK +GPIO_VIA_FLOW_CTRL +GPIO_VIA_ETS_SEL +GPIO_MSDC0_DAT0 +GPIO_MSDC0_DAT1 +GPIO_MSDC0_DAT2 +GPIO_MSDC0_DAT3 +GPIO_MSDC0_DAT4 +GPIO_MSDC0_DAT5 +GPIO_MSDC0_DAT6 +GPIO_MSDC0_DAT7 +GPIO_MSDC0_CMD +GPIO_MSDC0_CLK +GPIO_MSDC0_RSTB +GPIO_MSDC0_DSL +GPIO_MSDC1_DAT0 +GPIO_MSDC1_DAT1 +GPIO_MSDC1_DAT2 +GPIO_MSDC1_DAT3 +GPIO_MSDC1_CMD +GPIO_MSDC1_CLK +GPIO_MSDC1_INSI +GPIO_MSDC1_SDWPI +GPIO_MSDC2_DAT0 +GPIO_MSDC2_DAT1 +GPIO_MSDC2_DAT2 +GPIO_MSDC2_DAT3 +GPIO_MSDC2_CMD +GPIO_MSDC2_CLK +GPIO_MSDC2_INSI +GPIO_MSDC2_SDWPI +GPIO_MSDC3_DAT0 +GPIO_MSDC3_DAT1 +GPIO_MSDC3_DAT2 +GPIO_MSDC3_DAT3 +GPIO_MSDC3_CMD +GPIO_MSDC3_CLK +GPIO_MSDC4_DAT0 +GPIO_MSDC4_DAT1 +GPIO_MSDC4_DAT2 +GPIO_MSDC4_DAT3 +GPIO_MSDC4_DAT4 +GPIO_MSDC4_DAT5 +GPIO_MSDC4_DAT6 +GPIO_MSDC4_DAT7 +GPIO_MSDC4_CMD +GPIO_MSDC4_CLK +GPIO_MSDC4_RSTB +GPIO_SIM1_HOT_PLUG +GPIO_SIM2_HOT_PLUG +GPIO_FSA8049_PIN +GPIO_ANT_SW_PIN +GPIO_EINT_CHG_STAT_PIN +GPIO_MHL_EINT_PIN +GPIO_MHL_I2S_OUT_CK_PIN +GPIO_MHL_I2S_OUT_WS_PIN +GPIO_MHL_I2S_OUT_DAT_PIN +GPIO_MHL_I2C_SCL +GPIO_MHL_I2C_SDA +GPIO_MHL_RST_B_PIN +GPIO_MHL_POWER_CTRL_PIN +GPIO_EXT_DISP_DPI0_PIN +GPIO_TD_HIF_DCX_PIN +GPIO_TD_HIF_WR_PIN +GPIO_TD_HIF_RD_PIN +GPIO_CAMERA_2_CMPDN_PIN +GPIO_CAMERA_2_CMRST_PIN +GPIO_CAMERA_2_CMMCLK_PIN +GPIO_CAMERA_2_CMRST_PIN +GPIO_CAMERA_2_CMPDN_PIN +GPIO_CHR_PSEL_PIN +GPIO_CHR_CE_PIN +GPIO_CHR_SPM_PIN +GPIO_CAMERA_FLASH_EXT1_PIN +GPIO_CAMERA_FLASH_EXT2_PIN +GPIO_GPS_EN_MT3332 +GPIO_GPS_FRAM_SYNC_MT3332 +GPIO_GPS_TXIND_MT3332 +GPIO_GPS_LNA_MT3332 +GPIO_EXTMD_PCM_CLK_PIN +GPIO_EXTMD_PCM_PCMOUT_PIN +GPIO_EXTMD_PCM_PCMIN_PIN +GPIO_EXTMD_PCM_SYNC_PIN +GPIO_MRG_I2S_PCM_CLK_PIN +GPIO_MRG_I2S_PCM_SYNC_PIN +GPIO_MRG_I2S_PCM_RX_PIN +GPIO_MRG_I2S_PCM_TX_PIN +GPIO_DAIBT_PCM_CLK_PIN +GPIO_DAIBT_PCM_WS_PIN +GPIO_DAIBT_PCM_DI_PIN +GPIO_DAIBT_PCM_DO_PIN +GPIO_DAC_I2S_CLK_PIN +GPIO_DAC_I2S_WS_PIN +GPIO_DAC_I2S_DAT_OUT_PIN +GPIO_DAC_I2S_MCLK_PIN +GPIO_ADC_I2S_CLK_PIN +GPIO_ADC_I2S_WS_PIN +GPIO_ADC_I2S_DAT_IN_PIN +GPIO_ADC_I2S_MCLK_PIN +GPIO_I2S_CLK_PIN +GPIO_I2S_WS_PIN +GPIO_I2S_DAT_OUT_PIN +GPIO_I2S_DAT_IN_PIN +GPIO_AUD_CLK_MOSI_PIN +GPIO_AUD_DAT_MOSI_PIN +GPIO_AUD_DAT_MISO_PIN +GPIO_AUD_EXTHP_EN_PIN +GPIO_AUD_EXTHP_GAIN_PIN +GPIO_AUD_EXTDAC_PWREN_PIN +GPIO_AUD_EXTDAC_RST_PIN +GPIO_AUD_EXTPLL_S0_PIN +GPIO_AUD_EXTPLL_S1_PIN +GPIO_AUD_EXTHPBUF_SDB_PIN +GPIO_AUD_EXTHPBUF_HI_Z_PIN +GPIO_AUD_EXTHPBUF_GAIN_PIN +GPIO_SIM_SWITCH_CLK_PIN +GPIO_SIM_SWITCH_DAT_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_2ND_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_3RD_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_4TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_5TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_6TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_7TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_8TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_9TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_ATH_PIN +GPIO_SIM1_SCLK +GPIO_SIM1_SRST +GPIO_SIM1_SIO +GPIO_SIM2_SCLK +GPIO_SIM2_SRST +GPIO_SIM2_SIO +GPIO_SWITCH1_1V8_PIN +GPIO_USB_MHL_SW_SEL1 +GPIO_USB_MHL_SW_SEL2 +GPIO_LCM_LED_EN +GPIO_LCM_MIPI2LVDS_EN +GPIO_LCM_MIPI2LVDS_PWR_EN +GPIO_LCM_LVDS_PWR_EN +GPIO_LCM_LVDS_EN +GPIO_LCM_PWR +GPIO_LCM_PWR_EN +GPIO_LCM_PWR2_EN +GPIO_LCM_RST +GPIO_LCM_STB +GPIO_LCM_BL_EN +GPIO_LCM_LVL_SHIFT_EN +GPIO_LCM_BRIDGE_EN +GPIO_SSW_EN_PIN +GPIO_SSW_CH_SWAP_PIN +GPIO_LCD_BIAS_ENP_PIN +GPIO_LCD_BIAS_ENN_PIN +GPIO_LCD_DRV_EN_PIN +GPIO_LCDBL_EN_PIN +GPIO_LCD_ENN +GPIO_LCD_ENP +GPIO_CMCSK +GPIO_CMDAT0 +GPIO_CMDAT1 +GPIO_CMDAT2 +GPIO_CMDAT3 +GPIO_CMDAT4 +GPIO_CMDAT5 +GPIO_CMDAT6 +GPIO_CMDAT7 +GPIO_CMDAT8 +GPIO_CMDAT9 +GPIO_CMHSYNC +GPIO_CMMCLK +GPIO_CMPCLK +GPIO_CMVSYNC +GPIO_COMPASS_RST_PIN +GPIO_EXT_BUCK_EN_PIN +GPIO_EXT_BUCK_VSEL_PIN +GPIO_LTE_SDIO_EINT_PIN +GPIO_LTE_WDT_EINT_PIN +GPIO_LTE_POWER_PIN +GPIO_LTE_RESET_PIN +GPIO_LTE_WK_MD_PIN +GPIO_SWITCH1_1V8_PIN +GPIO_CAMERA_MAIN_DVDD_ENADBLE_PIN +GPIO_HIFI_LDO1V8_EN_PIN +GPIO_SMARTPA_RST_PIN +GPIO_EARPHONE_DETECT_PIN +GPIO_LCD_ENP_PIN +GPIO_HIFI_LDO3V3_EN_PIN +GPIO_CAMERA_MCLK_EN_PIN +GPIO_LCD_ENN_PIN +GPIO_NXPSPA_I2S_DATAOUT_PIN +GPIO_NXPSPA_I2S_DATAIN_PIN +GPIO_NXPSPA_I2S_LRCK_PIN +GPIO_NXPSPA_I2S_BCK_PIN +GPIO_STROBE_LED_TPS61311_STRB0 +GPIO_STROBE_LED_TPS61311_STRB1 +GPIO_STROBE_LED_TPS61311_TXMASK +GPIO_STROBE_LED_TPS61311_NRESET +GPIO_EDP_EINT_PIN +GPIO_EDP_ENPSR_PIN +GPIO_EDP_SYSRSTN_PIN +GPIO_EDP_STANDBY_PIN +GPIO_EXT_BUCK_OC_EINT_PIN +GPIO_VOW_CLK_MISO_PIN +GPIO_G2_TXEN_PIN +GPIO_G2_TXD3_PIN +GPIO_G2_TXD2_PIN +GPIO_G2_TXD1_PIN +GPIO_G2_TXD0_PIN +GPIO_G2_TXC_PIN +GPIO_G2_RXC_PIN +GPIO_G2_RXD0_PIN +GPIO_G2_RXD1_PIN +GPIO_G2_RXD2_PIN +GPIO_G2_RXD3_PIN +GPIO_ESW_INT_PIN +GPIO_G2_RXDV_PIN +GPIO_MDC_PIN +GPIO_MDIO_PIN +GPIO_ESW_RST_PIN +GPIO_IRRX_PIN +GPIO_HDMI_RX_SDA_PIN +GPIO_HDMI_RX_SCL_PIN +GPIO_MAIN_CAM_ID_PIN +GPIO_SUB_CAM_ID_PIN +GPIO_LCD_MAKER_ID +GPIO_AUDIO_SEL +GPIO_DSV_EN +GPIO_TOUCH_MAKER_ID +GPIO_BAT_ID +GPIO_BATT_ID_PULLUP +GPIO_SENSOR0_I2C_SDA +GPIO_SENSOR0_I2C_SCL +GPIO_COMMON_I2C_SCL +GPIO_COMMON_I2C_SDA +GPIO_LCD_BL_EN +GPIO_DSV_AVEE_EN +GPIO_DSV_AVDD_EN +GPIO_NFC_MODE +GPIO_HP_AMP_EN +GPIO_SPK_AMP_EN +GPIO_SMARTPA_I2S_WS_PIN +GPIO_SMARTPA_I2S_DOUT_PIN +GPIO_SMARTPA_I2S_DIN_PIN +GPIO_SMARTPA_I2S_BCK_PIN +GPIO_SMARTPA_RST_PIN +GPIO_SMARTPA_EINT_PIN +GPIO_SMARTPA_LDO_EN_PIN +GPIO_EXT_SPKAMP2_EN_PIN +GPIO_RCV_SPK_SWITCH_PIN +GPIO_FLASH_LED_EN +GPIO_TORCH_EN +GPIO_LTE_VSRAM_EXT_POWER_EN_PIN +GPIO_CAMERA_KEY1_PIN +GPIO_CAMERA_KEY2_PIN +GPIO_CODEC_SPI_CLK_PIN +GPIO_CODEC_SPI_MISO_PIN +GPIO_CODEC_SPI_MOSI_PIN +GPIO_CODEC_SPI_CS_PIN +GPIO_DTV_SPI_SCK_PIN +GPIO_DTV_SPI_MISO_PIN +GPIO_DTV_SPI_MOSI_PIN +GPIO_DTV_SPI_CS_PIN +GPIO_LCM_RST2_PIN +GPIO_IRTX_OUT_PIN +GPIO_PWRAP_SPI0_MI_PIN +GPIO_PWRAP_SPI0_MO_PIN +GPIO_PWRAP_SPI0_CK_PIN +GPIO_PWRAP_SPI0_CSN_PIN +GPIO_CMCSD0_PIN +GPIO_CMCSD1_PIN +GPIO_CMCSD2_PIN +GPIO_CMCSD3_PIN +GPIO_SENSORHUB_HOST_RESET +GPIO_SENSORHUB_HOST_BOOT_ROM +GPIO_SENSORHUB_WAKE_UP +GPIO_SENSORHUB_EINT_PIN +GPIO_HAPTIC_DRV_EN_PIN +GPIO_HAPTIC_PWM_EN_PIN +GPIO_LCD_IO_0_PIN +GPIO_LCD_IO_1_PIN +GPIO_LCD_IO_2_PIN +GPIO_LCD_IO_3_PIN +GPIO_LCD_IO_4_PIN +GPIO_LCD_IO_5_PIN +GPIO_LCD_IO_6_PIN +GPIO_LCD_IO_7_PIN +GPIO_LCD_IO_8_PIN +GPIO_LCD_IO_9_PIN +GPIO_LCD_IO_10_PIN +GPIO_LCD_IO_11_PIN +GPIO_LCD_IO_12_PIN +GPIO_LCD_IO_13_PIN +GPIO_LCD_IO_14_PIN +GPIO_LCD_IO_15_PIN +GPIO_LCD_IO_16_PIN +GPIO_LCD_IO_17_PIN +GPIO_LCD_IO_18_PIN +GPIO_LCD_IO_19_PIN +GPIO_LCD_IO_20_PIN +GPIO_LCD_IO_21_PIN +GPIO_LCD_IO_22_PIN +GPIO_LCD_IO_23_PIN +GPIO_PWM_BL_PIN +GPIO_LCD_TE_PIN +GPIO_LCD_PA_PIN +GPIO_LCD_WRB_PIN +GPIO_LCD_RDB_PIN +GPIO_LCD_CEB_PIN +GPIO_DPI_CK_PIN +GPIO_DPI_DE_PIN +GPIO_DPI_VSYNC_PIN +GPIO_DPI_HSYNC_PIN +GPIO_DSI_TE_PIN +GPIO_DSI_CKP_PIN +GPIO_DSI_CKN_PIN +GPIO_DSI_D0P_PIN +GPIO_DSI_D0N_PIN +GPIO_DSI_D1P_PIN +GPIO_DSI_D1N_PIN +GPIO_DSI_D2P_PIN +GPIO_DSI_D2N_PIN +GPIO_DISP_LSDI_PIN +GPIO_HEART_RATE_RESET_PIN +GPIO_MT8193_BUS_SWITCH_PIN +GPIO_HDMI_IN_SWITCH_PORT_PIN +GPIO_CAMERA_VCAMA_ENABLE_PIN +GPIO_USB_REDRI_SW_C1_PIN +GPIO_USB_REDRI_SW_C2_PIN +GPIO_USB_TYPEC_EINT_PIN +GPIO_USB_TYPEC_SW_EN_PIN +GPIO_USB_TYPEC_SW_SEL_PIN +GPIO_CAMERA_MIPI_SWITCH_EN_PIN +GPIO_CAMERA_MIPI_SWITCH_SEL_PIN +GPIO_U3_REDRIVER_C2_PIN +GPIO_U3_REDRIVER_C1_PIN +GPIO_FUSB340_USBTYPEC_SEL_PIN +GPIO_FUSB340_USBTYPEC_NOE_PIN +GPIO_SIL7033_RST_PIN +GPIO_HP_DEPOP_SWITCH_PIN +GPIO_CMMCLK1_PIN +GPIO_EINT_CHG_STAT_PIN +GPIO_FINGERPRINT_RST_PIN +GPIO_ANT_SEL0_PIN +GPIO_ANT_SEL1_PIN +GPIO_ANT_SEL2_PIN +GPIO_ANT_SEL3_PIN +GPIO_ANT_SEL4_PIN +GPIO_ANT_SEL5_PIN +GPIO_ANT_SEL6_PIN +GPIO_ANT_SEL7_PIN +GPIO_FP_EINT_PIN +GPIO_SRCLKENA_PIN +GPIO_FUSB300_EINT_DET_IN_PIN +GPIO_SIL7033_EINT_INT_PIN +GPIO_VIB_EN_PIN +GPIO_VIB_PWM_PIN +GPIO_VMBUCK_I2C_SDA +GPIO_VMBUCK_I2C_SCL +GPIO_Smart_PA_EINT_PIN +GPIO_Smart_PA_RESET_N_PIN +GPIO_SMARTPA_LRCK_PIN +GPIO_EINT_SMARTPA_PIN +GPIO_VCAM_EN_PIN +GPIO_CAMERA_VCAMD_EN_PIN +GPIO_EINT_WPC_PIN +GPIO_BPI_ANT3_PIN +GPIO_BPI_ANT2_PIN +GPIO_BPI_ANT1_PIN +GPIO_BPI_ANT0_PIN +GPIO_MT6306_I2C_SCL_PIN +GPIO_MT6306_I2C_SDA_PIN +GPIO_NFC_SRCLKENAI_PIN +GPIO_IR_LDO_EN_PIN +GPIO_RFIC0_BSI_EN_PIN +GPIO_CAMERA_CMMCLK0_PIN +GPIO_DEPOP_SWITCH_PIN +GPIO_FLASH_STROBE_PIN +GPIO_SIM_SD_INT +GPIO_U3_PD_PWR_EN_PIN +GPIO_RT9465_PWR_EN_PIN +GPIO_RT9465_EINT_PIN +GPIO_MT6336_EINT_PIN +GPIO_EINT_RAMDUMP_PIN +GPIO_SIM3_HOT_PLUG +GPIO_VPROC_BUCK_EINT_PIN +GPIO_MT6632_TSF_PIN +GPIO_RT1711_EINT_PIN +GPIO_RT9750_EINT_1 +GPIO_RT9750_EINT_2 +GPIO_CAMERA_CMMCLK1_PIN +GPIO_MSDC3_DSL +GPIO_MT6380_PMU_EN +GPIO_WLC_PAV_PIN +GPIO_RT9750_EN_PIN +GPIO_MT6380_RSTB_PIN +GPIO_MT6632_STRAP_PIN +GPIO_SPI1_CS_PIN +GPIO_SPI1_MOSI_PIN +GPIO_SPI1_MISO_PIN +GPIO_SPI1_CK_PIN +GPIO_SPI3_CS_PIN +GPIO_SPI3_MOSI_PIN +GPIO_SPI3_MISO_PIN +GPIO_SPI3_CK_PIN +GPIO_SPI9_CS_PIN +GPIO_SPI9_MOSI_PIN +GPIO_SPI9_MISO_PIN +GPIO_SPI9_CK_PIN +GPIO_MT6370_IRQB_EINT_PIN +GPIO_MT6370_PD_IRQB +GPIO_PCB_ID2 +GPIO_PCB_ID1 +GPIO_AUD_SYNC_MOSI +GPIO_AUD_DAT_MOSI1 +GPIO_AUD_CLK_MISO +GPIO_AUD_SYNC_MISO +GPIO_AUD_DAT_MISO1 +GPIO_SRCLKENA1 +GPIO_BIO_PWD +GPIO_CAMERA_2_VCAMA_EN +GPIO_RT5081_IRQB_EINT_PIN +GPIO_SUBPMIC_IRQB_EINT_PIN +GPIO_VCONN_EN +GPIO_CHG_ENB_PIN +GPIO_MRDUMP_EXT_RST +GPIO_MT6311_EINT_PIN +GPIO_COMBO_SIM_SD +GPIO_VEFUSE_LDO_EN +GPIO_SUB_VCAMD_LDO_EN +GPIO_EXT_LDO_EN_PIN +GPIO_VMD1_SEL_PIN +GPIO_SUB_VCAMA_LDO_EN +GPIO_SMARTPA_WDT +GPIO_VCN33_LDO_EN +GPIO_INIT_NO_COVER +GPIO_TCPC_PD_IRQB + +[GPIO_MODE_EINT_WHITE_LIST] +DSI_TE + +[GPIO_MODE] +GPIO = _M_GPIO +CLK = _M_CLK +EINT = _M_EINT +MD_EINT = _M_MDEINT +IRQ = _M_IRQ +KROW = _M_KROW +KCOL = _M_KCOL +PWM = _M_PWM + +[GPIO_FREQ] +GPIO_BT_CLK_PIN = CLK_SRC_F32K +GPIO_GPS_CLK_PIN = CLK_SRC_F32K +GPIO_WIFI_CLK_PIN = CLK_SRC_F32K +GPIO_FM_CLK_PIN = CLK_SRC_F32K +GPIO_COMBO_RTCCLK_PIN = CLK_SRC_F32K + +[GPIO_VARIABLES_MAPPING] +GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_2ND_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_3RD_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_4TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_5TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_6TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_7TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_8TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_9TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_ATH_PIN +GPIO_SIM_SWITCH_DAT_PIN +GPIO_SIM_SWITCH_CLK_PIN +GPIO_SIM1_HOT_PLUG +GPIO_SIM2_HOT_PLUG +GPIO_CMDAT1 +GPIO_SIM1_SCLK +GPIO_SIM1_SRST +GPIO_SIM1_SIO +GPIO_SIM2_SCLK +GPIO_SIM2_SRST +GPIO_SIM2_SIO +GPIO_AST_CS_PIN +GPIO_AST_CS_PIN_NCE +GPIO_AST_RST_PIN +GPIO_AST_CLK32K_PIN +GPIO_AST_CLK32K_PIN_CLK +GPIO_AST_WAKEUP_PIN +GPIO_AST_WAKEUP_INTR_PIN +GPIO_AST_INTR_PIN +GPIO_AST_AFC_SWITCH_PIN +GPIO_RF_CONTROL1 +GPIO_SIM3_HOT_PLUG + +[SLAVE_DEVICE] +ALSPS +BAROMETER +BUCK_BOOST +CAMERA_MAIN +CAMERA_MAIN_AF +CAMERA_MAIN_HW +CAMERA_MAIN_EEPROM +CAMERA_MAIN_TWO +CAMERA_MAIN_TWO_AF +CAMERA_MAIN_TWO_HW +CAMERA_MAIN_TWO_EEPROM +CAMERA_MAIN_THREE +CAMERA_MAIN_THREE_AF +CAMERA_MAIN_THREE_HW +CAMERA_MAIN_THREE_EEPROM +CAMERA_SUB +CAMERA_SUB_AF +CAMERA_SUB_EEPROM +CAMERA_SUB_TWO +CAMERA_SUB_TWO_AF +CAMERA_SUB_TWO_EEPROM +CAP_TOUCH +CHARGEPUMP +EXT_BOOST +EXT_BUCK +EXT_BUCK2 +EXT_BUCK3 +EXT_BUCK_LP4 +EXT_BUCK_LP4X +EXT_BUCK_SRAM +EXT_BUCK_VGPU +EXT_DISP +EXT_SPEAKER_AMP +EXT_VBAT_BOOST +GSENSOR +GYRO +HUMIDITY +I2C_LCD_BIAS +MHL +MSENSOR +NFC +PRESSURE +SLAVE_CHARGER +SPEAKER_AMP +STROBE_MAIN +STROBE_MAIN_2 +STROBE_SUB +STROBE_SUB_2 +SW_CHARGER +SWITHING_CHARGER +TEMPER +USB_TYPE_C +VGPU_BUCK +VPROC_BUCK +DIRECT_CHARGER_1 +DIRECT_CHARGER_2 +SMART_PA +DP_SWITCH +DP_TRANS +DP_SWITCH_TRANS +MHL_TRANS +MHL_SWITCH +BYPASS_BOOST +TYPEC_PD +RT5081_PMU +RT5081_PD +RT5509 +RT5510 +MT6306 +MT6370_PMU +MT6370_PD +SUBPMIC_PMU +SUBPMIC +SUBPMIC_PMIC +SUBPMIC_LDO + +[Key_definition] +HOME = 102 +BACK = 158 +CALL = 231 +ENDCALL = 107 +VOLUMEDOWN = 114 +VOLUMEUP = 115 +MUTE = 113 +MENU = 139 +UP = 103 +DOWN = 108 +LEFT = 105 +RIGHT = 106 +OK = 352 +FOCUS = 211 +CAMERA = 212 +POWER = 116 +AT = 228 +POUND = 523 +STAR = 227 +DEL = 111 +TAB = 15 +ENTER = 28 +LEFTSHIFT = 42 +COMMA = 51 +DOT = 52 +SLASH = 53 +LEFTALT = 56 +RIGHTALT = 100 +SPACE = 57 +SEARCH = 217 +SYM = 127 +0 = 11 +1 = 2 +2 = 3 +3 = 4 +4 = 5 +5 = 6 +6 = 7 +7 = 8 +8 = 9 +9 = 10 +A = 30 +B = 48 +C = 46 +D = 32 +E = 18 +F = 33 +G = 34 +H = 35 +I = 23 +J = 36 +K = 37 +L = 38 +M = 50 +N = 49 +O = 24 +P = 25 +Q = 16 +R = 19 +S = 31 +T = 20 +U = 22 +V = 47 +W = 17 +X = 45 +Y = 21 +Z = 44 + +[Power_Key_definition] +POWER +ENDCALL + +[APPLICATION] +CAP_TOUCH_VDD +CAP_TOUCH_VIO +MAIN_CAMERA_POWER_A +MAIN_CAMERA_POWER_D +MAIN_CAMERA_POWER_IO +MAIN_CAMERA_POWER_AF +MAIN_CAMERA_2_POWER_A +MAIN_CAMERA_2_POWER_AF +MAIN_CAMERA_2_POWER_D +MAIN_CAMERA_2_POWER_IO +MAIN_CAMERA_3_POWER_A +MAIN_CAMERA_3_POWER_AF +MAIN_CAMERA_3_POWER_D +MAIN_CAMERA_3_POWER_IO +MHL_POWER_LDO1 +MHL_POWER_LDO2 +SUB_CAMERA_POWER_A +SUB_CAMERA_POWER_IO +SUB_CAMERA_POWER_D +SUB_CAMERA_POWER_AF +SUB_CAMERA_2_POWER_A +SUB_CAMERA_2_POWER_IO +SUB_CAMERA_2_POWER_D +SUB_CAMERA_2_POWER_AF +ACCELEROMETER_SENSOR_VDD +ACCELEROMETER_SENSOR_VIO +AMBIENT_LIGHT_SENSOR_VDD +AMBIENT_LIGHT_SENSOR_VIO +PROXIMITY_SENSOR_VDD +PROXIMITY_SENSOR_VIO +MAGNETOMETER_SENSOR_VDD +MAGNETOMETER_SENSOR_VIO +GYROSCOPE_VDD +GYROSCOPE_VIO +BAROMETER_VDD +BAROMETER_VIO +MEMORY_CARD_VDD + diff --git a/tools/dct/data/ClkData.py b/tools/dct/data/ClkData.py new file mode 100755 index 000000000000..bfeefe7c2683 --- /dev/null +++ b/tools/dct/data/ClkData.py @@ -0,0 +1,98 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +class ClkData: + _varList = ['DISABLE', 'SW_CONTROL', 'HW_CONTROL'] + _count = 0 + + def __init__(self): + self.__varName = '' + + def set_defVarName(self, idx): + self.__varName = self._varList[idx] + + def set_varName(self, name): + self.__varName = name + + def get_varName(self): + return self.__varName + + +class OldClkData(ClkData): + def __init__(self): + ClkData.__init__(self) + self.__current = '' + self.__curList = [] + + def set_defCurrent(self, idx): + self.__current = self.__curList[idx] + + def set_current(self, current): + self.__current = current + + def get_current(self): + return self.__current + + def set_curList(self, cur_list): + self.__curList = cur_list + + def get_curList(self): + return self.__curList + + +class NewClkData(ClkData): + def __init__(self): + ClkData.__init__(self) + self.__cur_buf_output = "" + self.__cur_buf_output_list = [] + self.__cur_driving_control = "" + self.__cur_driving_control_list = [] + + def set_def_buf_output(self, index): + self.__cur_buf_output = self.cur_buf_output_list[index] + + @property + def cur_buf_output(self): + return self.__cur_buf_output + + @cur_buf_output.setter + def cur_buf_output(self, value): + self.__cur_buf_output = value + + @property + def cur_buf_output_list(self): + return self.__cur_buf_output_list + + @cur_buf_output_list.setter + def cur_buf_output_list(self, value): + self.__cur_buf_output_list = value + + def set_def_driving_control(self, index): + self.__cur_driving_control = self.cur_driving_control_list[index] + + @property + def cur_driving_control(self): + return self.__cur_driving_control + + @cur_driving_control.setter + def cur_driving_control(self, value): + self.__cur_driving_control = value + + @property + def cur_driving_control_list(self): + return self.__cur_driving_control_list + + @cur_driving_control_list.setter + def cur_driving_control_list(self, value): + self.__cur_driving_control_list = value diff --git a/tools/dct/data/EintData.py b/tools/dct/data/EintData.py new file mode 100755 index 000000000000..53d981476bba --- /dev/null +++ b/tools/dct/data/EintData.py @@ -0,0 +1,105 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +class EintData: + _count = 0 + _debounce_enable_list = ['CUST_EINT_DEBOUNCE_DISABLE', 'CUST_EINT_DEBOUNCE_ENABLE'] + _map_table = {} + _mode_map = {} + _int_eint = {} + _builtin_map = {} + _builtin_eint_count = 0 + def __init__(self): + self.__varName = '' + self.__debounce_time = '' + self.__polarity = '' + self.__sensitive_level = '' + self.__debounce_enable = '' + + def set_varName(self, varName): + self.__varName = varName + + def get_varName(self): + return self.__varName + + def set_debounceTime(self, time): + self.__debounce_time = time + + def get_debounceTime(self): + return self.__debounce_time + + def set_polarity(self, polarity): + self.__polarity = polarity + + def get_polarity(self): + return self.__polarity + + def set_sensitiveLevel(self, level): + self.__sensitive_level = level + + def get_sensitiveLevel(self): + return self.__sensitive_level + + def set_debounceEnable(self, enable): + self.__debounce_enable = enable + + def get_debounceEnable(self): + return self.__debounce_enable + + @staticmethod + def set_mapTable(map): + EintData._map_table = map + + @staticmethod + def get_mapTable(): + return EintData._map_table + + @staticmethod + def get_internalEint(): + return EintData._int_eint + + @staticmethod + def get_modeName(gpio_num, mode_idx): + key = 'gpio%s' %(gpio_num) + + if key in EintData._mode_map.keys(): + list = EintData._mode_map[key] + if mode_idx < len(list) and mode_idx >= 0: + return list[mode_idx] + + return None + + @staticmethod + def set_modeMap(map): + for (key, value) in map.items(): + list = [] + for item in value: + list.append(item[6:len(item)-1]) + map[key] = list + + EintData._mode_map = map + + @staticmethod + def get_modeMap(): + return EintData._mode_map + + @staticmethod + def get_gpioNum(num): + if len(EintData._map_table): + for (key,value) in EintData._map_table.items(): + if num == value: + return key + + return -1 + diff --git a/tools/dct/data/GpioData.py b/tools/dct/data/GpioData.py new file mode 100755 index 000000000000..8363318bca8d --- /dev/null +++ b/tools/dct/data/GpioData.py @@ -0,0 +1,142 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +class GpioData: + _count = 0 + _modNum = 8 + _specMap = {} + _freqMap = {} + _mapList = [] + _modeMap = {} + _smtMap = {} + _map_table = {} + + def __init__(self): + self.__defMode = 0 + self.__eintMode = False + self.__modeVec = ['0', '0', '0', '0', '0', '0', '0', '0'] + self.__inPullEn = True + self.__inPullSelHigh = False + self.__defDirInt = 0 + self.__defDir = 'IN' + self.__inEn = True + self.__outEn = False + self.__outHigh = False + self.__varNames = [] + self.__smtNum = -1 + self.__smtEn = False + self.__iesEn = True + self.__drvCur = "" + + + def get_defMode(self): + return self.__defMode + + def set_defMode(self, mode): + self.__defMode = mode + + def get_eintMode(self): + return self.__eintMode + + def set_eintMode(self, flag): + self.__eintMode = flag + + def get_modeVec(self): + return self.__modeVec + + def set_modeVec(self, vec): + self.__modeVec = vec + + def get_inPullEn(self): + return self.__inPullEn + + def set_inpullEn(self, flag): + self.__inPullEn = flag + + def get_inPullSelHigh(self): + return self.__inPullSelHigh + + def set_inpullSelHigh(self, flag): + self.__inPullSelHigh = flag + + def get_defDir(self): + return self.__defDir + + def set_defDir(self, dir): + self.__defDir = dir + + def get_inEn(self): + return self.__inEn + + def set_inEn(self, flag): + self.__inEn = flag + + def get_outEn(self): + return self.__outEn + + def set_outEn(self, flag): + self.__outEn = flag + + def get_outHigh(self): + return self.__outHigh + + def set_outHigh(self, outHigh): + self.__outHigh = outHigh + + def get_varNames(self): + return self.__varNames + + def set_varNames(self, names): + self.__varNames = names + + def set_smtEn(self, flag): + self.__smtEn = flag + + def get_smtEn(self): + return self.__smtEn + + def get_iesEn(self): + return self.__iesEn + + def set_iesEn(self, flag): + self.__iesEn = flag + + def set_drvCur(self, val): + self.__drvCur = val + + def get_drvCur(self): + return self.__drvCur + + def set_smtNum(self, num): + self.__smtNum = num + + def get_smtNum(self): + return self.__smtNum + + def ge_defDirInt(self): + if self.__defDir == 'IN': + return 0 + else: + return 1 + + @staticmethod + def set_eint_map_table(map_table): + GpioData._map_table = map_table + + @staticmethod + def get_modeName(key, idx): + if key in GpioData._modeMap.keys(): + value = GpioData._modeMap[key] + return value[idx] + diff --git a/tools/dct/data/I2cData.py b/tools/dct/data/I2cData.py new file mode 100755 index 000000000000..6bb1d72ff11f --- /dev/null +++ b/tools/dct/data/I2cData.py @@ -0,0 +1,61 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +class BusData: + def __init__(self): + self.__speed = '' + self.__enable = False + + def set_speed(self, speed): + self.__speed = speed + + def set_enable(self, flag): + self.__enable = flag + + def get_speed(self): + return self.__speed + + def get_enable(self): + return self.__enable + +class I2cData: + _i2c_count = 0 + _channel_count = 0 + _busList = [] + + def __init__(self): + self.__varname = '' + self.__channel = '' + self.__address = '' + + def set_varName(self, name): + self.__varname = name + + def set_channel(self, channel): + self.__channel = channel + + def set_address(self, addr): + self.__address = addr + + def get_varName(self): + return self.__varname + + def get_channel(self): + return self.__channel + + def get_address(self): + return self.__address + + + diff --git a/tools/dct/data/KpdData.py b/tools/dct/data/KpdData.py new file mode 100755 index 000000000000..e0f4c989e85e --- /dev/null +++ b/tools/dct/data/KpdData.py @@ -0,0 +1,159 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +class KpdData: + _row = -1 + _col = -1 + _row_ext = -1 + _col_ext = -1 + _gpioNum = -1 + _util = '' + _homeKey = '' + _keyType = '' + _pressTime = -1 + _dinHigh = False + _matrix = [] + _matrix_ext = [] + _useEint = False + _downloadKeys = [] + _keyValueMap = {} + _usedKeys = [] + _modeKeys = {'META':None, 'RECOVERY':None, 'FACTORY':None} + + def __init__(self): + self.__varNames = [] + + @staticmethod + def set_row(row): + KpdData._row = row + + @staticmethod + def get_row(): + return KpdData._row + + @staticmethod + def set_col(col): + KpdData._col = col + + @staticmethod + def get_col(): + return KpdData._col + + @staticmethod + def set_row_ext(row): + KpdData._row_ext = row + + @staticmethod + def get_row_ext(): + return KpdData._row_ext + + @staticmethod + def set_col_ext(col): + KpdData._col_ext = col + + @staticmethod + def get_col_ext(): + return KpdData._col_ext + + @staticmethod + def set_matrix(matrix): + KpdData._matrix = matrix + + @staticmethod + def set_matrix_ext(matrix): + KpdData._matrix_ext = matrix + + @staticmethod + def get_matrix_ext(): + return KpdData._matrix_ext + + @staticmethod + def get_matrix(): + return KpdData._matrix + + @staticmethod + def set_downloadKeys(keys): + KpdData._downloadKeys = keys + + @staticmethod + def get_downloadKeys(): + return KpdData._downloadKeys + + @staticmethod + def get_modeKeys(): + return KpdData._modeKeys + + @staticmethod + def set_gpioNum(num): + KpdData._gpioNum = num + + @staticmethod + def get_gpioNum(): + return KpdData._gpioNum + + @staticmethod + def set_utility(util): + KpdData._util = util + + @staticmethod + def get_utility(): + return KpdData._util + + @staticmethod + def set_homeKey(home): + KpdData._homeKey = home + + @staticmethod + def get_homeKey(): + return KpdData._homeKey + + @staticmethod + def set_useEint(flag): + KpdData._useEint = flag + + @staticmethod + def getUseEint(): + return KpdData._useEint + + @staticmethod + def set_gpioDinHigh(flag): + KpdData._dinHigh = flag + + @staticmethod + def get_gpioDinHigh(): + return KpdData._dinHigh + + @staticmethod + def set_pressTime(time): + KpdData._pressTime = time + + @staticmethod + def get_pressTime(): + return KpdData._pressTime + + @staticmethod + def set_keyType(keyType): + KpdData._keyType = keyType + + @staticmethod + def get_keyType(): + return KpdData._keyType + + @staticmethod + def get_keyVal(key): + if key in KpdData._keyValueMap.keys(): + return KpdData._keyValueMap[key] + + return 0 + diff --git a/tools/dct/data/Md1EintData.py b/tools/dct/data/Md1EintData.py new file mode 100755 index 000000000000..e66fa09760ad --- /dev/null +++ b/tools/dct/data/Md1EintData.py @@ -0,0 +1,61 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +from data.EintData import EintData + +class Md1EintData(EintData): + def __init__(self): + EintData.__init__(self) + self.__dedicatedEn = False + self.__srcPin = '' + self.__socetType = '' + + def set_dedicatedEn(self, value): + if value == 'Disable': + self.__dedicatedEn = False + else: + self.__dedicatedEn = True + + def get_dedicatedEn(self): + return self.__dedicatedEn + + def set_srcPin(self, pin): + self.__srcPin = pin + + def get_srcPin(self): + return self.__srcPin + + def set_socketType(self, type): + self.__socetType = type + + def get_socketType(self): + return self.__socetType + + def set_sensitiveLevel(self, level): + EintData.set_sensitiveLevel(self, level) + + def get_sensitiveLevel(self): + return EintData.get_sensitiveLevel(self) + + def set_debounceEnable(self, enable): + EintData.set_debounceEnable(self, enable) + + def get_debounceEnable(self): + return EintData.get_debounceEnable(self) + + def set_polarity(self, polarity): + EintData.set_polarity(self, polarity) + + def get_polarity(self): + return EintData.get_polarity(self) diff --git a/tools/dct/data/PmicData.py b/tools/dct/data/PmicData.py new file mode 100755 index 000000000000..8674ca80498a --- /dev/null +++ b/tools/dct/data/PmicData.py @@ -0,0 +1,38 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +class PmicData: + _var_list = [] + def __init__(self): + self.__ldoName = '' + self.__defEn = -1 + self.__nameList = [] + + def set_ldoName(self, name): + self.__ldoName = name + + def get_ldoName(self): + return self.__ldoName + + def set_defEnable(self, number): + self.__defEn = number + + def get_defEnable(self): + return self.__defEn + + def set_nameList(self, name_list): + self.__nameList = name_list + + def get_nameList(self): + return self.__nameList diff --git a/tools/dct/data/PowerData.py b/tools/dct/data/PowerData.py new file mode 100755 index 000000000000..d8b44136ea2a --- /dev/null +++ b/tools/dct/data/PowerData.py @@ -0,0 +1,26 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +class PowerData: + def __init__(self): + self.__varName = '' + + def set_varName(self, name): + self.__varName = name + + def get_varName(self): + return self.__varName + + + diff --git a/tools/dct/data/__init__.py b/tools/dct/data/__init__.py new file mode 100755 index 000000000000..e35c0144ba90 --- /dev/null +++ b/tools/dct/data/__init__.py @@ -0,0 +1,10 @@ +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. diff --git a/tools/dct/obj/AdcObj.py b/tools/dct/obj/AdcObj.py new file mode 100755 index 000000000000..f9820275d436 --- /dev/null +++ b/tools/dct/obj/AdcObj.py @@ -0,0 +1,96 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import os +import re +import string +import xml.dom.minidom + +from obj.ModuleObj import ModuleObj +from utility.util import log +from utility.util import LogLevel +from utility.util import sorted_key + + +class AdcObj(ModuleObj): + def __init__(self): + ModuleObj.__init__(self, 'cust_adc.h', 'cust_adc.dtsi') + self.__idx_map = {} + + def get_cfgInfo(self): + pass + + def parse(self, node): + self.get_cfgInfo() + self.read(node) + + def read(self, node): + nodes = node.childNodes + try: + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if node.nodeName == 'count': + count = node.childNodes[0].nodeValue + continue + subNode = node.getElementsByTagName('varName') + if len(subNode): + ModuleObj.set_data(self, node.nodeName, subNode[0].childNodes[0].nodeValue) + except: + msg = 'read adc content fail!' + log(LogLevel.error, msg) + return False + + return True + + def gen_files(self): + ModuleObj.gen_files(self) + + def fill_hFile(self): + gen_str = '' + sorted_list = sorted(ModuleObj.get_data(self).keys()) + + for key in sorted_list: + value = ModuleObj.get_data(self)[key] + gen_str += '''#define AUXADC_%s_CHANNEL\t\t\t%s\n''' %(value.upper(), key[3:]) + + return gen_str + + def fill_dtsiFile(self): + gen_str = '''&auxadc {\n''' + gen_str += '''\tadc_channel@ {\n''' + gen_str += '''\t\tcompatible = "mediatek,adc_channel";\n''' + + # sort by the key, or the sequence is dissorted + #sorted_list = sorted(ModuleObj.get_data(self).keys()) + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + + if value == "TEMPERATURE": + gen_str += '''\t\tmediatek,%s0 = <%d>;\n''' %(value.lower(), string.atoi(key[3:])) + else: + gen_str += '''\t\tmediatek,%s = <%d>;\n''' %(value.lower(), string.atoi(key[3:])) + + gen_str += '''\t\tstatus = \"okay\";\n''' + gen_str += '''\t};\n''' + gen_str += '''};\n''' + + return gen_str + + + + + + + + diff --git a/tools/dct/obj/ChipObj.py b/tools/dct/obj/ChipObj.py new file mode 100755 index 000000000000..9311d10779e5 --- /dev/null +++ b/tools/dct/obj/ChipObj.py @@ -0,0 +1,458 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import os +import collections +import xml.dom.minidom + +from GpioObj import GpioObj +from GpioObj import GpioObj_whitney +from GpioObj import GpioObj_MT6759 +from GpioObj import GpioObj_MT6739 +from GpioObj import GpioObj_MT6771 +from GpioObj import GpioObj_MT6763 +from EintObj import EintObj +from EintObj import EintObj_MT6750S +from EintObj import EintObj_MT6739 +from AdcObj import AdcObj +from ClkObj import ClkObj +from ClkObj import ClkObj_Everest +from ClkObj import ClkObj_Olympus +from ClkObj import ClkObj_Rushmore +from ClkObj import ClkObj_MT6779 +from I2cObj import I2cObj +from I2cObj import I2cObj_MT6759 +from I2cObj import I2cObj_MT6775 +from PmicObj import PmicObj +from PmicObj import PmicObj_MT6758 +from Md1EintObj import Md1EintObj +from Md1EintObj import Md1EintObj_MT6739 +from PowerObj import PowerObj +from KpdObj import KpdObj +from ModuleObj import ModuleObj + +from utility.util import log +from utility.util import LogLevel + +para_map = {'adc':['adc_h', 'adc_dtsi'],\ + 'clk':['clk_buf_h', 'clk_buf_dtsi'],\ + 'i2c':['i2c_h', 'i2c_dtsi'],\ + 'eint':['eint_h', 'eint_dtsi'],\ + 'gpio':['gpio_usage_h', 'gpio_boot_h', 'gpio_dtsi', 'scp_gpio_usage_h', 'pinfunc_h', \ + 'pinctrl_h', 'gpio_usage_mapping_dtsi'],\ + 'md1_eint':['md1_eint_h', 'md1_eint_dtsi'],\ + 'kpd':['kpd_h', 'kpd_dtsi'],\ + 'pmic':['pmic_drv_h', 'pmic_drv_c', 'pmic_h', 'pmic_c', 'pmic_dtsi'],\ + 'power':['power_h']} + +class ChipObj: + def __init__(self, path, dest): + self.__epFlag = False + self.__path = path + ModuleObj.set_genPath(dest) + self.__objs = collections.OrderedDict() + + self.init_objs() + + def init_objs(self): + self.__objs['adc'] = AdcObj() + self.__objs['clk'] = ClkObj() + self.__objs["i2c"] = I2cObj() + self.__objs["gpio"] = GpioObj() + # eint obj need gpio data + self.__objs["eint"] = EintObj(self.__objs['gpio']) + self.__objs["md1_eint"] = Md1EintObj() + + self.__objs["pmic"] = PmicObj() + self.__objs["power"] = PowerObj() + self.__objs["kpd"] = KpdObj() + + def replace_obj(self, tag, obj): + if not tag in self.__objs.keys(): + return False + + self.__objs[tag] = obj + + def get_gpioObj(self): + return self.__objs['gpio'] + + def refresh_eintGpioMap(self): + self.__objs['eint'].set_gpioObj(self.__objs['gpio']) + + def append_obj(self, tag, obj): + if tag in self.__objs.keys(): + return False + + self.__objs[tag] = obj + + @staticmethod + def get_chipId(path): + if not os.path.exists(path): + msg = '%s is not a available path!' %(path) + log(LogLevel.error, msg) + return False + data = xml.dom.minidom.parse(path) + root = data.documentElement + # get 'general' node + node = root.getElementsByTagName('general') + return node[0].getAttribute('chip') + + def parse(self): + if not os.path.exists(self.__path): + msg = '%s is not a available path!' %(self.__path) + log(LogLevel.error, msg) + return False + + data = xml.dom.minidom.parse(self.__path) + + root = data.documentElement + # get 'general' node + node = root.getElementsByTagName('general') + # get chip name and project name + ModuleObj.set_chipId(node[0].getAttribute('chip')) + + # get early porting flag + epNode = node[0].getElementsByTagName('ep') + if len(epNode) != 0 and epNode[0].childNodes[0].nodeValue=="True": + self.__epFlag = True + + msg = 'Chip ID : %s' %(node[0].getAttribute('chip')) + log(LogLevel.info, msg) + msg = 'Project Info: %s' %(node[0].getElementsByTagName('proj')[0].childNodes[0].nodeValue) + log(LogLevel.info, msg) + + # initialize the objects mapping table + self.init_objs() + # get module nodes from DWS file + nodes = node[0].getElementsByTagName('module') + + for node in nodes: + tag = node.getAttribute('name') + obj = self.create_obj(tag) + if obj == None: + msg = 'can not find %s node in DWS!' %(tag) + log(LogLevel.error, msg) + return False + obj.parse(node) + + return True + + def generate(self, paras): + if len(paras) == 0: + for obj in self.__objs.values(): + obj.gen_files() + + self.gen_custDtsi() + else: + self.gen_spec(paras) + + return True + + def create_obj(self, tag): + obj = None + if tag in self.__objs.keys(): + obj = self.__objs[tag] + + return obj + + + def gen_spec(self, paras): + # if cmp(paras[0], 'cust_dtsi') == 0: + # self.gen_custDtsi() + # return True + + for para in paras: + if cmp(para, 'cust_dtsi') == 0: + self.gen_custDtsi() + continue + + idx = 0 + name = '' + if para.strip() != '': + for value in para_map.values(): + if para in value: + name = para_map.keys()[idx] + break + idx += 1 + + if name != '': + log(LogLevel.info, 'Start to generate %s file...' %(para)) + obj = self.__objs[name] + obj.gen_spec(para) + log(LogLevel.info, 'Generate %s file successfully!' %(para)) + else: + log(LogLevel.warn, '%s can not be recognized!' %(para)) + # sys.exit(-1) + + return True + + def gen_custDtsi(self): + log(LogLevel.info, 'Start to generate cust_dtsi file...') + fp = open(os.path.join(ModuleObj.get_genPath(), 'cust.dtsi'), 'w') + gen_str = ModuleObj.writeComment() + + # if early porting, gen empty dtsi file for kernel + if self.__epFlag: + fp.write(gen_str) + fp.close() + return + + #sorted_list = sorted(self.__objs.keys()) + #for tag in sorted_list: + for tag in self.__objs.keys(): + if cmp(tag, 'gpio') == 0: + gpioObj = self.create_obj(tag) + gen_str += ModuleObj.writeHeader(gpioObj.get_dtsiFileName()) + gen_str += gpioObj.fill_mapping_dtsiFile() + gen_str += gpioObj.fill_init_default_dtsiFile() + else: + obj = self.create_obj(tag) + gen_str += ModuleObj.writeHeader(obj.get_dtsiFileName()) + gen_str += obj.fill_dtsiFile() + + gen_str += '''\n\n''' + + fp.write(gen_str) + fp.close() + log(LogLevel.info, 'Generate cust_dtsi file successfully!') + + +class Everest(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + self.init_objs() + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'clk', ClkObj_Everest()) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + + +class Olympus(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'clk', ClkObj_Olympus()) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6759()) + + def parse(self): + return ChipObj.parse(self) + + + def generate(self, paras): + return ChipObj.generate(self, paras) + + +class MT6757_P25(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'clk', ClkObj_Olympus()) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6759()) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6759()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6739(ChipObj.get_gpioObj(self))) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + + +class Rushmore(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'clk', ClkObj_Rushmore()) + + def parse(self): + return ChipObj.parse(self) + + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class Whitney(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'gpio', GpioObj_whitney()) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6759()) + ChipObj.refresh_eintGpioMap(self) + + def parse(self): + log(LogLevel.info, 'Whitney parse') + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class MT6759(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6759()) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6759()) + ChipObj.refresh_eintGpioMap(self) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class MT6758(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'pmic', PmicObj_MT6758()) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6739()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6739(ChipObj.get_gpioObj(self))) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6759()) + ChipObj.replace_obj(self, 'md1_eint', Md1EintObj_MT6739()) + ChipObj.refresh_eintGpioMap(self) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class MT6763(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6763()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6739(ChipObj.get_gpioObj(self))) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6759()) + ChipObj.refresh_eintGpioMap(self) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class MT6739(MT6763): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'pmic', PmicObj_MT6758()) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6739()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6739(ChipObj.get_gpioObj(self))) + ChipObj.replace_obj(self, 'md1_eint', Md1EintObj_MT6739()) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6759()) + ChipObj.refresh_eintGpioMap(self) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class MT6750S(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'clk', ClkObj_Olympus()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6750S(ChipObj.get_gpioObj(self))) + ChipObj.refresh_eintGpioMap(self) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class MT8695(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'gpio', GpioObj_whitney()) + ChipObj.refresh_eintGpioMap(self) + + def parse(self): + return ChipObj.parse(self) + + def generate(self, paras): + return ChipObj.generate(self, paras) + +class MT6771(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'pmic', PmicObj_MT6758()) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6771()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6739(ChipObj.get_gpioObj(self))) + ChipObj.replace_obj(self, 'md1_eint', Md1EintObj_MT6739()) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6775()) + ChipObj.refresh_eintGpioMap(self) + +class MT6775(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'pmic', PmicObj_MT6758()) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6739()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6739(ChipObj.get_gpioObj(self))) + ChipObj.replace_obj(self, 'md1_eint', Md1EintObj_MT6739()) + ChipObj.replace_obj(self, 'i2c', I2cObj_MT6775()) + ChipObj.refresh_eintGpioMap(self) + + +class MT6779(ChipObj): + def __init__(self, dws_path, gen_path): + ChipObj.__init__(self, dws_path, gen_path) + + def init_objs(self): + ChipObj.init_objs(self) + ChipObj.replace_obj(self, 'clk', ClkObj_MT6779()) + ChipObj.replace_obj(self, 'pmic', PmicObj_MT6758()) + ChipObj.replace_obj(self, 'gpio', GpioObj_MT6771()) + ChipObj.replace_obj(self, 'eint', EintObj_MT6739(ChipObj.get_gpioObj(self))) + ChipObj.replace_obj(self, 'md1_eint', Md1EintObj_MT6739()) + ChipObj.replace_obj(self, "i2c", I2cObj_MT6775()) + ChipObj.refresh_eintGpioMap(self) + + + diff --git a/tools/dct/obj/ClkObj.py b/tools/dct/obj/ClkObj.py new file mode 100755 index 000000000000..445fc7caf1b1 --- /dev/null +++ b/tools/dct/obj/ClkObj.py @@ -0,0 +1,645 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import re +import string +import ConfigParser + +import xml.dom.minidom + +from ModuleObj import ModuleObj +from data.ClkData import ClkData +from data.ClkData import OldClkData +from data.ClkData import NewClkData +from utility.util import log +from utility.util import LogLevel +from utility.util import sorted_key + +DEFAULT_AUTOK = 'AutoK' +class ClkObj(ModuleObj): + def __init__(self): + ModuleObj.__init__(self, 'cust_clk_buf.h', 'cust_clk_buf.dtsi') + #self.__prefix_cfg = 'driving_current_pmic_clk_buf' + self._suffix = '_BUF' + self.__count = -1 + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if node.nodeName == 'count': + continue + + varNode = node.getElementsByTagName('varName') + curNode = node.getElementsByTagName('current') + + key = re.findall(r'\D+', node.nodeName)[0].upper() + self._suffix + '%s' %(re.findall(r'\d+', node.nodeName)[0]) + + if key not in ModuleObj.get_data(self): + continue; + + data = ModuleObj.get_data(self)[key] + + if len(varNode): + data.set_varName(varNode[0].childNodes[0].nodeValue) + + if len(curNode): + data.set_current(curNode[0].childNodes[0].nodeValue) + + ModuleObj.set_data(self, key, data) + + return True + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_figPath()) + + count = string.atoi(cp.get('CLK_BUF', 'CLK_BUF_COUNT')) + self.__count = count + + ops = cp.options('CLK_BUF') + for op in ops: + if op == 'clk_buf_count': + self.__count = string.atoi(cp.get('CLK_BUF', op)) + ClkData._count = string.atoi(cp.get('CLK_BUF', op)) + continue + + value = cp.get('CLK_BUF', op) + var_list = value.split(':') + + data = OldClkData() + data.set_curList(var_list[2:]) + data.set_defVarName(string.atoi(var_list[0])) + data.set_defCurrent(string.atoi(var_list[1])) + + key = op[16:].upper() + ModuleObj.set_data(self, key, data) + + def parse(self, node): + self.get_cfgInfo() + self.read(node) + + def gen_files(self): + ModuleObj.gen_files(self) + + def fill_hFile(self): + gen_str = '''typedef enum {\n''' + gen_str += '''\tCLOCK_BUFFER_DISABLE,\n''' + gen_str += '''\tCLOCK_BUFFER_SW_CONTROL,\n''' + gen_str += '''\tCLOCK_BUFFER_HW_CONTROL\n''' + gen_str += '''} MTK_CLK_BUF_STATUS;\n''' + gen_str += '''\n''' + + gen_str += '''typedef enum {\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_AUTO_K = -1,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_0,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_1,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_2,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_3\n''' + gen_str += '''} MTK_CLK_BUF_DRIVING_CURR;\n''' + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + gen_str += '''#define %s_STATUS_PMIC\t\tCLOCK_BUFFER_%s\n''' %(key[5:], value.get_varName().upper()) + + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + idx = value.get_curList().index(value.get_current()) + if cmp(value.get_curList()[0], DEFAULT_AUTOK) == 0: + idx -= 1 + + if idx >= 0: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_%d\n''' %(key, idx) + else: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_AUTO_K\n''' %(key) + + gen_str += '''\n''' + + return gen_str + + def fill_dtsiFile(self): + gen_str = '''&pmic_clock_buffer_ctrl {\n''' + gen_str += '''\tmediatek,clkbuf-quantity = <%d>;\n''' %(self.__count) + gen_str += '''\tmediatek,clkbuf-config = <''' + + #sorted_list = sorted(ModuleObj.get_data(self).keys()) + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('PMIC') == -1: + continue + value = ModuleObj.get_data(self)[key] + gen_str += '''%d ''' %(ClkData._varList.index(value.get_varName())) + + gen_str = gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tmediatek,clkbuf-driving-current = <''' + + #sorted_list = sorted(ModuleObj.get_data(self).keys()) + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('PMIC') == -1: + continue + value = ModuleObj.get_data(self)[key] + idx = value.get_curList().index(value.get_current()) + if cmp(value.get_curList()[0], DEFAULT_AUTOK) == 0: + idx -= 1 + if idx < 0: + gen_str += '''(%d) ''' %(-1) + else: + gen_str += '''%d ''' %(idx) + + gen_str = gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str + + +class ClkObj_Everest(ClkObj): + def __init__(self): + ClkObj.__init__(self) + self.__rf = 'RF' + self.__pmic = 'PMIC' + + def parse(self, node): + ClkObj.parse(self, node) + + def gen_files(self): + ClkObj.gen_files(self) + + def fill_hFile(self): + gen_str = '''typedef enum {\n''' + gen_str += '''\tCLOCK_BUFFER_DISABLE,\n''' + gen_str += '''\tCLOCK_BUFFER_SW_CONTROL,\n''' + gen_str += '''\tCLOCK_BUFFER_HW_CONTROL\n''' + gen_str += '''} MTK_CLK_BUF_STATUS;\n''' + gen_str += '''\n''' + + gen_str += '''typedef enum {\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_0_4MA,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_0_9MA,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_1_4MA,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_1_9MA\n''' + gen_str += '''} MTK_CLK_BUF_DRIVING_CURR;\n''' + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find(self.__pmic) != -1: + gen_str += '''#define %s_STATUS_PMIC\t\t\t\tCLOCK_BUFFER_%s\n''' %(key[5:], value.get_varName()) + + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find(self.__pmic) != -1: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_%sMA\n''' %(key, value.get_current().replace('.', '_')) + + gen_str += '''\n''' + + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find(self.__rf) != -1: + gen_str += '''#define %s_STATUS\t\tCLOCK_BUFFER_%s\n''' %(key[3:], value.get_varName()) + + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find(self.__rf) != -1: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_%sMA\n''' %(key, value.get_current().replace('.', '_')) + + gen_str += '''\n''' + + + + return gen_str + + def fill_dtsiFile(self): + gen_str = ClkObj.fill_dtsiFile(self) + + gen_str += '''\n''' + + gen_str += '''&rf_clock_buffer_ctrl {\n''' + gen_str += '''\tmediatek,clkbuf-quantity = <%d>;\n''' %(len(ModuleObj.get_data(self))-ClkData._count) + msg = 'rf clk buff count : %d' %(len(ModuleObj.get_data(self))-ClkData._count) + log(LogLevel.info, msg) + gen_str += '''\tmediatek,clkbuf-config = <''' + + #sorted_list = sorted(ModuleObj.get_data(self).keys()) + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + + if key.find(self.__rf) != -1: + gen_str += '''%d ''' %(ClkData._varList.index(value.get_varName())) + gen_str = gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tmediatek,clkbuf-driving-current = <''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find(self.__rf) != -1: + idx = value.get_curList().index(value.get_current()) + if cmp(value.get_curList()[0], DEFAULT_AUTOK) == 0: + idx -= 1 + gen_str += '''%d ''' %(idx) + + gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str + +class ClkObj_Olympus(ClkObj_Everest): + + def __init__(self): + ClkObj_Everest.__init__(self) + + def get_cfgInfo(self): + ClkObj_Everest.get_cfgInfo(self) + + def parse(self, node): + ClkObj_Everest.parse(self, node) + + def gen_files(self): + ClkObj_Everest.gen_files(self) + + def fill_hFile(self): + gen_str = '''typedef enum {\n''' + gen_str += '''\tCLOCK_BUFFER_DISABLE,\n''' + gen_str += '''\tCLOCK_BUFFER_SW_CONTROL,\n''' + gen_str += '''\tCLOCK_BUFFER_HW_CONTROL\n''' + gen_str += '''} MTK_CLK_BUF_STATUS;\n''' + gen_str += '''\n''' + + gen_str += '''typedef enum {\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_AUTO_K = -1,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_0,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_1,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_2,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_3\n''' + gen_str += '''} MTK_CLK_BUF_DRIVING_CURR;\n''' + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find('PMIC') != -1: + gen_str += '''#define %s_STATUS_PMIC\t\tCLOCK_BUFFER_%s\n''' %(key[5:], value.get_varName()) + + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find('RF') != -1: + gen_str += '''#define %s_STATUS\t\t\t\tCLOCK_BUFFER_%s\n''' %(key[3:], value.get_varName()) + + gen_str += '''\n''' + + + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('PMIC') != -1: + continue + value = ModuleObj.get_data(self)[key] + idx = value.get_curList().index(value.get_current()) + if cmp(value.get_curList()[0], DEFAULT_AUTOK) == 0: + idx -= 1 + + if idx >= 0: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_%d\n''' %(key, idx) + else: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_AUTO_K\n''' %(key) + + gen_str += '''\n''' + + + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('RF') != -1: + continue + value = ModuleObj.get_data(self)[key] + idx = value.get_curList().index(value.get_current()) + if cmp(value.get_curList()[0], DEFAULT_AUTOK) == 0: + idx -= 1 + + if idx >= 0: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_%d\n''' %(key, idx) + else: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_AUTO_K\n''' %(key) + + gen_str += '''\n''' + + return gen_str + +class ClkObj_Rushmore(ClkObj): + + def __init__(self): + ClkObj.__init__(self) + + def parse(self, node): + ClkObj.parse(self, node) + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_figPath()) + + count = string.atoi(cp.get('CLK_BUF', 'CLK_BUF_COUNT')) + self.__count = count + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if node.nodeName == 'count': + continue + + varNode = node.getElementsByTagName('varName') + curNode = node.getElementsByTagName('current') + + key = re.findall(r'\D+', node.nodeName)[0].upper() + self._suffix + '%s' %(re.findall(r'\d+', node.nodeName)[0]) + data = OldClkData() + if len(varNode): + data.set_varName(varNode[0].childNodes[0].nodeValue) + + #if len(curNode): + #data.set_current(curNode[0].childNodes[0].nodeValue) + + ModuleObj.set_data(self, key, data) + + return True + + def fill_hFile(self): + gen_str = '''typedef enum {\n''' + gen_str += '''\tCLOCK_BUFFER_DISABLE,\n''' + gen_str += '''\tCLOCK_BUFFER_SW_CONTROL,\n''' + gen_str += '''\tCLOCK_BUFFER_HW_CONTROL\n''' + gen_str += '''} MTK_CLK_BUF_STATUS;\n''' + gen_str += '''\n''' + + gen_str += '''typedef enum {\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_AUTO_K = -1,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_0,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_1,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_2,\n''' + gen_str += '''\tCLK_BUF_DRIVING_CURR_3\n''' + gen_str += '''} MTK_CLK_BUF_DRIVING_CURR;\n''' + gen_str += '''\n''' + + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if key.find('RF') != -1: + gen_str += '''#define %s_STATUS\t\t\t\tCLOCK_BUFFER_%s\n''' %(key[3:], value.get_varName()) + + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('RF') != -1: + continue + value = ModuleObj.get_data(self)[key] + idx = value.get_curList().index(value.get_current()) + if cmp(value.get_curList()[0], DEFAULT_AUTOK) == 0: + idx -= 1 + + if idx >= 0: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_%d\n''' %(key, idx) + else: + gen_str += '''#define %s_DRIVING_CURR\t\tCLK_BUF_DRIVING_CURR_AUTO_K\n''' %(key) + + gen_str += '''\n''' + + return gen_str + + def fill_dtsiFile(self): + gen_str = '''&rf_clock_buffer_ctrl {\n''' + gen_str += '''\tmediatek,clkbuf-quantity = <%d>;\n''' %(self.__count) + gen_str += '''\tmediatek,clkbuf-config = <''' + + #sorted_list = sorted(ModuleObj.get_data(self).keys()) + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('RF') == -1: + continue + value = ModuleObj.get_data(self)[key] + gen_str += '''%d ''' %(ClkData._varList.index(value.get_varName())) + + gen_str = gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str + + +class ClkObj_MT6779(ClkObj): + def __init__(self): + ClkObj.__init__(self) + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if node.nodeName == 'count': + continue + + key = re.findall(r'\D+', node.nodeName)[0].upper() + self._suffix + '%s' % (re.findall(r'\d+', node.nodeName)[0]) + + if key not in ModuleObj.get_data(self): + continue + + data = ModuleObj.get_data(self)[key] + + var_name_node = node.getElementsByTagName('varName') + cur_buf_node = node.getElementsByTagName('cur_buf_output') + cur_driving_node = node.getElementsByTagName('cur_driving_control') + + if len(var_name_node): + data.set_varName(var_name_node[0].childNodes[0].nodeValue) + if len(cur_buf_node): + data.cur_buf_output = cur_buf_node[0].childNodes[0].nodeValue + if len(cur_driving_node): + data.cur_driving_control = cur_driving_node[0].childNodes[0].nodeValue + + ModuleObj.set_data(self, key, data) + + return True + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_figPath()) + + max_count = self.get_max_count(cp) + self.__count = max_count + ClkData._count = max_count + + ops = cp.options('CLK_BUF') + for op in ops: + if op == 'clk_buf_count': + continue + + value = cp.get('CLK_BUF', op) + var_list = value.split(r'/') + + data = NewClkData() + data.set_defVarName(string.atoi(var_list[0])) + + buf_output_list = var_list[1].split(r":") + # only -1 means no data + if len(buf_output_list) > 1: + data.cur_buf_output_list = buf_output_list[1:] + data.set_def_buf_output(string.atoi(buf_output_list[0])) + + driving_control_list = var_list[2].split(r":") + # only -1 means no data + if len(driving_control_list) > 1: + data.cur_driving_control_list = driving_control_list[1:] + data.set_def_driving_control(string.atoi(driving_control_list[0])) + + key = op[16:].upper() + ModuleObj.set_data(self, key, data) + + # generate some dummy data, used for generating dtsi file + for i in range(max_count): + key = "PMIC_CLK_BUF" + "%s" % (i + 1) + if key not in ModuleObj.get_data(self).keys(): + data = NewClkData() + ModuleObj.set_data(self, key, data) + + def fill_hFile(self): + gen_str = '''typedef enum {\n''' + gen_str += '''\tCLOCK_BUFFER_DISABLE,\n''' + gen_str += '''\tCLOCK_BUFFER_SW_CONTROL,\n''' + gen_str += '''\tCLOCK_BUFFER_HW_CONTROL\n''' + gen_str += '''} MTK_CLK_BUF_STATUS;\n''' + gen_str += '''\n''' + + gen_str += '''typedef enum {\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_0,\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_1,\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_2,\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_3,\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_4,\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_5,\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_6,\n''' + gen_str += '''\tCLK_BUF_OUTPUT_IMPEDANCE_7\n''' + gen_str += '''} MTK_CLK_BUF_OUTPUT_IMPEDANCE;\n''' + gen_str += '''\n''' + + gen_str += '''typedef enum {\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_0,\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_1,\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_2,\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_3,\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_4,\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_5,\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_6,\n''' + gen_str += '''\tCLK_BUF_CONTROLS_FOR_DESENSE_7\n''' + gen_str += '''} MTK_CLK_BUF_CONTROLS_FOR_DESENSE;\n''' + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if len(value.get_varName()): + gen_str += '''#define %s_STATUS_PMIC\t\tCLOCK_BUFFER_%s\n''' % (key[5:], value.get_varName().upper()) + + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if len(value.cur_buf_output_list) and len(value.cur_buf_output): + idx = value.cur_buf_output_list.index(value.cur_buf_output) + gen_str += '''#define %s_OUTPUT_IMPEDANCE\t\tCLK_BUF_OUTPUT_IMPEDANCE_%d\n''' % (key, idx) + + gen_str += '''\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if len(value.cur_driving_control_list) and len(value.cur_driving_control): + idx = value.cur_driving_control_list.index(value.cur_driving_control) + gen_str += '''#define %s_CONTROLS_FOR_DESENSE\t\tCLK_BUF_CONTROLS_FOR_DESENSE_%d\n''' % (key, idx) + + gen_str += '''\n''' + + return gen_str + + def fill_dtsiFile(self): + gen_str = '''&pmic_clock_buffer_ctrl {\n''' + gen_str += '''\tmediatek,clkbuf-quantity = <%d>;\n''' % self.__count + gen_str += '''\tmediatek,clkbuf-config = <''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('PMIC') == -1: + continue + value = ModuleObj.get_data(self)[key] + if len(value.get_varName()): + gen_str += '''%d ''' % (ClkData._varList.index(value.get_varName())) + else: + gen_str += '''%d ''' % 0 + + gen_str = gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tmediatek,clkbuf-output-impedance = <''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('PMIC') == -1: + continue + value = ModuleObj.get_data(self)[key] + if len(value.cur_buf_output_list) and len(value.cur_buf_output): + idx = value.cur_buf_output_list.index(value.cur_buf_output) + gen_str += '''%d ''' % idx + else: + gen_str += '''%d ''' % 0 + + gen_str = gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tmediatek,clkbuf-controls-for-desense = <''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + if key.find('PMIC') == -1: + continue + value = ModuleObj.get_data(self)[key] + if len(value.cur_driving_control_list) and len(value.cur_driving_control): + idx = value.cur_driving_control_list.index(value.cur_driving_control) + gen_str += '''%d ''' % idx + else: + gen_str += '''%d ''' % 0 + + gen_str = gen_str.rstrip() + gen_str += '''>;\n''' + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str + + @staticmethod + def get_max_count(fig): + if fig.has_section("CLK_BUF_EX_PIN"): + max_count = -1 + options = fig.options("CLK_BUF_EX_PIN") + for option in options: + cur_count = fig.getint("CLK_BUF_EX_PIN", option) + max_count = max(cur_count, max_count) + return max_count + else: + return fig.getint('CLK_BUF', 'CLK_BUF_COUNT') diff --git a/tools/dct/obj/EintObj.py b/tools/dct/obj/EintObj.py new file mode 100755 index 000000000000..961e31152cdc --- /dev/null +++ b/tools/dct/obj/EintObj.py @@ -0,0 +1,400 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import re +import os +import string + +import ConfigParser +import xml.dom.minidom + +from data.EintData import EintData +from data.GpioData import GpioData +from utility.util import log +from utility.util import LogLevel +from utility.util import compare + +from obj.ModuleObj import ModuleObj +from obj.GpioObj import GpioObj + +class EintObj(ModuleObj): + def __init__(self, gpio_obj): + ModuleObj.__init__(self, 'cust_eint.h', 'cust_eint.dtsi') + self.__gpio_obj = gpio_obj + self.__count = 0 + self.__map_count = 0 + + def set_gpioObj(self, gpio_obj): + self.__gpio_obj = gpio_obj + + def read(self, node): + nodes = node.childNodes + + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if cmp(node.nodeName, 'count') == 0: + self.__count = node.childNodes[0].nodeValue + continue + + varNode = node.getElementsByTagName('varName') + detNode = node.getElementsByTagName('debounce_time') + polNode = node.getElementsByTagName('polarity') + senNode = node.getElementsByTagName('sensitive_level') + deeNode = node.getElementsByTagName('debounce_en') + + data = EintData() + if len(varNode): + data.set_varName(varNode[0].childNodes[0].nodeValue) + + if len(detNode): + data.set_debounceTime(detNode[0].childNodes[0].nodeValue) + + if len(polNode): + data.set_polarity(polNode[0].childNodes[0].nodeValue) + + if len(senNode): + data.set_sensitiveLevel(senNode[0].childNodes[0].nodeValue) + + if len(deeNode): + data.set_debounceEnable(deeNode[0].childNodes[0].nodeValue) + + ModuleObj.set_data(self, node.nodeName, data) + + return True + + def parse(self, node): + self.get_cfgInfo() + self.read(node) + + def gen_files(self): + ModuleObj.gen_files(self) + + def gen_spec(self, para): + ModuleObj.gen_spec(self, para) + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_figPath()) + + ops = cp.options('GPIO') + map = {} + mode_map = {} + for op in ops: + value = cp.get('GPIO', op) + list = re.split(r' +|\t+', value) + + map[string.atoi(re.findall(r'\d+', op)[0])] = string.atoi(list[len(list)-2]) + mode_map[op] = list[0:len(list)-2] + + EintData.set_mapTable(map) + EintData.set_modeMap(mode_map) + + if cp.has_option('EINT', 'EINT_MAP_COUNT'): + self.__map_count = string.atoi(cp.get('EINT', 'EINT_MAP_COUNT')) + + if cp.has_option('EINT', 'INTERNAL_EINT'): + info = cp.get('EINT', 'INTERNAL_EINT') + str_list = info.split(':') + for item in str_list: + sub_list = item.split('/') + EintData._int_eint[sub_list[0]] = sub_list[1] + + if cp.has_option('EINT', 'BUILTIN_EINT'): + info = cp.get('EINT', 'BUILTIN_EINT') + str_list = info.split(':') + for builtin_item in str_list: + builtin_list = builtin_item.split('/') + #EintData._builtin_map[builtin_list[0]] = builtin_list[1] + + temp = 'BUILTIN_%s' %(builtin_list[0]) + if cp.has_option('EINT', temp): + info = cp.get('EINT', temp) + str_list = info.split(':') + temp_map = {} + for item in str_list: + sub_list = item.split('/') + temp_map[sub_list[0]] = sub_list[1] + ':' + builtin_list[1] + + EintData._builtin_map[builtin_list[0]] = temp_map + EintData._builtin_eint_count += len(temp_map) + + self.__gpio_obj.set_eint_map_table(EintData._map_table) + + #def compare(self, value): + #return string.atoi(value[4:]) + + def fill_hFile(self): + gen_str = '' + gen_str += '''#ifdef __cplusplus\n''' + gen_str += '''extern \"C\" {\n''' + gen_str += '''#endif\n''' + + gen_str += '''#define CUST_EINTF_TRIGGER_RISING\t\t\t1\n''' + gen_str += '''#define CUST_EINTF_TRIGGER_FALLING\t\t\t2\n''' + gen_str += '''#define CUST_EINTF_TRIGGER_HIGH\t\t\t4\n''' + gen_str += '''#define CUST_EINTF_TRIGGER_LOW\t\t\t8\n''' + + gen_str += '''#define CUST_EINT_DEBOUNCE_DISABLE\t\t\t0\n''' + gen_str += '''#define CUST_EINT_DEBOUNCE_ENABLE\t\t\t1\n''' + + gen_str += '''\n\n''' + + sorted_list = sorted(ModuleObj.get_data(self).keys(), key=compare) + + for key in sorted_list: + value = ModuleObj.get_data(self)[key] + gen_str += '''#define CUST_EINT_%s_NUM\t\t\t%s\n''' %(value.get_varName().upper(), key[4:]) + gen_str += '''#define CUST_EINT_%s_DEBOUNCE_CN\t\t%s\n''' %(value.get_varName().upper(), value.get_debounceTime()) + + temp = '' + polarity = value.get_polarity() + sensitive = value.get_sensitiveLevel() + + if cmp(polarity, 'High') == 0 and cmp(sensitive, 'Edge') == 0: + temp = 'CUST_EINTF_TRIGGER_RISING' + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Edge') == 0: + temp = 'CUST_EINTF_TRIGGER_FALLING' + elif cmp(polarity, 'High') == 0 and cmp(sensitive, 'Level') == 0: + temp = 'CUST_EINTF_TRIGGER_HIGH' + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Level') == 0: + temp = 'CUST_EINTF_TRIGGER_LOW' + + gen_str += '''#define CUST_EINT_%s_TYPE\t\t\t%s\n''' %(value.get_varName().upper(), temp) + + temp = '' + if cmp(value.get_debounceEnable(), 'Disable') == 0: + temp = 'CUST_EINT_DEBOUNCE_DISABLE' + elif cmp(value.get_debounceEnable(), 'Enable') == 0: + temp = 'CUST_EINT_DEBOUNCE_ENABLE' + gen_str += '''#define CUST_EINT_%s_DEBOUNCE_EN\t\t%s\n\n''' %(value.get_varName().upper(), temp) + + + gen_str += '''#ifdef __cplusplus\n''' + gen_str += '''}\n''' + gen_str += '''#endif\n''' + + return gen_str + + def fill_mappingTable(self): + gen_str = '''&eintc {\n''' + count = 0 + + if self.__map_count == 0: + for i in range(0, string.atoi(self.__count)): + if EintData.get_gpioNum(i) >= 0: + count += 1 + count += len(EintData._int_eint) + else: + count = self.__map_count + + gen_str += '''\tmediatek,mapping_table_entry = <%d>;\n''' %(count) + gen_str += '''\t\t\t/* */\n''' + gen_str += '''\tmediatek,mapping_table = ''' + + sorted_list = sorted(EintData.get_mapTable().keys()) + for key in sorted_list: + value = EintData.get_mapTable()[key] + if value != -1: + gen_str += '''<%d %d>,\n\t\t\t\t\t''' %(key, value) + + sorted_list = sorted(EintData.get_internalEint().keys()) + for key in sorted_list: + value = EintData.get_internalEint()[key] + gen_str += '''<%s %s>,\n\t\t\t\t\t''' %(value, key) + #for (key, value) in EintData._int_eint.items(): + #gen_str += '''<%s %s>,\n\t\t\t\t\t''' %(value, key) + + gen_str = gen_str[0:len(gen_str)-7] + gen_str += ''';\n''' + gen_str += '''\tmediatek,builtin_entry = <%d>;\n''' %(EintData._builtin_eint_count) + if len(EintData._builtin_map) == 0: + gen_str += '''};\n\n''' + return gen_str + + gen_str += '''\t\t\t\t\t/* gpio, built-in func mode, built-in eint */\n''' + gen_str += '''\tmediatek,builtin_mapping = ''' + for (key, value) in EintData._builtin_map.items(): + for (sub_key, sub_value) in value.items(): + gen_str += '''<%s %s %s>, /* %s */\n\t\t\t\t\t''' %(sub_key, sub_value[0:1], key, sub_value) + + gen_str = gen_str[0:gen_str.rfind(',')] + gen_str += ';' + gen_str += '''};\n\n''' + + return gen_str + + def get_gpioNum(self, eint_num): + for (key, value) in EintData.get_mapTable().items(): + if cmp(eint_num, value) == 0: + return key + + return -1 + + def refGpio(self, eint_num, flag): + gpio_vec= [] + + for key in EintData._builtin_map.keys(): + if string.atoi(eint_num) == string.atoi(key): + temp_map = EintData._builtin_map[key] + for key in temp_map.keys(): + gpio_vec.append(key) + + if flag: + for item in temp_map.keys(): + item_data = self.__gpio_obj.get_gpioData(string.atoi(item)) + + if item_data.get_defMode() == string.atoi(temp_map[item].split(':')[0]): + gpio_vec = [] + gpio_vec.append(item) + return gpio_vec + + break + + gpio_num = EintData.get_gpioNum(string.atoi(eint_num)) + if gpio_num >= 0: + gpio_vec.append(gpio_num) + if flag: + item_data = self.__gpio_obj.get_gpioData(gpio_num) + mode_idx = item_data.get_defMode() + mode_name = EintData.get_modeName(gpio_num, mode_idx) + if re.match(r'GPIO[\d]+', mode_name) or re.match(r'EINT[\d]+', mode_name): + return gpio_vec + + return gpio_vec + + def fill_dtsiFile(self): + gen_str = '''#include \n''' + gen_str += '''#include \n''' + gen_str += '''\n''' + + gen_str += self.fill_mappingTable() + + sorted_list = sorted(ModuleObj.get_data(self).keys(), key=compare) + + for key in sorted_list: + value = ModuleObj.get_data(self)[key] + gen_str += '''&%s {\n''' %(value.get_varName().lower()) + gen_str += '''\tinterrupt-parent = <&eintc>;\n''' + + temp = '' + polarity = value.get_polarity() + sensitive = value.get_sensitiveLevel() + + if cmp(polarity, 'High') == 0 and cmp(sensitive, 'Edge') == 0: + temp = 'IRQ_TYPE_EDGE_RISING' + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Edge') == 0: + temp = 'IRQ_TYPE_EDGE_FALLING' + elif cmp(polarity, 'High') == 0 and cmp(sensitive, 'Level') == 0: + temp = 'IRQ_TYPE_LEVEL_HIGH' + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Level') == 0: + temp = 'IRQ_TYPE_LEVEL_LOW' + + gen_str += '''\tinterrupts = <%s %s>;\n''' %(self.refGpio(key[4:], True)[0], temp) + gen_str += '''\tdebounce = <%s %d>;\n''' %(self.refGpio(key[4:], True)[0], string.atoi(value.get_debounceTime()) * 1000) + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + gen_str += '''\n''' + + return gen_str + + def get_gpioObj(self): + return self.__gpio_obj + +class EintObj_MT6750S(EintObj): + def __init__(self, gpio_obj): + EintObj.__init__(self, gpio_obj) + + def parse(self, node): + EintObj.parse(self, node) + + def gen_files(self): + EintObj.gen_files(self) + + def gen_spec(self, para): + EintObj.gen_spec(self, para) + + def fill_mappingTable(self): + return '' + +class EintObj_MT6739(EintObj): + def __init__(self, gpio_obj): + EintObj.__init__(self, gpio_obj) + + def fill_dtsiFile(self): + gen_str = '''#include \n''' + gen_str += '''#include \n''' + gen_str += '''\n''' + + gen_str += self.fill_mappingTable() + + sorted_list = sorted(ModuleObj.get_data(self).keys(), key=compare) + + for key in sorted_list: + value = ModuleObj.get_data(self)[key] + gen_str += '''&%s {\n''' % (value.get_varName().lower()) + gen_str += '''\tinterrupt-parent = <&pio>;\n''' + + temp = '' + polarity = value.get_polarity() + sensitive = value.get_sensitiveLevel() + + if cmp(polarity, 'High') == 0 and cmp(sensitive, 'Edge') == 0: + temp = 'IRQ_TYPE_EDGE_RISING' + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Edge') == 0: + temp = 'IRQ_TYPE_EDGE_FALLING' + elif cmp(polarity, 'High') == 0 and cmp(sensitive, 'Level') == 0: + temp = 'IRQ_TYPE_LEVEL_HIGH' + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Level') == 0: + temp = 'IRQ_TYPE_LEVEL_LOW' + + gen_str += '''\tinterrupts = <%s %s %s %d>;\n''' % (key[4:], temp, self.refGpio(key[4:], True)[0], self.refGpio_defMode(key[4:], True)) + if cmp(value.get_debounceEnable(), 'Enable') == 0: + gen_str += '''\tdeb-gpios = <&pio %s 0>;\n''' % (self.refGpio(key[4:], True)[0]) + gen_str += '''\tdebounce = <%d>;\n''' % (string.atoi(value.get_debounceTime()) * 1000) + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + gen_str += '''\n''' + + return gen_str + + def fill_mappingTable(self): + return '' + + def refGpio_defMode(self, eint_num, flag): + refGpio_defMode = 0 + + for key in EintData._builtin_map.keys(): + if string.atoi(eint_num) == string.atoi(key): + temp_map = EintData._builtin_map[key] + + if flag: + for item in temp_map.keys(): + item_data = self.get_gpioObj().get_gpioData(string.atoi(item)) + + if item_data.get_defMode() == string.atoi(temp_map[item].split(':')[0]): + refGpio_defMode = item_data.get_defMode() + return refGpio_defMode + + break + + gpio_num = EintData.get_gpioNum(string.atoi(eint_num)) + if gpio_num >= 0: + if flag: + item_data = self.get_gpioObj().get_gpioData(gpio_num) + refGpio_defMode = item_data.get_defMode() + mode_name = EintData.get_modeName(gpio_num, refGpio_defMode) + if re.match(r'GPIO[\d]+', mode_name) or re.match(r'EINT[\d]+', mode_name): + return refGpio_defMode + + return refGpio_defMode diff --git a/tools/dct/obj/GpioObj.py b/tools/dct/obj/GpioObj.py new file mode 100755 index 000000000000..a5765d5fab21 --- /dev/null +++ b/tools/dct/obj/GpioObj.py @@ -0,0 +1,764 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import re +import os +import sys +import string +import ConfigParser +import xml.dom.minidom + + +from data.GpioData import GpioData +from data.EintData import EintData +from ModuleObj import ModuleObj +import ChipObj +from utility.util import compare +from utility.util import sorted_key +from utility.util import log +from utility.util import LogLevel + +class GpioObj(ModuleObj): + def __init__(self): + ModuleObj.__init__(self,'cust_gpio_boot.h', 'cust_gpio.dtsi') + self.__fileName = 'cust_gpio_usage.h' + self.__filePinfunc = '%s-pinfunc.h' %(ModuleObj.get_chipId().lower()) + self.__filePinCtrl = 'pinctrl-mtk-%s.h' %(ModuleObj.get_chipId().lower()) + self.__fileScp = 'cust_scp_gpio_usage.h' + self.__fileMap = 'cust_gpio_usage_mapping.dtsi' + self.__drvCur = False + self.__gpio_column_enable = True + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_cmpPath()) + + # get GPIO_FREQ section + keys= cp.options('GPIO_FREQ') + for key in keys: + value = cp.get('GPIO_FREQ', key) + GpioData._freqMap[key] = value + + # get GPIO_MODE section + keys = cp.options('GPIO_MODE') + for key in keys: + value = cp.get('GPIO_MODE', key) + GpioData._specMap[key] = value + + GpioData._mapList = cp.options('GPIO_VARIABLES_MAPPING') + + cp.read(ModuleObj.get_figPath()) + ops = cp.options('GPIO') + for op in ops: + value = cp.get('GPIO', op) + list = re.split(r' +|\t+', value) + tmp_list = list[0:len(list)-2] + temp = [] + for item in tmp_list: + str = item[6:len(item)-1] + temp.append(str) + GpioData._modeMap[op] = temp + + data = GpioData() + data.set_smtNum(string.atoi(list[len(list)-1])) + ModuleObj.set_data(self, op.lower(), data) + + if cp.has_option('Chip Type', 'GPIO_COLUMN_ENABLE'): + flag = cp.get('Chip Type', 'GPIO_COLUMN_ENABLE') + if flag == '0': + self.__gpio_column_enable = False + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if cmp(node.nodeName, 'count') == 0: + GpioData._count = string.atoi(node.childNodes[0].nodeValue) + continue + + eintNode = node.getElementsByTagName('eint_mode') + defmNode = node.getElementsByTagName('def_mode') + modsNode = node.getElementsByTagName('mode_arr') + inpeNode = node.getElementsByTagName('inpull_en') + inpsNode = node.getElementsByTagName('inpull_selhigh') + defdNode = node.getElementsByTagName('def_dir') + diriNode = node.getElementsByTagName('in') + diroNode = node.getElementsByTagName('out') + outhNode = node.getElementsByTagName('out_high') + var0Node = node.getElementsByTagName('varName0') + var1Node = node.getElementsByTagName('varName1') + var2Node = node.getElementsByTagName('varName2') + smtNode = node.getElementsByTagName('smt') + iesNode = node.getElementsByTagName('ies') + drvCurNode = node.getElementsByTagName('drv_cur') + + num = string.atoi(node.nodeName[4:]) + if num >= len(ModuleObj.get_data(self)): + break + data = ModuleObj.get_data(self)[node.nodeName] + + if len(eintNode): + flag = False + if cmp(eintNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_eintMode(flag) + + if len(defmNode): + data.set_defMode(string.atoi(defmNode[0].childNodes[0].nodeValue)) + + if len(modsNode) != 0 and len(modsNode[0].childNodes) != 0: + str = modsNode[0].childNodes[0].nodeValue + temp_list = [] + for i in range(0, len(str)): + temp_list.append(str[i]) + data.set_modeVec(temp_list) + + if len(inpeNode): + flag = False + if cmp(inpeNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_inpullEn(flag) + + if len(inpsNode): + flag = False + if cmp(inpsNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_inpullSelHigh(flag) + + if len(defdNode): + data.set_defDir(defdNode[0].childNodes[0].nodeValue) + + if len(diriNode) != 0 and len(diriNode[0].childNodes) != 0: + flag = False + if cmp(diriNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_inEn(flag) + + if len(diroNode) != 0 and len(diroNode[0].childNodes) != 0: + flag = False + if cmp(diroNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_outEn(flag) + + if len(outhNode): + flag = False + if cmp(outhNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_outHigh(flag) + + temp_list= [] + + if len(var0Node) != 0 and len(var0Node[0].childNodes) != 0: + temp_list.append(var0Node[0].childNodes[0].nodeValue) + if len(var1Node) != 0 and len(var1Node[0].childNodes) != 0: + temp_list.append(var1Node[0].childNodes[0].nodeValue) + if len(var2Node) != 0 and len(var2Node[0].childNodes) != 0: + temp_list.append(var2Node[0].childNodes[0].nodeValue) + data.set_varNames(temp_list) + + if len(smtNode): + flag = False + if cmp(smtNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_smtEn(flag) + + if len(iesNode): + flag = False + if cmp(iesNode[0].childNodes[0].nodeValue, 'true') == 0: + flag = True + data.set_iesEn(flag) + + if len(drvCurNode) != 0 and len(drvCurNode[0].childNodes) != 0: + self.__drvCur = True + data.set_drvCur(drvCurNode[0].childNodes[0].nodeValue) + + ModuleObj.set_data(self, node.nodeName, data) + + return True + + def get_gpioData(self, idx): + if idx >= GpioData._count or idx < 0: + return None + + key = 'gpio%s' %(idx) + return ModuleObj.get_data(self)[key] + + def parse(self, node): + self.get_cfgInfo() + self.read(node) + + def isMuxMode(self, key, index, modIdx): + mode_name = GpioData.get_modeName(key, index) + modIdx.append(index) + + if mode_name.find('//') != -1: + return True + return False + + def gen_files(self): + ModuleObj.gen_files(self) + self.gen_cFile() + self.gen_specFiles() + + def gen_spec(self, para): + if para == 'gpio_usage_h': + self.gen_cFile() + elif para == 'gpio_boot_h': + self.gen_hFile() + elif para == 'gpio_dtsi': + self.gen_dtsiFile() + elif para == 'scp_gpio_usage_h': + self.gen_scpUsage() + elif para == 'pinctrl_h': + self.gen_pinCtrl() + elif para == 'pinfunc_h': + self.gen_pinFunc() + elif para == 'gpio_usage_mapping_dtsi': + self.gen_mapDtsi() + + + def gen_cFile(self): + gen_str = '' + fp = open(os.path.join(ModuleObj.get_genPath(), self.__fileName), 'w') + gen_str += ModuleObj.writeComment() + gen_str += ModuleObj.writeHeader(self.__fileName) + gen_str += self.fill_cFile() + gen_str += ModuleObj.writeTail(self.__fileName) + fp.write(gen_str) + fp.close() + + def gen_specFiles(self): + self.gen_pinFunc() + self.gen_pinCtrl() + self.gen_scpUsage() + self.gen_mapDtsi() + + def gen_pinFunc(self): + gen_str = '' + fp = open(os.path.join(ModuleObj.get_genPath(), self.__filePinfunc), 'w') + gen_str += ModuleObj.writeComment() + gen_str += ModuleObj.writeHeader(self.__filePinfunc) + gen_str += self.fill_pinfunc_hFile() + gen_str += ModuleObj.writeTail(self.__filePinfunc) + fp.write(gen_str) + fp.close() + + def gen_pinCtrl(self): + gen_str = '' + fp = open(os.path.join(ModuleObj.get_genPath(), self.__filePinCtrl), 'w') + gen_str += ModuleObj.writeComment() + gen_str += ModuleObj.writeHeader(self.__filePinCtrl) + gen_str += self.fill_pinctrl_hFile() + gen_str += ModuleObj.writeTail(self.__filePinCtrl) + fp.write(gen_str) + fp.close() + + def gen_scpUsage(self): + gen_str = '' + fp = open(os.path.join(ModuleObj.get_genPath(), self.__fileScp), 'w') + gen_str += ModuleObj.writeComment() + gen_str += ModuleObj.writeHeader(self.__fileScp) + gen_str += self.fill_cFile() + gen_str += ModuleObj.writeTail(self.__fileScp) + fp.write(gen_str) + fp.close() + + def gen_mapDtsi(self): + gen_str = '' + fp = open(os.path.join(ModuleObj.get_genPath(), self.__fileMap), 'w') + gen_str += ModuleObj.writeComment() + gen_str += self.fill_mapping_dtsiFile() + fp.write(gen_str) + fp.close() + + def fill_hFile(self): + gen_str = '''//Configuration for GPIO SMT(Schmidt Trigger) Group output start\n''' + temp_list = [] + for key in sorted_key(ModuleObj.get_data(self).keys()): + #for value in ModuleObj.get_data(self).values(): + value = ModuleObj.get_data(self)[key] + num = value.get_smtNum() + if num in temp_list or num < 0: + continue + else: + temp_list.append(num) + if value.get_smtEn(): + gen_str += '''#define GPIO_SMT_GROUP_%d\t\t1\n''' %(num) + else: + gen_str += '''#define GPIO_SMT_GROUP_%d\t\t0\n''' %(num) + + gen_str += '''\n\n''' + + sorted_list = sorted(ModuleObj.get_data(self).keys(), key = compare) + + for key in sorted_list: + value = ModuleObj.get_data(self)[key] + if self.is_i2cPadPin(value.get_modeName(key, value.get_defMode())): + value.set_inpullEn(False) + value.set_outHigh(False) + value.set_inpullSelHigh(False) + + gen_str += '''//Configuration for %s\n''' %(key.upper()) + + mode_name = GpioData.get_modeName(key, value.get_defMode()) + val = '' + if mode_name != '': + if self.__gpio_column_enable: + flag = False + if mode_name.find('//') != -1: + flag = True + + if flag: + if value.get_modeVec()[value.get_defMode()] == '1': + val = str(value.get_defMode()) + elif value.get_modeVec()[value.get_defMode()] == '2': + val = str(value.get_defMode() + GpioData._modNum) + else: + val = str(value.get_defMode()) + else: + val = str(value.get_defMode()) + + if len(val) < 2: + val = '0' + val + + pull_en = '' + if value.get_inPullEn(): + pull_en = 'ENABLE' + else: + pull_en = 'DISABLE' + + pull_sel = '' + if value.get_inPullSelHigh(): + pull_sel = 'UP' + else: + pull_sel = 'DOWN' + + out_high = '' + if value.get_outHigh(): + out_high = 'ONE' + else: + out_high = 'ZERO' + + smt_en = '' + if value.get_smtEn(): + smt_en = 'ENABLE' + else: + smt_en= 'DISABLE' + + ies_en = '' + if value.get_iesEn(): + ies_en = 'ENABLE' + else: + ies_en = 'DISABLE' + + gen_str += '''#define %s_MODE\t\t\tGPIO_MODE_%s\n''' %(key.upper(), val) + gen_str += '''#define %s_DIR\t\t\tGPIO_DIR_%s\n''' %(key.upper(), value.get_defDir()) + gen_str += '''#define %s_PULLEN\t\tGPIO_PULL_%s\n''' %(key.upper(), pull_en) + gen_str += '''#define %s_PULL\t\t\tGPIO_PULL_%s\n''' %(key.upper(), pull_sel) + gen_str += '''#define %s_DATAOUT\t\tGPIO_OUT_%s\n''' %(key.upper(), out_high) + gen_str += '''#define %s_SMT\t\t\tGPIO_SMT_%s\n''' %(key.upper(), smt_en) + gen_str += '''#define %s_IES\t\t\tGPIO_IES_%s\n''' %(key.upper(), ies_en) + + if self.__drvCur: + drv_cur = 'DRV_UNSUPPORTED' + if value.get_drvCur() != '': + drv_cur = value.get_drvCur() + gen_str += '''#define %s_DRV\t\t\tGPIO_%s\n''' %(key.upper(), drv_cur) + + gen_str += '''\n''' + + return gen_str + + + def is_i2cPadPin(self, name): + if re.match(r'^SCL\d+$', name) or re.match(r'^SDA\d+$', name): + return True + + return False + + def fill_cFile(self): + gen_str = '' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if 'GPIO_INIT_NO_COVER' in value.get_varNames(): + continue + + for varName in value.get_varNames(): + gen_str += '''#define %s\t\t\t(%s | 0x80000000)\n''' %(varName.upper(), key.upper()) + if value.get_eintMode(): + gen_str += '''#define %s_M_EINT\t\tGPIO_MODE_00\n''' % (varName) + if self.__gpio_column_enable: + temp_list = [] + for item in GpioData._specMap.keys(): + regExp = '[_A-Z0-9:]*%s[_A-Z0-9:]*' %(item.upper()) + pat = re.compile(regExp) + for i in range(0, GpioData._modNum): + list = value.get_modeVec() + mode_name = GpioData.get_modeName(key, i) + + if list[i] == '1': + if mode_name.find('//') != -1: + mode_name = mode_name.split('//')[0] + elif list[i] == '2': + if mode_name.find('//') != -1: + mode_name = mode_name.split('//')[1] + + if pat.match(mode_name): + if cmp(item, 'eint') == 0 and ((value.get_eintMode() or mode_name.find('MD_EINT') != -1)): + continue + + gen_str += '''#define %s%s\t\tGPIO_MODE_0%d\n''' % (varName.upper(), GpioData._specMap[item].upper(), i) + temp_list.append(i) + break + + if not value.get_eintMode(): + list = value.get_modeVec() + for i in range(0,GpioData._modNum): + mode_name = GpioData.get_modeName(key, i) + + if list[i] == '0': + continue + elif list[i] == '1': + if mode_name.find('//') != -1: + mode_name = mode_name.split('//')[0] + elif list[i] == '2': + if mode_name.find('//') != -1: + mode_name = mode_name.split('//')[1] + + if not i in temp_list: + gen_str += '''#define %s_M_%s\t\tGPIO_MODE_0%d\n''' %(varName, re.sub(r'\d{0,3}$', '', mode_name), i) + + regExp = r'CLKM\d' + pat = re.compile(regExp) + for i in range(0, GpioData._modNum): + mode = GpioData.get_modeName(key, i) + if pat.match(mode): + gen_str += '''#define %s_CLK\t\tCLK_OUT%s\n''' % (varName, mode[4:]) + temp = '' + if varName in GpioData._freqMap.keys(): + temp = GpioData._freqMap[varName] + else: + temp = 'GPIO_CLKSRC_NONE' + gen_str += '''#define %s_FREQ\t\t%s\n''' % (varName, temp) + else: + mode_name = GpioData.get_modeName(key, value.get_defMode()) + bmatch = False + for item in GpioData._specMap.keys(): + regExp = '[_A-Z0-9:]*%s[_A-Z0-9:]*' %(item.upper()) + pat = re.compile(regExp) + if pat.match(mode_name): + if cmp(item, 'eint') == 0 and ((value.get_eintMode() or mode_name.find('MD_EINT') != -1)): + continue + gen_str += '''#define %s%s\t\tGPIO_MODE_0%d\n''' % (varName.upper(), GpioData._specMap[item].upper(), value.get_defMode()) + bmatch = True + + if not bmatch: + gen_str += '''#define %s_M_%s\t\tGPIO_MODE_0%d\n''' % (varName.upper(), re.sub(r'\d{0,3}$', '', mode_name), value.get_defMode()) + + if value.get_defMode() != 0: + mode_name = GpioData.get_modeName(key, 0) + gen_str += '''#define %s_M_%s\t\tGPIO_MODE_0%d\n''' % (varName.upper(), re.sub(r'\d{0,3}$', '', mode_name), 0) + + gen_str += '''\n''' + + return gen_str + + + def fill_dtsiFile(self): + gen_str = '''&pio {\n\n''' + gen_str += '''\tgpio_pins_default: gpiodef{\n\t};\n\n''' + + #sorted_list = sorted(ModuleObj.get_data(self).keys(), key = compare) + for key in sorted_key(ModuleObj.get_data(self).keys()): + #for key in sorted_list: + value = ModuleObj.get_data(self)[key] + gen_str += '''\t%s: gpio@%s {\n''' %(key.lower(), key[4:]) + gen_str += '''\t\tpins_cmd_dat {\n''' + mode = value.get_defMode() + mode_name = GpioData.get_modeName(key, mode) + if self.__gpio_column_enable: + mode_val = value.get_modeVec()[mode] + if mode_val == '1': + if mode_name.find('//') != -1: + mode_name = mode_name.split('//')[0] + elif mode_val == '2': + if mode_name.find('//') != -1: + mode_name = mode_name.split('//')[1] + + gen_str += '''\t\t\tpins = ;\n''' %(key[4:], mode_name) + gen_str += '''\t\t\tslew-rate = <%d>;\n''' %(value.ge_defDirInt()) + + temp = '' + if not value.get_inPullEn(): + temp = 'bias-disable;' + gen_str += '''\t\t\t%s\n''' %(temp) + if value.get_inPullSelHigh(): + temp = '11' + else: + temp = '00' + gen_str += '''\t\t\tbias-pull-down = <%s>;\n''' %(temp) + if value.get_outHigh(): + temp = 'high' + else: + temp = 'low' + gen_str += '''\t\t\toutput-%s;\n''' %(temp) + gen_str += '''\t\t\tinput-schmitt-enable = <%d>;\n''' %(value.get_smtEn()) + gen_str += '''\t\t};\n''' + gen_str += '''\t};\n''' + + gen_str += '''};\n\n''' + + gen_str += '''&gpio {\n''' + lineLen = 0 + gen_str += '''\tpinctrl-names = "default",''' + lineLen += 30 + for i in range(0, GpioData._count-1): + gen_str += '''"gpio%d",''' %(i) + if i < 10: + lineLen += 8 + elif i < 100: + lineLen += 9 + elif i >= 100: + lineLen += 10 + + if lineLen > 100: + gen_str += '''\n''' + lineLen = 0 + + + gen_str += '''"gpio%d";\n''' %(GpioData._count-1) + gen_str += '''\tpinctrl-0 = <&gpio_pins_default>;\n''' + + for i in range(1, GpioData._count): + gen_str += '''\tpinctrl-%d = <&gpio%d>;\n''' %(i, i-1) + + gen_str += '''\n''' + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str + + def fill_pinfunc_hFile(self): + gen_str = '''#include \"mt65xx.h\"\n\n''' + #sorted_list = sorted(ModuleObj.get_data(self).keys(), key = compare) + for key in sorted_key(ModuleObj.get_data(self).keys()): + #for key in sorted_list: + value = ModuleObj.get_data(self)[key] + for i in range(0, GpioData._modNum): + mode_name = GpioData.get_modeName(key, i) + + if mode_name != '': + lst = [] + if mode_name.find('//') != -1: + lst = mode_name.split('//') + else: + lst.append(mode_name) + + for j in range(0, len(lst)): + gen_str += '''#define PINMUX_GPIO%s__FUNC_%s (MTK_PIN_NO(%s) | %d)\n''' %(key[4:], lst[j], key[4:], (i + j*8)) + + gen_str += '''\n''' + gen_str += '''\n''' + + return gen_str + + def fill_pinctrl_hFile(self): + gen_str = '''#include \n''' + gen_str += '''#include \n\n''' + gen_str += '''static const struct mtk_desc_pin mtk_pins_%s[] = {\n''' %(ModuleObj.get_chipId().lower()) + + #sorted_list = sorted(ModuleObj.get_data(self).keys(), key = compare) + for key in sorted_key(ModuleObj.get_data(self).keys()): + #for key in sorted_list: + value = ModuleObj.get_data(self)[key] + gen_str += '''\tMTK_PIN(\n''' + gen_str += '''\t\tPINCTRL_PIN(%s, \"%s\"),\n''' %(key[4:], key.upper()) + gen_str += '''\t\tNULL, \"%s\",\n''' %(ModuleObj.get_chipId().lower()) + gen_str += '''\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT)''' + for i in range(0, GpioData._modNum): + mode_name = GpioData.get_modeName(key, i) + + if mode_name != '': + lst = [] + if mode_name.find('//') != -1: + lst = mode_name.split('//') + else: + lst.append(mode_name) + for j in range(0, len(lst)): + gen_str += ''',\n\t\tMTK_FUNCTION(%d, "%s")''' %(i + j * 8, lst[j]) + gen_str += '''\n\t),\n''' + + gen_str += '''};\n''' + + return gen_str + + def fill_mapping_dtsiFile(self): + gen_str = '''&gpio_usage_mapping {\n''' + + #sorted_list = sorted(ModuleObj.get_data(self).keys(), key = compare) + for key in sorted_key(ModuleObj.get_data(self).keys()): + #for key in sorted_list: + value = ModuleObj.get_data(self)[key] + for varName in value.get_varNames(): + if varName != '' and varName.lower() in GpioData._mapList: + gen_str += '''\t%s = <%s>;\n''' %(varName, key[4:]) + + gen_str += '''};\n''' + return gen_str + + def set_eint_map_table(self, map_table): + GpioData.set_eint_map_table(map_table) + + def fill_init_default_dtsiFile(self): + return '' + +class GpioObj_whitney(GpioObj): + def __init__(self): + GpioObj.__init__(self) + + def parse(self, node): + log(LogLevel.info, 'GpioObj_whitney parse') + GpioObj.parse(self, node) + + def gen_files(self): + GpioObj.gen_files(self) + + def gen_spec(self, para): + GpioObj.gen_spec(self, para) + + def is_i2cPadPin(self, name): + return False + +class GpioObj_MT6759(GpioObj): + def __init__(self): + GpioObj.__init__(self) + + def parse(self, node): + GpioObj.parse(self, node) + + def gen_files(self): + GpioObj.gen_files(self) + + def gen_spec(self, para): + GpioObj.gen_spec(self, para) + + def is_i2cPadPin(self, name): + return False + + def fill_mapping_dtsiFile(self): + gen_str = '''&gpio_usage_mapping {\n''' + + #sorted_list = sorted(ModuleObj.get_data(self).keys(), key = compare) + for key in sorted_key(ModuleObj.get_data(self).keys()): + #for key in sorted_list: + value = ModuleObj.get_data(self)[key] + for varName in value.get_varNames(): + if varName != '' and varName.lower() in GpioData._mapList: + gen_str += '''\t%s = <&pio %s 0>;\n''' %(varName, key[4:]) + + gen_str += '''};\n''' + return gen_str + +class GpioObj_MT6739(GpioObj_MT6759): + def __init__(self): + GpioObj_MT6759.__init__(self) + + def get_eint_index(self, gpio_index): + if string.atoi(gpio_index) in GpioData._map_table.keys(): + return GpioData._map_table[string.atoi(gpio_index)] + return -1 + + def fill_pinctrl_hFile(self): + gen_str = '''#include \n''' + gen_str += '''#include \n\n''' + gen_str += '''static const struct mtk_desc_pin mtk_pins_%s[] = {\n''' % (ModuleObj.get_chipId().lower()) + + # sorted_list = sorted(ModuleObj.get_data(self).keys(), key = compare) + for key in sorted_key(ModuleObj.get_data(self).keys()): + # for key in sorted_list: + value = ModuleObj.get_data(self)[key] + gen_str += '''\tMTK_PIN(\n''' + gen_str += '''\t\tPINCTRL_PIN(%s, \"%s\"),\n''' % (key[4:], key.upper()) + gen_str += '''\t\tNULL, \"%s\",\n''' % (ModuleObj.get_chipId().lower()) + eint_index = self.get_eint_index(key[4:]) + if eint_index != -1: + gen_str += '''\t\tMTK_EINT_FUNCTION(%d, %d)''' % (0, eint_index) + else: + gen_str += '''\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT)''' + for i in range(0, GpioData._modNum): + mode_name = GpioData.get_modeName(key, i) + + if mode_name != '': + lst = [] + if mode_name.find('//') != -1: + lst = mode_name.split('//') + else: + lst.append(mode_name) + for j in range(0, len(lst)): + gen_str += ''',\n\t\tMTK_FUNCTION(%d, "%s")''' % (i + j * 8, lst[j]) + gen_str += '''\n\t),\n''' + + gen_str += '''};\n''' + + return gen_str + +# remove dct in lk +class GpioObj_MT6771(GpioObj_MT6739): + def fill_init_default_dtsiFile(self): + gen_str = '''\n&gpio{\n''' + gen_str += '''\tgpio_init_default = ''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + + # if var name contains GPIO_INIT_NO_COVER, the device tree info of the pin in cust.dtsi file would not gen + if "GPIO_INIT_NO_COVER" in value.get_varNames(): + continue + + num = string.atoi(key[4:]) + defMode = value.get_defMode() + dout = 1 if value.get_outHigh() else 0 + pullEn = 1 if value.get_inPullEn() else 0 + pullSel = 1 if value.get_inPullSelHigh() else 0 + smtEn = 1 if value.get_smtEn() else 0 + + gen_str += '''<%d %d %d %d %d %d %d>,\n\t\t''' % (num, defMode, value.ge_defDirInt(), dout, pullEn, pullSel, smtEn) + + gen_str = gen_str[0: len(gen_str) - 4] + gen_str += ';' + gen_str += '''\n};\n''' + return gen_str + +class GpioObj_MT6763(GpioObj_MT6759): + def fill_init_default_dtsiFile(self): + gen_str = '''\n&gpio{\n''' + gen_str += '''\tgpio_init_default = ''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + + num = string.atoi(key[4:]) + defMode = value.get_defMode() + dout = 1 if value.get_outHigh() else 0 + pullEn = 1 if value.get_inPullEn() else 0 + pullSel = 1 if value.get_inPullSelHigh() else 0 + smtEn = 1 if value.get_smtEn() else 0 + + gen_str += '''<%d %d %d %d %d %d %d>,\n\t\t''' % (num, defMode, value.ge_defDirInt(), dout, pullEn, pullSel, smtEn) + + gen_str = gen_str[0: len(gen_str) - 4] + gen_str += ';' + gen_str += '''\n};\n''' + return gen_str \ No newline at end of file diff --git a/tools/dct/obj/I2cObj.py b/tools/dct/obj/I2cObj.py new file mode 100755 index 000000000000..1d73e27166d5 --- /dev/null +++ b/tools/dct/obj/I2cObj.py @@ -0,0 +1,240 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import re +import string +import xml.dom.minidom +import ConfigParser + +from ModuleObj import ModuleObj +#from utility import util +from utility.util import sorted_key +from data.I2cData import I2cData +from data.I2cData import BusData +import ChipObj + +class I2cObj(ModuleObj): + _busList = [] + _bBusEnable = True + def __init__(self): + ModuleObj.__init__(self, 'cust_i2c.h', 'cust_i2c.dtsi') + #self.__busList = [] + #self.__bBusEnable = True + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_figPath()) + + I2cData._i2c_count = string.atoi(cp.get('I2C', 'I2C_COUNT')) + I2cData._channel_count = string.atoi(cp.get('I2C', 'CHANNEL_COUNT')) + + if cp.has_option('Chip Type', 'I2C_BUS'): + flag = cp.get('Chip Type', 'I2C_BUS') + if flag == '0': + self._bBusEnable = False + + if cp.has_option('Chip Type', 'I2C_BUS'): + flag = cp.get('Chip Type', 'I2C_BUS') + if flag == '0': + self._bBusEnable = False + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.minidom.Node.ELEMENT_NODE: + if cmp(node.nodeName, 'count') == 0: + self.__count = node.childNodes[0].nodeValue + continue + if node.nodeName.find('bus') != -1: + speedNode = node.getElementsByTagName('speed_kbps') + enableNode = node.getElementsByTagName('pullPushEn') + + data = BusData() + if len(speedNode): + data.set_speed(speedNode[0].childNodes[0].nodeValue) + if len(enableNode): + data.set_enable(enableNode[0].childNodes[0].nodeValue) + + self._busList.append(data) + #I2cData._busList.append(data) + elif node.nodeName.find('device') != -1: + nameNode = node.getElementsByTagName('varName') + channelNode = node.getElementsByTagName('channel') + addrNode = node.getElementsByTagName('address') + + data = I2cData() + if len(nameNode): + data.set_varName(nameNode[0].childNodes[0].nodeValue) + if len(channelNode): + data.set_channel(channelNode[0].childNodes[0].nodeValue) + if len(addrNode): + data.set_address(addrNode[0].childNodes[0].nodeValue) + + ModuleObj.set_data(self, node.nodeName, data) + + return True + + def parse(self, node): + self.get_cfgInfo() + self.read(node) + + def gen_files(self): + ModuleObj.gen_files(self) + + def gen_spec(self, para): + ModuleObj.gen_spec(self, para) + + def fill_hFile(self): + gen_str = '' + for i in range(0, I2cData._channel_count): + gen_str += '''#define I2C_CHANNEL_%d\t\t\t%d\n''' %(i, i) + + gen_str += '''\n''' + + #sorted_lst = sorted(ModuleObj.get_data(self).keys(), key=compare) + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + temp = '' + if value.get_address().strip() == '': + temp = 'TRUE' + else: + temp = 'FALSE' + gen_str += '''#define I2C_%s_AUTO_DETECT\t\t\t%s\n''' %(value.get_varName(), temp) + gen_str += '''#define I2C_%s_CHANNEL\t\t\t%s\n''' %(value.get_varName(), value.get_channel()) + gen_str += '''#define I2C_%s_SLAVE_7_BIT_ADDR\t\t%s\n''' %(value.get_varName(), value.get_address().upper()) + gen_str += '''\n''' + + return gen_str + + def fill_dtsiFile(self): + gen_str = '' + for i in range(0, I2cData._channel_count): + if i >= len(self._busList): + break; + gen_str += '''&i2c%d {\n''' %(i) + gen_str += '''\t#address-cells = <1>;\n''' + gen_str += '''\t#size-cells = <0>;\n''' + + + if self._bBusEnable: + gen_str += '''\tclock-frequency = <%d>;\n''' %(string.atoi(self._busList[i].get_speed()) * 1000) + temp_str = '' + + if cmp(self._busList[i].get_enable(), 'false') == 0: + temp_str = 'use-open-drain' + elif cmp(self._busList[i].get_enable(), 'true') == 0: + temp_str = 'use-push-pull' + gen_str += '''\tmediatek,%s;\n''' %(temp_str) + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + channel = 'I2C_CHANNEL_%d' %(i) + if cmp(value.get_channel(), channel) == 0 and cmp(value.get_varName(), 'NC') != 0 and value.get_address().strip() != '': + gen_str += '''\t%s@%s {\n''' %(value.get_varName().lower(), value.get_address()[2:].lower()) + gen_str += '''\t\tcompatible = \"mediatek,%s\";\n''' %(value.get_varName().lower()) + gen_str += '''\t\treg = <%s>;\n''' %(value.get_address().lower()) + gen_str += '''\t\tstatus = \"okay\";\n''' + gen_str += '''\t};\n\n''' + + gen_str += '''};\n\n''' + + return gen_str + +class I2cObj_MT6759(I2cObj): + def __init__(self): + I2cObj.__init__(self) + + def parse(self, node): + I2cObj.parse(self, node) + + def gen_files(self): + I2cObj.gen_files(self) + + def gen_spec(self, para): + I2cObj.gen_spec(self, para) + + def fill_dtsiFile(self): + gen_str = '' + for i in range(0, I2cData._channel_count): + if i >= len(self._busList): + break; + gen_str += '''&i2c%d {\n''' %(i) + gen_str += '''\t#address-cells = <1>;\n''' + gen_str += '''\t#size-cells = <0>;\n''' + + + if self._bBusEnable: + gen_str += '''\tclock-frequency = <%d>;\n''' %(string.atoi(self._busList[i].get_speed()) * 1000) + temp_str = '' + + if cmp(self._busList[i].get_enable(), 'false') == 0: + temp_str = 'use-open-drain' + elif cmp(self._busList[i].get_enable(), 'true') == 0: + temp_str = 'use-push-pull' + gen_str += '''\tmediatek,%s;\n''' %(temp_str) + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + channel = 'I2C_CHANNEL_%d' %(i) + if cmp(value.get_channel(), channel) == 0 and cmp(value.get_varName(), 'NC') != 0 and value.get_address().strip() != '': + gen_str += '''\t%s_mtk:%s@%s {\n''' %(value.get_varName().lower(), value.get_varName().lower(), value.get_address()[2:].lower()) + gen_str += '''\t\tcompatible = \"mediatek,%s\";\n''' %(value.get_varName().lower()) + gen_str += '''\t\treg = <%s>;\n''' %(value.get_address().lower()) + gen_str += '''\t\tstatus = \"okay\";\n''' + gen_str += '''\t};\n\n''' + + gen_str += '''};\n\n''' + + return gen_str + +class I2cObj_MT6775(I2cObj): + def __init__(self): + I2cObj.__init__(self) + + def fill_dtsiFile(self): + gen_str = '' + for i in range(0, I2cData._channel_count): + if i >= len(self._busList): + break; + gen_str += '''&i2c%d {\n''' %(i) + gen_str += '''\t#address-cells = <1>;\n''' + gen_str += '''\t#size-cells = <0>;\n''' + + + if self._bBusEnable: + gen_str += '''\tclock-frequency = <%d>;\n''' %(string.atoi(self._busList[i].get_speed()) * 1000) + temp_str = '' + + if cmp(self._busList[i].get_enable(), 'false') == 0: + temp_str = 'use-open-drain' + elif cmp(self._busList[i].get_enable(), 'true') == 0: + temp_str = 'use-push-pull' + gen_str += '''\tmediatek,%s;\n''' %(temp_str) + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + channel = 'I2C_CHANNEL_%d' %(i) + if cmp(value.get_channel(), channel) == 0 and cmp(value.get_varName(), 'NC') != 0 and value.get_address().strip() != '': + gen_str += '''\t%s_mtk:%s@%s {\n''' %(value.get_varName().lower(), value.get_varName().lower(), value.get_address()[2:].lower()) + if re.match(r'^RT[\d]+$', value.get_varName()): + gen_str += '''\t\tcompatible = \"richtek,%s\";\n''' %(value.get_varName().lower()) + else: + gen_str += '''\t\tcompatible = \"mediatek,%s\";\n''' %(value.get_varName().lower()) + gen_str += '''\t\treg = <%s>;\n''' %(value.get_address().lower()) + gen_str += '''\t\tstatus = \"okay\";\n''' + gen_str += '''\t};\n\n''' + + gen_str += '''};\n\n''' + + return gen_str \ No newline at end of file diff --git a/tools/dct/obj/KpdObj.py b/tools/dct/obj/KpdObj.py new file mode 100755 index 000000000000..6dae46f25722 --- /dev/null +++ b/tools/dct/obj/KpdObj.py @@ -0,0 +1,306 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import re +import string +import ConfigParser +import xml.dom.minidom + +from ModuleObj import ModuleObj +from utility.util import LogLevel +from utility.util import log +from data.KpdData import KpdData + +class KpdObj(ModuleObj): + + def __init__(self): + ModuleObj.__init__(self, 'cust_kpd.h', 'cust_kpd.dtsi') + + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_cmpPath()) + + ops = cp.options('Key_definition') + for op in ops: + KpdData._keyValueMap[op.upper()] = string.atoi(cp.get('Key_definition', op)) + + KpdData._keyValueMap['NC'] = 0 + + cp.read(ModuleObj.get_figPath()) + if cp.has_option('KEYPAD_EXTEND_TYPE', 'KEY_ROW'): + KpdData.set_row_ext(string.atoi(cp.get('KEYPAD_EXTEND_TYPE', 'KEY_ROW'))) + if cp.has_option('KEYPAD_EXTEND_TYPE', 'KEY_COLUMN'): + KpdData.set_col_ext(string.atoi(cp.get('KEYPAD_EXTEND_TYPE', 'KEY_COLUMN'))) + + return True + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if node.nodeName == 'row': + row = string.atoi(node.childNodes[0].nodeValue) + KpdData.set_row(row) + + if node.nodeName == 'column': + col = string.atoi(node.childNodes[0].nodeValue) + KpdData.set_col(col) + + if node.nodeName == 'keyMatrix': + content = node.childNodes[0].nodeValue + content = content.replace('\t', '') + rows = content.split('''\n''') + matrix = [] + for row in rows: + for item in row.split(' '): + matrix.append(item) + KpdData.set_matrix(matrix) + for item in matrix: + if cmp(item, 'NC') != 0: + KpdData._usedKeys.append(item) + KpdData._usedKeys.append('POWER') + + if node.nodeName == "keyMatrix_ext" and node.childNodes: + content = node.childNodes[0].nodeValue + content = content.replace('\t', '') + rows = content.split('''\n''') + matrix = [] + for row in rows: + for item in row.split(' '): + matrix.append(item) + KpdData.set_matrix_ext(matrix) + + if node.nodeName == 'downloadKey': + keys = node.childNodes[0].nodeValue + KpdData.set_downloadKeys(keys.split(' ')) + + if node.nodeName == 'modeKey': + value = node.childNodes[0].nodeValue + keys = value.split(' ') + KpdData._modeKeys['META'] = keys[0] + KpdData._modeKeys['RECOVERY'] = keys[1] + KpdData._modeKeys['FACTORY'] = keys[2] + + if node.nodeName == 'pwrKeyEint_gpioNum': + num = string.atoi(node.childNodes[0].nodeValue) + KpdData.set_gpioNum(num) + + if node.nodeName == 'pwrKeyUtility': + util = node.childNodes[0].nodeValue + KpdData.set_utility(util) + + if node.nodeName == 'home_key': + if len(node.childNodes) != 0: + home = node.childNodes[0].nodeValue + else: + home = '' + KpdData.set_homeKey(home) + + if node.nodeName == 'bPwrKeyUseEint': + flag = False + if node.childNodes[0].nodeValue == 'false': + flag = False + else: + flag = True + + KpdData.set_useEint(flag) + + if node.nodeName == 'bPwrKeyGpioDinHigh': + flag = False + if node.childNodes[0].nodeValue == 'false': + flag = False + else: + flag = True + + KpdData.set_gpioDinHigh(flag) + + if node.nodeName == 'pressPeriod': + time = string.atoi(node.childNodes[0].nodeValue) + KpdData.set_pressTime(time) + + if node.nodeName == 'keyType': + keyType = node.childNodes[0].nodeValue + KpdData.set_keyType(keyType) + + return True + + def parse(self, node): + self.get_cfgInfo() + self.read(node) + + def gen_files(self): + ModuleObj.gen_files(self) + + def gen_spec(self, para): + ModuleObj.gen_spec(self, para) + + + def fill_hFile(self): + gen_str = '''#include \n''' + gen_str += '''#include \n''' + gen_str += '''\n''' + gen_str += '''#define KPD_YES\t\t1\n''' + gen_str += '''#define KPD_NO\t\t0\n''' + gen_str += '''\n''' + gen_str += '''/* available keys (Linux keycodes) */\n''' + gen_str += '''#define KEY_CALL\t\tKEY_SEND\n''' + gen_str += '''#define KEY_ENDCALL\tKEY_END\n''' + gen_str += '''#undef KEY_OK\n''' + gen_str += '''#define KEY_OK\t\tKEY_REPLY /* DPAD_CENTER */\n''' + gen_str += '''#define KEY_FOCUS\tKEY_HP\n''' + gen_str += '''#define KEY_AT\t\tKEY_EMAIL\n''' + gen_str += '''#define KEY_POUND\t228\t//KEY_KBDILLUMTOGGLE\n''' + gen_str += '''#define KEY_STAR\t227\t//KEY_SWITCHVIDEOMODE\n''' + gen_str += '''#define KEY_DEL\t\tKEY_BACKSPACE\n''' + gen_str += '''#define KEY_SYM\t\tKEY_COMPOSE\n''' + gen_str += '''\n''' + gen_str += '''#define KPD_KEY_DEBOUNCE\t%d\n''' %(KpdData.get_pressTime()) + gen_str += '''#define KPD_PWRKEY_MAP\tKEY_%s\n''' %(KpdData.get_utility()) + # do not gen this macro if the home key is null + if KpdData.get_homeKey() != '': + gen_str += '''#define KPD_PMIC_RSTKEY_MAP\tKEY_%s\n''' %(KpdData.get_homeKey()) + if cmp(KpdData.get_keyType(), 'EXTEND_TYPE') != 0: + gen_str += '''#define MTK_PMIC_PWR_KEY\t%d\n''' %(KpdData.get_col() - 1) + if KpdData.get_homeKey() != '': + gen_str += '''#define MTK_PMIC_RST_KEY\t\t%d\n''' %(2*KpdData.get_col() - 1) + gen_str += '''\n''' + gen_str += '''#define KPD_USE_EXTEND_TYPE\tKPD_NO\n''' + else: + gen_str += '''#define MTK_PMIC_PWR_KEY\t%d\n''' %(KpdData.get_col_ext() - 1) + if KpdData.get_keyType() != '': + gen_str += '''#define MTK_PMIC_RST_KEY\t\t%d\n''' %(2*KpdData.get_col_ext() - 1) + gen_str += '''\n''' + gen_str += '''#define KPD_USE_EXTEND_TYPE\tKPD_YES\n''' + gen_str += '''\n''' + gen_str += '''/* HW keycode [0 ~ 71] -> Linux keycode */\n''' + gen_str += '''#define KPD_INIT_KEYMAP()\t\\\n''' + gen_str += '''{\t\\\n''' + + + if KpdData.get_keyType() == 'NORMAL_TYPE': + for key in KpdData.get_matrix(): + if cmp(key, 'NC') != 0: + gen_str += '''\t[%d] = KEY_%s,\t\\\n''' %(KpdData.get_matrix().index(key), key) + else: + for key in KpdData.get_matrix_ext(): + if cmp(key, 'NC') != 0: + gen_str += '''\t[%d] = KEY_%s,\t\\\n''' %(KpdData.get_matrix_ext().index(key), key) + + gen_str += '''}\n''' + gen_str += '''\n''' + + gen_str += '''/***********************************************************/\n''' + gen_str += '''/****************Preload Customation************************/\n''' + gen_str += '''/***********************************************************/\n''' + gen_str += '''#define KPD_PWRKEY_EINT_GPIO\tGPIO%d\n''' %(KpdData.get_gpioNum()) + gen_str += '''#define KPD_PWRKEY_GPIO_DIN\t%d\n''' %(int(KpdData.get_gpioDinHigh())) + gen_str += '''\n''' + + for key in KpdData.get_downloadKeys(): + if cmp(key, 'NC') != 0: + dlIdx = KpdData.get_downloadKeys().index(key) + mtxIdx = self.get_matrixIdx(key) + gen_str += '''#define KPD_DL_KEY%d\t%d\t/* KEY_%s */\n''' %(dlIdx+1, mtxIdx, key) + gen_str += '''\n''' + + gen_str += '''/***********************************************************/\n''' + gen_str += '''/****************Uboot Customation**************************/\n''' + gen_str += '''/***********************************************************/\n''' + + for (key, value) in KpdData.get_modeKeys().items(): + if cmp(value, 'NC') != 0: + idx = self.get_matrixIdx(value) + #idx = KpdData.get_matrix().index(value) + gen_str += '''#define MT65XX_%s_KEY\t%d\t/* KEY_%s */\n''' %(key, idx, value) + + gen_str += '''\n''' + + return gen_str + + def get_matrixIdx(self, value): + if KpdData.get_keyType() == 'NORMAL_TYPE': + if cmp(value, 'POWER') == 0: + return KpdData.get_col() - 1 + elif cmp(value, KpdData.get_homeKey()) == 0: + return 2 * KpdData.get_col() - 1 + else: + return KpdData.get_matrix().index(value) + elif KpdData.get_keyType() == 'EXTEND_TYPE': + if cmp(value, 'POWER') == 0: + return KpdData.get_col_ext() - 1 + elif cmp(value, KpdData.get_homeKey()) == 0: + return 2 * KpdData.get_col_ext() - 1 + else: + return KpdData.get_matrix_ext().index(value) + + def fill_dtsiFile(self): + gen_str = '''&keypad {\n''' + gen_str += '''\tmediatek,kpd-key-debounce = <%d>;\n''' %(KpdData.get_pressTime()) + gen_str += '''\tmediatek,kpd-sw-pwrkey = <%d>;\n''' %(KpdData._keyValueMap[KpdData.get_utility()]) + if KpdData.get_keyType() == 'NORMAL_TYPE': + gen_str += '''\tmediatek,kpd-hw-pwrkey = <%d>;\n''' %(KpdData.get_col()-1) + else: + gen_str += '''\tmediatek,kpd-hw-pwrkey = <%d>;\n''' %(KpdData.get_col_ext()-1) + + #gen_str += '''\tmediatek,kpd-sw-rstkey = <%d>;\n''' %(KpdData._keyValueMap[KpdData.get_homeKey()]) + if KpdData.get_homeKey() != '': + gen_str += '''\tmediatek,kpd-sw-rstkey = <%d>;\n''' %(KpdData.get_keyVal(KpdData.get_homeKey())) + if KpdData.get_keyType() == 'NORMAL_TYPE': + if KpdData.get_homeKey() != '': + gen_str += '''\tmediatek,kpd-hw-rstkey = <%d>;\n''' %(2*KpdData.get_col() - 1) + gen_str += '''\tmediatek,kpd-use-extend-type = <0>;\n''' + else: + if KpdData.get_homeKey() != '': + gen_str += '''\tmediatek,kpd-hw-rstkey = <%d>;\n''' %(2*KpdData.get_col_ext() - 1) + gen_str += '''\tmediatek,kpd-use-extend-type = <1>;\n''' + + #gen_str += '''\tmediatek,kpd-use-extend-type = <0>;\n''' + gen_str += '''\t/*HW Keycode [0~%d] -> Linux Keycode*/\n''' %(KpdData.get_row() * KpdData.get_col() - 1) + gen_str += '''\tmediatek,kpd-hw-map-num = <%d>;\n''' %(KpdData.get_row() * KpdData.get_col()) + gen_str += '''\tmediatek,kpd-hw-init-map = <''' + + if KpdData.get_keyType() == 'NORMAL_TYPE': + for key in KpdData.get_matrix(): + idx = KpdData._keyValueMap[key] + gen_str += '''%d ''' %(idx) + else: + for key in KpdData.get_matrix_ext(): + idx = KpdData._keyValueMap[key] + gen_str += '''%d ''' %(idx) + + gen_str.rstrip() + gen_str += '''>;\n''' + gen_str += '''\tmediatek,kpd-pwrkey-eint-gpio = <%d>;\n''' %(KpdData.get_gpioNum()) + gen_str += '''\tmediatek,kpd-pwkey-gpio-din = <%d>;\n''' %(int(KpdData.get_gpioDinHigh())) + for key in KpdData.get_downloadKeys(): + if cmp(key, 'NC') == 0: + continue + gen_str += '''\tmediatek,kpd-hw-dl-key%d = <%s>;\n''' %(KpdData.get_downloadKeys().index(key), self.get_matrixIdx(key)) + + for (key, value) in KpdData.get_modeKeys().items(): + if cmp(value, 'NC') == 0: + continue + gen_str += '''\tmediatek,kpd-hw-%s-key = <%d>;\n''' %(key.lower(), self.get_matrixIdx(value)) + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str + + + + + + diff --git a/tools/dct/obj/Md1EintObj.py b/tools/dct/obj/Md1EintObj.py new file mode 100755 index 000000000000..30044c434278 --- /dev/null +++ b/tools/dct/obj/Md1EintObj.py @@ -0,0 +1,241 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import ConfigParser +import string +import xml.dom.minidom +from itertools import dropwhile +import re + +from utility import util +from utility.util import sorted_key +from ModuleObj import ModuleObj +from data.Md1EintData import Md1EintData +from utility.util import LogLevel + +class Md1EintObj(ModuleObj): + def __init__(self): + ModuleObj.__init__(self, 'cust_eint_md1.h', 'cust_md1_eint.dtsi') + self.__srcPin = {} + self.__bSrcPinEnable = True + + def get_cfgInfo(self): + # ConfigParser accept ":" and "=", so SRC_PIN will be treated specially + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_figPath()) + + if cp.has_option('Chip Type', 'MD1_EINT_SRC_PIN'): + flag = cp.get('Chip Type', 'MD1_EINT_SRC_PIN') + if flag == '0': + self.__bSrcPinEnable = False + + if(self.__bSrcPinEnable): + #for option in cp.options('SRC_PIN'): + #value = cp.get('SRC_PIN', option) + #value = value[1:] + #temp = value.split('=') + #self.__srcPin[temp[0]] = temp[1] + + with open(ModuleObj.get_figPath()) as file: + src_pin_expr = r"^.+\s*::\s*(\w+)\s*=\s*(\w+)\s*$" + reg = re.compile(src_pin_expr) + for line in dropwhile(lambda line: not line.lstrip().startswith("[SRC_PIN]"), file): + match_obj = reg.match(line) + if match_obj: + self.__srcPin[match_obj.group(1)] = match_obj.group(2) + else: + self.__srcPin[''] = '-1' + + def read(self, node): + nodes = node.childNodes + try: + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if cmp(node.nodeName, 'count') == 0: + self.__count = node.childNodes[0].nodeValue + continue + + varNode = node.getElementsByTagName('varName') + detNode = node.getElementsByTagName('debounce_time') + polNode = node.getElementsByTagName('polarity') + senNode = node.getElementsByTagName('sensitive_level') + deeNode = node.getElementsByTagName('debounce_en') + dedNode = node.getElementsByTagName('dedicated_en') + srcNode = node.getElementsByTagName('srcPin') + sktNode = node.getElementsByTagName('socketType') + + data = Md1EintData() + if len(varNode): + data.set_varName(varNode[0].childNodes[0].nodeValue) + if len(detNode): + data.set_debounceTime(detNode[0].childNodes[0].nodeValue) + if len(polNode): + data.set_polarity(polNode[0].childNodes[0].nodeValue) + if len(senNode): + data.set_sensitiveLevel(senNode[0].childNodes[0].nodeValue) + if len(deeNode): + data.set_debounceEnable(deeNode[0].childNodes[0].nodeValue) + if len(dedNode): + data.set_dedicatedEn(dedNode[0].childNodes[0].nodeValue) + if len(srcNode) and len(srcNode[0].childNodes): + data.set_srcPin(srcNode[0].childNodes[0].nodeValue) + if len(sktNode) and len(sktNode[0].childNodes): + data.set_socketType(sktNode[0].childNodes[0].nodeValue) + + ModuleObj.set_data(self, node.nodeName, data) + except: + msg = 'read md1_eint content fail!' + util.log(LogLevel.error, msg) + return False + + return True + + def parse(self, node): + self.get_cfgInfo() + self.read(node) + + def gen_files(self): + ModuleObj.gen_files(self) + + def fill_hFile(self): + gen_str = '' + gen_str += '''#define CUST_EINT_MD_LEVEL_SENSITIVE\t\t0\n''' + gen_str += '''#define CUST_EINT_MD_EDGE_SENSITIVE\t\t1\n''' + + gen_str += '''\n''' + + if self.__bSrcPinEnable: + for (key, value) in self.__srcPin.items(): + gen_str += '''#define %s\t\t%s\n''' %(key, value) + gen_str += '''\n''' + + gen_str += '''#define CUST_EINT_POLARITY_LOW\t\t0\n''' + gen_str += '''#define CUST_EINT_POLARITY_HIGH\t\t1\n''' + gen_str += '''\n''' + + gen_str += '''#define CUST_EINT_LEVEL_SENSITIVE\t\t0\n''' + gen_str += '''#define CUST_EINT_EDGE_SENSITIVE\t\t1\n''' + gen_str += '''\n''' + + count = 0 + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if cmp(value.get_varName(), 'NC') == 0: + continue + num = key[4:] + count += 1 + gen_str += '''#define CUST_EINT_MD1_%s_NAME\t\t\t"%s"\n''' %(num, value.get_varName()) + gen_str += '''#define CUST_EINT_MD1_%s_NUM\t\t\t%s\n''' %(num, num) + gen_str += '''#define CUST_EINT_MD1_%s_DEBOUNCE_CN\t\t%s\n''' %(num, value.get_debounceTime()) + gen_str += '''#define CUST_EINT_MD1_%s_POLARITY\t\tCUST_EINT_POLARITY_%s\n''' %(num, value.get_polarity().upper()) + gen_str += '''#define CUST_EINT_MD1_%s_SENSITIVE\t\tCUST_EINT_MD_%s_SENSITIVE\n''' %(num, value.get_sensitiveLevel().upper()) + gen_str += '''#define CUST_EINT_MD1_%s_DEBOUNCE_EN\t\tCUST_EINT_DEBOUNCE_%s\n''' %(num, value.get_debounceEnable().upper()) + gen_str += '''#define CUST_EINT_MD1_%s_DEDICATED_EN\t\t%s\n''' %(num, int(value.get_dedicatedEn())) + if self.__bSrcPinEnable: + gen_str += '''#define CUST_EINT_MD1_%s_SRCPIN\t\t\t%s\n''' %(num, value.get_srcPin()) + gen_str += '''\n''' + + gen_str += '''#define CUST_EINT_MD1_CNT\t\t\t%d\n''' %(count) + + return gen_str + + + def fill_dtsiFile(self): + gen_str = '' + gen_str += '''&eintc {\n''' + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if cmp(value.get_varName(), 'NC') == 0: + continue + num = key[4:] + gen_str += '''\t%s@%s {\n''' %(value.get_varName(), num) + gen_str += '''\t\tcompatible = \"mediatek,%s-eint\";\n''' %(value.get_varName()) + + type = 1 + polarity = value.get_polarity() + sensitive = value.get_sensitiveLevel() + + if cmp(polarity, 'High') == 0 and cmp(sensitive, 'Edge') == 0: + type = 1 + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Edge') == 0: + type = 2 + elif cmp(polarity, 'High') == 0 and cmp(sensitive, 'Level') == 0: + type = 4 + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Level') == 0: + type = 8 + + gen_str += '''\t\tinterrupts = <%s %d>;\n''' %(num, type) + gen_str += '''\t\tdebounce = <%s %d>;\n''' %(num, (string.atoi(value.get_debounceTime()))*1000) + gen_str += '''\t\tdedicated = <%s %d>;\n''' %(num, int(value.get_dedicatedEn())) + if self.__bSrcPinEnable: + gen_str += '''\t\tsrc_pin = <%s %s>;\n''' %(num, self.__srcPin[value.get_srcPin()]) + else: + gen_str += '''\t\tsrc_pin = <%s %s>;\n''' %(num, -1) + gen_str += '''\t\tsockettype = <%s %s>;\n''' %(num, value.get_socketType()) + gen_str += '''\t\tstatus = \"okay\";\n''' + gen_str += '''\t};\n''' + + gen_str += '''\n''' + + gen_str += '''};\n''' + + return gen_str + + def get_srcPin(self): + return self.__srcPin + + def get_srcPinEnable(self): + return self.__bSrcPinEnable + +class Md1EintObj_MT6739(Md1EintObj): + def __init__(self): + Md1EintObj.__init__(self) + + def fill_dtsiFile(self): + gen_str = '' + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if cmp(value.get_varName(), 'NC') == 0: + continue + num = key[4:] + gen_str += '''&%s {\n''' % (value.get_varName().lower()) + gen_str += '''\tcompatible = \"mediatek,%s-eint\";\n''' % (value.get_varName().lower()) + + type = 1 + polarity = value.get_polarity() + sensitive = value.get_sensitiveLevel() + + if cmp(polarity, 'High') == 0 and cmp(sensitive, 'Edge') == 0: + type = 1 + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Edge') == 0: + type = 2 + elif cmp(polarity, 'High') == 0 and cmp(sensitive, 'Level') == 0: + type = 4 + elif cmp(polarity, 'Low') == 0 and cmp(sensitive, 'Level') == 0: + type = 8 + + gen_str += '''\tinterrupts = <%s %d>;\n''' % (num, type) + gen_str += '''\tdebounce = <%s %d>;\n''' % (num, (string.atoi(value.get_debounceTime())) * 1000) + gen_str += '''\tdedicated = <%s %d>;\n''' % (num, int(value.get_dedicatedEn())) + if self.get_srcPinEnable(): + gen_str += '''\tsrc_pin = <%s %s>;\n''' % (num, self.get_srcPin()[value.get_srcPin()]) + else: + gen_str += '''\tsrc_pin = <%s %s>;\n''' % (num, -1) + gen_str += '''\tsockettype = <%s %s>;\n''' % (num, value.get_socketType()) + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + gen_str += '''\n''' + + return gen_str \ No newline at end of file diff --git a/tools/dct/obj/ModuleObj.py b/tools/dct/obj/ModuleObj.py new file mode 100755 index 000000000000..687e26f05314 --- /dev/null +++ b/tools/dct/obj/ModuleObj.py @@ -0,0 +1,158 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import os, sys +import time +import re +import string + +from utility import version +from utility.util import log +from utility.util import LogLevel + +class ModuleObj: + _chip_id = '' + _gen_path = '' + + def __init__(self, name1, name2): + self.__hName = name1 + self.__dtsiName = name2 + self.__data = {} + + def get_hFileName(self): + return self.__hName + + def get_dtsiFileName(self): + return self.__dtsiName + + def get_cfgInfo(self, section): + pass + + def set_data(self, key, value): + self.__data[key] = value + + def get_data(self): + return self.__data + + def gen_files(self): + self.gen_hFile() + self.gen_dtsiFile() + + + def gen_hFile(self): + fp = open(os.path.join(ModuleObj.get_genPath(), ModuleObj.get_hFileName(self)), 'w') + gen_str = '' + gen_str += ModuleObj.writeComment() + gen_str += ModuleObj.writeHeader(ModuleObj.get_hFileName(self)) + gen_str += self.fill_hFile() + gen_str += ModuleObj.writeTail(ModuleObj.get_hFileName(self)) + fp.write(gen_str) + fp.close() + + + def gen_dtsiFile(self): + fp = open(os.path.join(ModuleObj.get_genPath(), ModuleObj.get_dtsiFileName(self)), 'w') + gen_str = '' + gen_str = ModuleObj.writeComment() + gen_str += ModuleObj.writeHeader(ModuleObj.get_dtsiFileName(self)) + gen_str += self.fill_dtsiFile() + fp.write(gen_str) + fp.close() + + def gen_spec(self, para): + if re.match(r'.*_h$', para): + self.gen_hFile() + elif re.match(r'.*_dtsi', para): + self.gen_dtsiFile() + elif re.match(r'.*_c', para): + self.gen_cFile() + + @staticmethod + def get_figPath(): + figPath = os.path.join(sys.path[0], 'config', ModuleObj.get_chipId() + '.fig') + if not os.path.exists(figPath) or not os.path.isfile(figPath): + log(LogLevel.error, 'Can not find %s.fig file!' %(ModuleObj.get_chipId())) + sys.exit(-1) + + return figPath + + @staticmethod + def get_cmpPath(): + cmpPath = os.path.join(sys.path[0], 'config', 'YuSu.cmp') + + if not os.path.exists(cmpPath) or not os.path.isfile(cmpPath): + log(LogLevel.error, 'Can not find YuSu.cmp file!') + sys.exit(-1) + + return cmpPath + + @staticmethod + def get_chipId(): + return ModuleObj._chip_id + + @staticmethod + def set_chipId(id): + ModuleObj._chip_id = id + + @staticmethod + def set_genPath(path): + ModuleObj._gen_path = path + + @staticmethod + def get_genPath(): + return ModuleObj._gen_path + + @staticmethod + def writeComment(): + stamp = time.strftime("%Y-%m-%d %H:%M:%S", time.localtime()) + ver_info = version.VER_MAIN + '.' + version.VER_SUB + '.' + version.BUILD_SN + + gen_str = '''/*\n * Generated by MTK SP DrvGen Version: ''' + gen_str += ver_info + gen_str += ''' for ''' + gen_str += ModuleObj.get_chipId() + gen_str += '''.\n''' + gen_str += ''' * ''' + gen_str += stamp + gen_str += '''\n * Do Not Modify The File.\n''' + gen_str += ''' * Copyright Mediatek Inc. (c) 2016.\n*/\n\n''' + + return gen_str + + @staticmethod + def writeHeader(name): + str = '' + if re.match(r'.*\.h$', name): + name = string.replace(name, '.', '_') + name = string.replace(name, '-', '_') + str += '''#ifndef __%s\n''' %(name.upper()) + str += '''#define __%s\n''' %(name.upper()) + str += '''\n''' + elif re.match(r'.*\.dtsi$', name): + str += '''/*************************\n''' + str += ''' * %s File\n''' %(name.replace('cust_', '').replace('.', ' ').upper()) + str += '''*************************/\n\n''' + + return str + + @staticmethod + def writeTail(name): + if re.match(r'.*\.h$', name): + gen_str = '''\n\n#endif /* %s */\n''' %('__' + string.replace(name, '.', '_').upper()) + return gen_str + + + + + diff --git a/tools/dct/obj/PmicObj.py b/tools/dct/obj/PmicObj.py new file mode 100755 index 000000000000..2414c00bd7d5 --- /dev/null +++ b/tools/dct/obj/PmicObj.py @@ -0,0 +1,284 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import sys, os +import re +import ConfigParser +import xml.dom.minidom + +from ModuleObj import ModuleObj +from data.PmicData import PmicData + +from utility.util import log +from utility.util import LogLevel +from utility.util import compare +from utility.util import sorted_key + + +class PmicObj(ModuleObj): + def __init__(self): + ModuleObj.__init__(self, 'pmic_drv.h', 'cust_pmic.dtsi') + self.__fileName = 'pmic_drv.c' + self.__chipName = '' + self.__defLdo = '' + self.__appCount = -1 + self.__func = '' + self.__paraList = [] + self.__headerList = [] + + + def get_cfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_cmpPath()) + + PmicData._var_list = cp.options('APPLICATION') + + if self.__chipName == '': + return + #parse the pmic config file + cmpPath = os.path.join(sys.path[0], 'config', self.__chipName + '.cmp') + if not os.path.exists(cmpPath) or not os.path.isfile(cmpPath): + log(LogLevel.error, 'Can not find %s pmic config file!' %(self.__chipName)) + sys.exit(-1) + cp.read(cmpPath) + self.__defLdo = cp.get('PMIC_TABLE', 'LDO_APPNAME_DEFAULT') + self.__headerList = cp.get('PMIC_TABLE', 'INCLUDE_HEADER').split(':') + self.__func = cp.get('PMIC_TABLE', 'FUNCTION') + + for i in range(1, cp.getint('PMIC_TABLE', 'NUM_LDO')+1): + key = 'LDO_NAME%d' %(i) + self.__paraList.append(cp.get(key, 'PARAMETER_NAME')) + + #parse app count in fig file + cp.read(ModuleObj.get_chipId() + '.fig') + + cp.read(ModuleObj.get_figPath()) + self.__appCount = cp.getint('Chip Type', 'PMIC_APP_COUNT') + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if cmp(node.nodeName, 'chip') == 0: + if len(node.childNodes) == 0: + break + self.__chipName = node.childNodes[0].nodeValue + continue + if cmp(node.nodeName, 'count') == 0: + continue + ldoNode = node.getElementsByTagName('ldoVar') + defNode = node.getElementsByTagName('defEn') + + data = PmicData() + if len(ldoNode): + data.set_ldoName(ldoNode[0].childNodes[0].nodeValue) + + if len(defNode): + number = -1 + if cmp(defNode[0].childNodes[0].nodeValue, 'SKIP') == 0: + number = 0 + elif cmp(defNode[0].childNodes[0].nodeValue, 'OFF') == 0: + number = 1 + else: + number = 2 + data.set_defEnable(number) + + name_list = [] + for i in range(0, 6): + key = 'varName%d' %(i) + nameNode = node.getElementsByTagName(key) + if len(nameNode): + name_list.append(nameNode[0].childNodes[0].nodeValue) + + data.set_nameList(name_list) + + ModuleObj.set_data(self, node.nodeName, data) + + return True + + def parse(self, node): + self.read(node) + self.get_cfgInfo() + + def gen_files(self): + ModuleObj.gen_files(self) + self.gen_cFile() + + def gen_cFile(self): + fp = open(os.path.join(ModuleObj.get_genPath(), self.__fileName), 'w') + gen_str = '' + gen_str += ModuleObj.writeComment() + gen_str += self.fill_cFile() + fp.write(gen_str) + fp.close() + + + def fill_hFile(self): + gen_str = '' + used = [] + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + for name in value.get_nameList(): + if name.strip() != '': + used.append(name) + gen_str += '''#define PMIC_APP_%s\t\t\t%s_POWER_LDO_%s\n''' %(name, self.__chipName[5:11], value.get_ldoName()) + + + gen_str += '''\n''' + + gen_str += '''/**********Output default name********************/\n''' + + for varName in PmicData._var_list: + if not varName.upper() in used: + gen_str += '''#define PMIC_APP_%s\t\t\t%s\n''' %(varName.upper(), self.__defLdo) + + return gen_str + + + def fill_dtsiFile(self): + gen_str = '' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + gen_str += '''&mt_pmic_%s_ldo_reg {\n''' %(value.get_ldoName().lower()) + gen_str += '''\tregulator-name = \"%s\";\n''' %((value.get_ldoName().replace('_', '')).lower()) + gen_str += '''\tregulator-default-on = <%d>; /* 0:skip, 1: off, 2:on */\n''' %(value.get_defEnable()) + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + gen_str += '''\n''' + gen_str += '''&kd_camera_hw1 {\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + for varName in value.get_nameList(): + #for i in range(0, self.__appCount): + bExisted = False + postFix = '' + #varName = value.get_nameList()[i] + if varName.find('CAMERA') != -1: + postFix = varName[varName.rfind('_')+1:] + bExisted = True + + if varName.find('MAIN_CAMERA') != -1: + gen_str += '''\tvcam%s-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + + if varName.find('SUB_CAMERA') != -1: + gen_str += '''\tvcam%s_main2-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + gen_str += '''\tvcam%s_sub-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + + #if bExisted == True: + #gen_str += '''\n''' + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n\n''' + gen_str += '''&touch {\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + for name in value.get_nameList(): + if name.find('TOUCH') != -1: + gen_str += '''\tvtouch-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(value.get_ldoName().lower()) + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str + + def fill_cFile(self): + gen_str = '' + for header in self.__headerList: + gen_str += '''#include <%s>\n''' %(header) + + gen_str += '''\n''' + gen_str += '''void pmu_drv_tool_customization_init(void)\n''' + gen_str += '''{\n''' + idx = 0 + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if value.get_defEnable() != 0: + gen_str += '''\t%s(%s,%d);\n''' %(self.__func, self.__paraList[idx], value.get_defEnable()-1) + idx += 1 + gen_str += '''}\n''' + + return gen_str + +class PmicObj_MT6758(PmicObj): + def __init__(self): + PmicObj.__init__(self) + + def parse(self, node): + PmicObj.parse(self, node) + + def gen_files(self): + PmicObj.gen_files(self) + + def gen_spec(self, para): + PmicObj.gen_spec(self, para) + + def fill_dtsiFile(self): + gen_str = '' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + gen_str += '''&mt_pmic_%s_ldo_reg {\n''' %(value.get_ldoName().lower()) + gen_str += '''\tregulator-name = \"%s\";\n''' %((value.get_ldoName().replace('_', '')).lower()) + gen_str += '''\tregulator-default-on = <%d>; /* 0:skip, 1: off, 2:on */\n''' %(value.get_defEnable()) + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + gen_str += '''\n''' + gen_str += '''&kd_camera_hw1 {\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + for varName in value.get_nameList(): + #for i in range(0, self.__appCount): + bExisted = False + postFix = '' + #varName = value.get_nameList()[i] + if varName.find('CAMERA') != -1: + postFix = varName[varName.rfind('_')+1:] + bExisted = True + + if varName.find('MAIN_CAMERA_3') != -1: + gen_str += '''\tvcam%s_main3-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + elif varName.find('MAIN_CAMERA_2') != -1: + gen_str += '''\tvcam%s_main2-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + elif varName.find('MAIN_CAMERA') != -1: + gen_str += '''\tvcam%s-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + elif varName.find('SUB_CAMERA_2') != -1: + gen_str += '''\tvcam%s_sub2-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + elif varName.find('SUB_CAMERA') != -1: + #gen_str += '''\tvcam%s_main2-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + gen_str += '''\tvcam%s_sub-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(postFix.lower(), value.get_ldoName().lower()) + + #if bExisted == True: + #gen_str += '''\n''' + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n\n''' + gen_str += '''&touch {\n''' + + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + for name in value.get_nameList(): + if name.find('TOUCH') != -1: + gen_str += '''\tvtouch-supply = <&mt_pmic_%s_ldo_reg>;\n''' %(value.get_ldoName().lower()) + + gen_str += '''\tstatus = \"okay\";\n''' + gen_str += '''};\n''' + + return gen_str diff --git a/tools/dct/obj/PowerObj.py b/tools/dct/obj/PowerObj.py new file mode 100755 index 000000000000..6cff9bf5d8f8 --- /dev/null +++ b/tools/dct/obj/PowerObj.py @@ -0,0 +1,85 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import sys,os +import re +import string +import ConfigParser +import xml.dom.minidom + +import ChipObj +from data.PowerData import PowerData +from utility.util import log +from utility.util import LogLevel +from utility.util import sorted_key +from ModuleObj import ModuleObj + +class PowerObj(ModuleObj): + def __init__(self): + ModuleObj.__init__(self, 'cust_power.h', 'cust_power.dtsi') + self.__list = {} + + def getCfgInfo(self): + cp = ConfigParser.ConfigParser(allow_no_value=True) + cp.read(ModuleObj.get_figPath()) + + self.__list = cp.options('POWER') + self.__list = self.__list[1:] + self.__list = sorted(self.__list) + + def read(self, node): + nodes = node.childNodes + for node in nodes: + if node.nodeType == xml.dom.Node.ELEMENT_NODE: + if node.nodeName == 'count': + continue + + varNode = node.getElementsByTagName('varName') + + data = PowerData() + data.set_varName(varNode[0].childNodes[0].nodeValue) + + ModuleObj.set_data(self, node.nodeName, data) + + return True + + def parse(self, node): + self.getCfgInfo() + self.read(node) + + def gen_files(self): + ModuleObj.gen_files(self) + + def gen_spec(self, para): + if re.match(r'.*_h$', para): + self.gen_hFile() + + # power module has no DTSI file + def gen_dtsiFile(self): + pass + + def fill_hFile(self): + gen_str = '' + for key in sorted_key(ModuleObj.get_data(self).keys()): + value = ModuleObj.get_data(self)[key] + if value.get_varName() == '': + continue + idx = string.atoi(key[5:]) + name = self.__list[idx] + gen_str += '''#define GPIO_%s\t\tGPIO_%s\n''' %(name.upper(), value.get_varName()) + + return gen_str + + def fill_dtsiFile(self): + return '' diff --git a/tools/dct/obj/__init__.py b/tools/dct/obj/__init__.py new file mode 100755 index 000000000000..e35c0144ba90 --- /dev/null +++ b/tools/dct/obj/__init__.py @@ -0,0 +1,10 @@ +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. diff --git a/tools/dct/utility/__init__.py b/tools/dct/utility/__init__.py new file mode 100755 index 000000000000..e35c0144ba90 --- /dev/null +++ b/tools/dct/utility/__init__.py @@ -0,0 +1,10 @@ +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. diff --git a/tools/dct/utility/util.py b/tools/dct/utility/util.py new file mode 100755 index 000000000000..5b33d4b2b759 --- /dev/null +++ b/tools/dct/utility/util.py @@ -0,0 +1,53 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +import re +import string + + +LEVEL_INFO = '[DCT_INFO]: ' +LEVEL_WARN = '[DCT_WARNING]: ' +LEVEL_ERROR = '[DCT_ERROR]: ' + +class LogLevel: + info = 1 + warn = 2 + error = 3 + +CURRENT_LEVEL = LogLevel.error + +def log(level, msg): + if level >= CURRENT_LEVEL: + if level == LogLevel.info: + print LEVEL_INFO + msg + elif level == LogLevel.warn: + print LEVEL_WARN + msg + elif level == LogLevel.error: + print LEVEL_ERROR + msg + +def set_level(value): + CURRENT_LEVEL = value + +def compare(value): + lst = re.findall(r'\d+', value) + if len(lst) != 0: + return string.atoi(lst[0]) + + # if can not find numbers + return value + +def sorted_key(lst): + return sorted(lst, key=compare) + + diff --git a/tools/dct/utility/version.py b/tools/dct/utility/version.py new file mode 100755 index 000000000000..71fb9886087e --- /dev/null +++ b/tools/dct/utility/version.py @@ -0,0 +1,17 @@ +#! /usr/bin/python +# -*- coding: utf-8 -*- + +# Copyright (C) 2016 MediaTek Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See http://www.gnu.org/licenses/gpl-2.0.html for more details. + +VER_MAIN = '3' +VER_SUB = '5' +BUILD_SN = '160809'