ARM-software · CheMax-Tag · Mar 11, 2021 · Mar 11, 2021 · Mar 11, 2021 · Mar 11, 2021
diff --git a/CMSIS/Core/Include/cachel1_armv7.h b/CMSIS/Core/Include/cachel1_armv7.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     cachel1_armv7.h
  * @brief    CMSIS Level 1 Cache API for Armv7-M and later
- * @version  V1.0.0
- * @date     03. March 2020
+ * @version  V1.0.1
+ * @date     11. March 2021
  ******************************************************************************/
 /*
- * Copyright (c) 2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -31,6 +31,10 @@
 #ifndef ARM_CACHEL1_ARMV7_H
 #define ARM_CACHEL1_ARMV7_H
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 /**
   \ingroup  CMSIS_Core_FunctionInterface
   \defgroup CMSIS_Core_CacheFunctions Cache Functions
@@ -408,4 +412,8 @@ __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int
 
 /*@} end of CMSIS_Core_CacheFunctions */
 
+#ifdef __cplusplus
+ }
+#endif
+
 #endif /* ARM_CACHEL1_ARMV7_H */
diff --git a/CMSIS/Core/Include/cmsis_armcc.h b/CMSIS/Core/Include/cmsis_armcc.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_armcc.h
  * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.3.0
- * @date     19. February 2021
+ * @version  V5.3.1
+ * @date     11. March 2021
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
@@ -25,6 +25,9 @@
 #ifndef __CMSIS_ARMCC_H
 #define __CMSIS_ARMCC_H
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
 
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
   #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
@@ -883,5 +886,8 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint
 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
 /*@} end of group CMSIS_SIMD_intrinsics */
 
+#ifdef __cplusplus
+ }
+#endif
 
 #endif /* __CMSIS_ARMCC_H */
diff --git a/CMSIS/Core/Include/cmsis_armclang.h b/CMSIS/Core/Include/cmsis_armclang.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_armclang.h
  * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V5.4.0
- * @date     19. February 2020
+ * @version  V5.4.1
+ * @date     11. March 2021
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
@@ -29,6 +29,10 @@
 
 #pragma clang system_header   /* treat file as system include file */
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 #ifndef __ARM_COMPAT_H
 #include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
 #endif
@@ -1485,5 +1489,8 @@ __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
 #endif /* (__ARM_FEATURE_DSP == 1) */
 /*@} end of group CMSIS_SIMD_intrinsics */
 
+#ifdef __cplusplus
+ }
+#endif
 
 #endif /* __CMSIS_ARMCLANG_H */
diff --git a/CMSIS/Core/Include/cmsis_armclang_ltm.h b/CMSIS/Core/Include/cmsis_armclang_ltm.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_armclang_ltm.h
  * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V1.5.0
- * @date     19. February 2021
+ * @version  V1.5.1
+ * @date     11. March 2021
  ******************************************************************************/
 /*
  * Copyright (c) 2018-2021 Arm Limited. All rights reserved.
@@ -29,6 +29,10 @@
 
 #pragma clang system_header   /* treat file as system include file */
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 #ifndef __ARM_COMPAT_H
 #include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
 #endif
@@ -1910,5 +1914,8 @@ __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
 #endif /* (__ARM_FEATURE_DSP == 1) */
 /*@} end of group CMSIS_SIMD_intrinsics */
 
+#ifdef __cplusplus
+ }
+#endif
 
 #endif /* __CMSIS_ARMCLANG_H */
diff --git a/CMSIS/Core/Include/cmsis_compiler.h b/CMSIS/Core/Include/cmsis_compiler.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_compiler.h
  * @brief    CMSIS compiler generic header file
- * @version  V5.1.0
- * @date     09. October 2018
+ * @version  V5.1.1
+ * @date     11. March 2021
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,6 +27,10 @@
 
 #include <stdint.h>
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 /*
  * Arm Compiler 4/5
  */
@@ -278,6 +282,9 @@
   #error Unknown compiler.
 #endif
 
+#ifdef __cplusplus
+ }
+#endif
 
 #endif /* __CMSIS_COMPILER_H */
 
diff --git a/CMSIS/Core/Include/cmsis_gcc.h b/CMSIS/Core/Include/cmsis_gcc.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_gcc.h
  * @brief    CMSIS compiler GCC header file
- * @version  V5.3.2
- * @date     25. January 2021
+ * @version  V5.3.3
+ * @date     11. March 2021
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
@@ -31,6 +31,10 @@
 #pragma GCC diagnostic ignored "-Wconversion"
 #pragma GCC diagnostic ignored "-Wunused-parameter"
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 /* Fallback for __has_builtin */
 #ifndef __has_builtin
   #define __has_builtin(x) (0)
@@ -2203,7 +2207,11 @@ __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
 #endif /* (__ARM_FEATURE_DSP == 1) */
 /*@} end of group CMSIS_SIMD_intrinsics */
 
+#ifdef __cplusplus
+ }
+#endif
 
 #pragma GCC diagnostic pop
 
+
 #endif /* __CMSIS_GCC_H */
diff --git a/CMSIS/Core/Include/cmsis_iccarm.h b/CMSIS/Core/Include/cmsis_iccarm.h
@@ -1,14 +1,14 @@
 /**************************************************************************//**
  * @file     cmsis_iccarm.h
  * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.2.0
- * @date     28. January 2020
+ * @version  V5.2.1
+ * @date     11. March 2021
  ******************************************************************************/
 
 //------------------------------------------------------------------------------
 //
-// Copyright (c) 2017-2020 IAR Systems
-// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
+// Copyright (c) 2017-2021 IAR Systems
+// Copyright (c) 2017-2021 Arm Limited. All rights reserved.
 //
 // SPDX-License-Identifier: Apache-2.0
 //
@@ -33,6 +33,10 @@
   #error This file should only be compiled by ICCARM
 #endif
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 #pragma system_include
 
 #define __IAR_FT _Pragma("inline=forced") __intrinsic
@@ -968,4 +972,8 @@ __packed struct  __iar_u32 { uint32_t v; };
 
 #define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3))
 
+#ifdef __cplusplus
+ }
+#endif
+
 #endif /* __CMSIS_ICCARM_H__ */
diff --git a/CMSIS/Core/Include/mpu_armv7.h b/CMSIS/Core/Include/mpu_armv7.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     mpu_armv7.h
  * @brief    CMSIS MPU API for Armv7-M MPU
- * @version  V5.1.2
- * @date     25. May 2020
+ * @version  V5.1.3
+ * @date     11. March 2021
  ******************************************************************************/
 /*
- * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -31,6 +31,10 @@
 #ifndef ARM_MPU_ARMV7_H
 #define ARM_MPU_ARMV7_H
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 #define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
 #define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
 #define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
@@ -272,4 +276,8 @@ __STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
   ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
 }
 
+#ifdef __cplusplus
+ }
+#endif
+
 #endif
diff --git a/CMSIS/Core/Include/mpu_armv8.h b/CMSIS/Core/Include/mpu_armv8.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     mpu_armv8.h
  * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU
- * @version  V5.1.2
- * @date     10. February 2020
+ * @version  V5.1.3
+ * @date     11. March 2021
  ******************************************************************************/
 /*
- * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -31,6 +31,10 @@
 #ifndef ARM_MPU_ARMV8_H
 #define ARM_MPU_ARMV8_H
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 /** \brief Attribute for device memory (outer only) */
 #define ARM_MPU_ATTR_DEVICE                           ( 0U )
 
@@ -348,5 +352,9 @@ __STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table
 }
 #endif
 
+#ifdef __cplusplus
+ }
+#endif
+
 #endif
 
diff --git a/CMSIS/Core/Include/pmu_armv8.h b/CMSIS/Core/Include/pmu_armv8.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     pmu_armv8.h
  * @brief    CMSIS PMU API for Armv8.1-M PMU
- * @version  V1.0.1
- * @date     15. April 2020
+ * @version  V1.0.2
+ * @date     11. March 2021
  ******************************************************************************/
 /*
- * Copyright (c) 2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -31,6 +31,10 @@
 #ifndef ARM_PMU_ARMV8_H
 #define ARM_PMU_ARMV8_H
 
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 /**
  * \brief PMU Events
  * \note  See the Armv8.1-M Architecture Reference Manual for full details on these PMU events.
@@ -334,4 +338,8 @@ __STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask)
   PMU->SWINC = mask;
 }
 
+#ifdef __cplusplus
+ }
+#endif
+
 #endif
diff --git a/CMSIS/Core/Include/tz_context.h b/CMSIS/Core/Include/tz_context.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     tz_context.h
  * @brief    Context Management for Armv8-M TrustZone
- * @version  V1.0.1
- * @date     10. January 2018
+ * @version  V1.0.2
+ * @date     11. March 2021
  ******************************************************************************/
 /*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -32,9 +32,15 @@
 #define TZ_CONTEXT_H
 
 #include <stdint.h>
-
+
+#ifdef  __cplusplus
+ extern "C"
+ {
+#endif
+
 #ifndef TZ_MODULEID_T
 #define TZ_MODULEID_T
+
 /// \details Data type that identifies secure software modules called by a process.
 typedef uint32_t TZ_ModuleId_t;
 #endif
@@ -67,4 +73,8 @@ uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
 /// \return execution status (1: success, 0: error)
 uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
 
+#ifdef  __cplusplus
+ }
+#endif
+
 #endif  // TZ_CONTEXT_H