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STM32H7: memory relocation #11562

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merged 3 commits into from
Sep 26, 2019
Merged

STM32H7: memory relocation #11562

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d241eef
STM32H7 : use RAM instead of DTCMRAM (IAR toolchain)
VVESTM Aug 22, 2019
ac30a70
STM32H7 : use RAM instead of DTCMRAM (ARM toolchain)
VVESTM Aug 29, 2019
82e89ad
STM32H7 : use RAM instead of DTCMRAM (GCC_ARM toolchain)
VVESTM Aug 29, 2019
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4 changes: 2 additions & 2 deletions ...RGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/startup_stm32h743xx.S
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Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
;*
;******************************************************************************

__initial_sp EQU 0x20020000 ; Top of RAM
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|

PRESERVE8
THUMB
Expand All @@ -36,7 +36,7 @@ __initial_sp EQU 0x20020000 ; Top of RAM
EXPORT __Vectors_End
EXPORT __Vectors_Size

__Vectors DCD __initial_sp ; Top of Stack
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
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6 changes: 3 additions & 3 deletions ...ets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/stm32h743xI.sct
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Expand Up @@ -44,12 +44,12 @@

#define MBED_RAM_START 0x24000000
#define MBED_RAM_SIZE 0x80000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_START 0x20000000
#define MBED_VECTTABLE_RAM_SIZE 0x298
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_START (MBED_RAM_START)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE)

LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region

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6 changes: 3 additions & 3 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld
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Expand Up @@ -19,8 +19,8 @@ M_CRASH_DATA_RAM_SIZE = 0x100;
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
DTCMRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x24000298, LENGTH = 512K - 0x298 /* end = 0x24080000 */
DTCMRAM (rwx) : ORIGIN = 0x20000298, LENGTH = 128K-0x298
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
Expand Down Expand Up @@ -108,7 +108,7 @@ SECTIONS
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM
} > DTCMRAM

.data : AT (__etext)
{
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10 changes: 5 additions & 5 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_IAR/stm32h743xI.icf
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Expand Up @@ -10,11 +10,11 @@ define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
// 512KB RAM (0x80000)
// Vector table dynamic copy: 166 vectors = 664 bytes (0x298) reserved
// Crash data area: 256 bytes (0x100) reserved
define symbol __NVIC_start__ = 0x24000000;
define symbol __NVIC_end__ = 0x24000297;
define symbol __region_CRASH_DATA_RAM_start__ = 0x24000298; // Aligned on 8 bytes
define symbol __region_CRASH_DATA_RAM_end__ = 0x24000397;
define symbol __region_RAM_start__ = 0x24000398; // Aligned on 8 bytes
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x20000297;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000298; // Aligned on 8 bytes
define symbol __region_CRASH_DATA_RAM_end__ = 0x20000397;
define symbol __region_RAM_start__ = 0x24000000; // Aligned on 8 bytes
define symbol __region_RAM_end__ = 0x24000000 + 0x80000 - 1;

// Memory regions
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