CMSIS-pack update for STM32WB-family #12162

JanneKiiskila · 2019-12-20T20:27:20Z

Update of the tools/arm_pack_manager/index.json -file for the
STM32WB-chipset family.

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)


[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers

@ARMmbed/team-st-mcd @jeromecoutant @adustm @adbridge @0xc0170

ciarmcom · 2019-12-20T22:00:42Z

@JanneKiiskila, thank you for your changes.
@0xc0170 @adbridge @jeromecoutant @ARMmbed/mbed-os-tools @ARMmbed/mbed-os-maintainers please review.

JanneKiiskila · 2019-12-22T15:50:49Z

I think this is now having the same root-cause as #11798
We have to either fix this issue or fix the automatically produced index.json manually.

tools/arm_pack_manager/index.json

0xc0170 · 2020-01-03T15:19:50Z

@jeromecoutant Once we fix the requested above, this looks like it can go in (we are not hitting the tools issue as other bigger updates) ?

felipeLeast · 2020-01-08T13:23:50Z

I still think it's missing sectors tag on the stm32wb family. When I compile without it I get an error.

JanneKiiskila · 2020-01-08T13:26:08Z

Yes, we seem to have an issue with the sectors information - it's not getting generated at all.

Update of the tools/arm_pack_manager/index.json -file for the STM32WB-chipset family.

Per feedback from STM the correct ROM size is 1 MB, instead of 16 MB. The KEIL source information is (in the pack itself) wrong, since the KEIL webpage lists it as a 16 MB part, too - but if you look into other sources - it is indeed 1 MB.

JanneKiiskila · 2020-01-08T14:55:40Z

According to reference manual, it has 1 MB of flash and it's divided evenly into 4 kilobyte blocks. A total of 255 of them. Doing the full sector layout for that, is some 512 lines of that sector info, which quite frankly does not make sense. Any proposal for "doing it in a better way"? @0xc0170 @kjbracey-arm @madchutney

0xc0170 · 2020-01-08T15:09:29Z

If we treat it as one block, are there limitations (cross boundary access or similar) ?

JanneKiiskila · 2020-01-08T17:29:30Z

If it's one block, likely passes this test but bootloader alignment/erase sector overlap checking (if it truly does something like that) will fail.

Adding manually the sector sizes now. The reference manual states these chips have a fairly nice memory map as sectors are evenly sized and fairly small. Quote from reference manual; "The Flash memory is organized as follows: • A main memory block containing 256 pages of 4 KB, each page with eight rows of 512 bytes." https://www.st.com/content/ccc/resource/technical/document/reference_manual/group0/83/cf/94/7a/35/a9/43/58/DM00318631/files/DM00318631.pdf/jcr:content/translations/en.DM00318631.pdf - chapter 3.3.1 Flash memory organization - internal flash starts at address 0x0800 0000

The size was still 16 megabytes, while in reality it is one megabyte. Added the sectors, too (see previous commit msg for details).

JanneKiiskila · 2020-01-08T20:03:12Z

Going with the senseless approach for now, I doubt we have any other quick solutions at hand now.
As this was manual work (in copy pasting the sector info, I did a Python script to generate them, but) - errors are likely to happen - so review carefully @ARMmbed/team-st-mcd .

0xc0170 · 2020-01-09T09:26:24Z

Started CI meanwhile

JanneKiiskila · 2020-01-09T09:27:54Z

Looking at the index.json and some of the sector infos there, it seems quite a few have opted on doing a "we'll do just one erase sector" -approach. I.e. it would simplify these quite a lot, if we had a rule / semantics that if flash size is X bytes and the sectors only has one element and it's size is <X bytes then it's a repeat thing, i.e.. all remaining erase sectors are the same size as the 1st one.

For the more peculiar cases (like with STM32F4) we should map out the whole sector set, as the sizes change. In those the total combined sector sizes should equal the total flash size.

mbed-ci · 2020-01-09T10:31:34Z

Test run: SUCCESS

Summary: 11 of 11 test jobs passed
Build number : 1
Build artifacts

0xc0170 · 2020-01-09T12:19:09Z

@ARMmbed/team-st-mcd Please review, if approved, this will be ready for merge

jeromecoutant

Quick parsing script:

STM32WB55CCUx : core Cortex-M4F rom 262144 (256 KB) ( 0x40000) at 0x8000000 ram1 131072 (128 KB) ( 0x20000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55CEUx : core Cortex-M4F rom 524288 (512 KB) ( 0x80000) at 0x8000000 ram1 262144 (256 KB) ( 0x40000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55CGUx : core Cortex-M4F rom 1048576 (1.0 MB) ( 0x100000) at 0x8000000 ram1 262144 (256 KB) ( 0x40000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55RCVx : core Cortex-M4F rom 262144 (256 KB) ( 0x40000) at 0x8000000 ram1 131072 (128 KB) ( 0x20000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55REVx : core Cortex-M4F rom 524288 (512 KB) ( 0x80000) at 0x8000000 ram1 262144 (256 KB) ( 0x40000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55RGVx : core Cortex-M4F rom 1048576 (1.0 MB) ( 0x100000) at 0x8000000 ram1 262144 (256 KB) ( 0x40000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55VCYx : core Cortex-M4F rom 262144 (256 KB) ( 0x40000) at 0x8000000 ram1 131072 (128 KB) ( 0x20000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55VEYx : core Cortex-M4F rom 524288 (512 KB) ( 0x80000) at 0x8000000 ram1 262144 (256 KB) ( 0x40000) at 0x20000000 sectors: (4 KB 0x8000000)
STM32WB55VGYx : core Cortex-M4F rom 1048576 (1.0 MB) ( 0x100000) at 0x8000000 ram1 262144 (256 KB) ( 0x40000) at 0x20000000 sectors: (4 KB 0x8000000)

JanneKiiskila mentioned this pull request Dec 20, 2019

STM32WB Index file missing #12149

Closed

ciarmcom requested review from 0xc0170, adbridge, jeromecoutant and a team December 20, 2019 22:00

ciarmcom added the needs: review label Dec 20, 2019

jeromecoutant approved these changes Jan 2, 2020

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0xc0170 approved these changes Jan 3, 2020

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0xc0170 added needs: work and removed needs: review labels Jan 7, 2020

Janne Kiiskila added 2 commits January 8, 2020 15:38

CMSIS-pack update for STM32WB-family

dfb62a2

Update of the tools/arm_pack_manager/index.json -file for the STM32WB-chipset family.

Fix ROM size for STM32WB55RGVx (16 MB -> 1 MB)

51f22e2

Per feedback from STM the correct ROM size is 1 MB, instead of 16 MB. The KEIL source information is (in the pack itself) wrong, since the KEIL webpage lists it as a 16 MB part, too - but if you look into other sources - it is indeed 1 MB.

JanneKiiskila force-pushed the CMSIS-pack-STM32WB branch from f53c2f5 to 51f22e2 Compare January 8, 2020 13:39

0xc0170 added needs: CI and removed needs: work labels Jan 8, 2020

Janne Kiiskila added 2 commits January 8, 2020 21:54

Size & sectors also for STM32WB55VGYx

0a7eb62

The size was still 16 megabytes, while in reality it is one megabyte. Added the sectors, too (see previous commit msg for details).

JanneKiiskila requested review from 0xc0170 and jeromecoutant January 8, 2020 21:21

0xc0170 approved these changes Jan 9, 2020

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0xc0170 added needs: review and removed needs: CI labels Jan 9, 2020

0xc0170 added the release-version: 6.0.0-alpha-1 First pre-release version of 6.0.0 label Jan 9, 2020

jeromecoutant approved these changes Jan 9, 2020

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0xc0170 removed the needs: review label Jan 9, 2020

0xc0170 merged commit dc63202 into ARMmbed:master Jan 9, 2020

JanneKiiskila deleted the CMSIS-pack-STM32WB branch January 10, 2020 15:02

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CMSIS-pack update for STM32WB-family #12162

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CMSIS-pack update for STM32WB-family #12162

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Test run: SUCCESS

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