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[EFM32] Add IAR support for remaining Silicon Labs targets #2707

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merged 3 commits into from
Sep 24, 2016
Merged

[EFM32] Add IAR support for remaining Silicon Labs targets #2707

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9c5ce84
[EFM32] Add IAR support for remaining Silicon Labs targets
stevew817 Sep 14, 2016
964aeec
[EFM32] Add all platforms (except Zero) to mbed 5 build
stevew817 Sep 15, 2016
6700ab7
[EFM32] Remove HG from mbed 5
stevew817 Sep 16, 2016
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16 changes: 8 additions & 8 deletions hal/targets.json
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Original file line number Diff line number Diff line change
Expand Up @@ -1776,39 +1776,39 @@
"core": "Cortex-M3",
"macros": ["EFM32GG990F1024"],
"extra_labels": ["Silicon_Labs", "EFM32"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"progen": {"target": "efm32gg-stk"},
"device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
"forced_reset_timeout": 2,
"release_versions": ["2"]
"release_versions": ["2", "5"]
},
"EFM32LG_STK3600": {
"inherits": ["Target"],
"core": "Cortex-M3",
"macros": ["EFM32LG990F256"],
"extra_labels": ["Silicon_Labs", "EFM32"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"progen": {"target": "efm32lg-stk"},
"device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
"forced_reset_timeout": 2,
"release_versions": ["2"]
"release_versions": ["2", "5"]
},
"EFM32WG_STK3800": {
"inherits": ["Target"],
"core": "Cortex-M4F",
"macros": ["EFM32WG990F256"],
"extra_labels": ["Silicon_Labs", "EFM32"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"progen": {"target": "efm32wg-stk"},
"device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
"forced_reset_timeout": 2,
"release_versions": ["2"]
"release_versions": ["2", "5"]
},
"EFM32ZG_STK3200": {
"inherits": ["Target"],
"core": "Cortex-M0+",
"default_toolchain": "uARM",
"supported_toolchains": ["GCC_ARM", "uARM"],
"supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
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Same thing about the ARM toolchain here, though I did notice that the release version "5" wasn't added for this target.

"extra_labels": ["Silicon_Labs", "EFM32"],
"macros": ["EFM32ZG222F32"],
"progen": {
Expand All @@ -1823,7 +1823,7 @@
"inherits": ["Target"],
"core": "Cortex-M0+",
"default_toolchain": "uARM",
"supported_toolchains": ["GCC_ARM", "uARM"],
"supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
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I missed this the first time around, but the release version "5" can only be added to targets that support GCC_ARM, IAR, and ARM. Can the ARM toolchain be added here?

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We had issues before where the "ARM" toolchain doesn't produce code that is compact enough to fit on our M0's. Maybe we should just drop M0 support from mbed 5 then?

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Hmm I wouldn't expect that to be the case for the ARM toolchain, I would for GCC though.

Is this still true? I believe a few memory optimization PRs have been merged relatively recently.

"extra_labels": ["Silicon_Labs", "EFM32"],
"macros": ["EFM32HG322F64"],
"progen": {
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33 changes: 33 additions & 0 deletions ...TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/TOOLCHAIN_IAR/efm32gg990f1024.icf
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Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x200000DB;
define symbol __ICFEDIT_region_RAM_start__ = 0x200000DC;
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x4000;
define symbol __ICFEDIT_size_heap__ = 0x8000;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];

define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

initialize by copy { readwrite };
do not initialize { section .noinit };

keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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