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use apple swift-format
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donn committed Nov 2, 2024
1 parent 791e714 commit d9954d8
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80 changes: 40 additions & 40 deletions Package.swift
Original file line number Diff line number Diff line change
Expand Up @@ -4,44 +4,44 @@
import PackageDescription

let package = Package(
name: "Fault",
platforms: [
.macOS(.v13), // Regex features only available in Ventura+
],
dependencies: [
// Dependencies declare other packages that this package depends on.
.package(
url: "https://github.com/apple/swift-collections.git", .upToNextMajor(from: "1.0.0")
),
.package(url: "https://github.com/pvieito/PythonKit", from: "0.5.0"),
.package(url: "https://github.com/donn/Defile.git", from: "5.2.1"),
.package(url: "https://github.com/attaswift/BigInt.git", from: "5.2.1"),
.package(url: "https://github.com/jpsim/Yams.git", from: "5.0.6"),
.package(url: "https://github.com/apple/swift-argument-parser", from: "1.3.0"),
],
targets: [
// Targets are the basic building blocks of a package. A target can define a module or a test suite.
// Targets can depend on other targets in this package, and on products in packages which this package depends on.
.executableTarget(
name: "fault",
dependencies: [
"PythonKit", .product(name: "ArgumentParser", package: "swift-argument-parser"),
"Defile", .product(name: "Collections", package: "swift-collections"), "BigInt",
"Yams",
"CThreadPool",
],
path: "Sources/Fault"
),
.target(
name: "CThreadPool",
dependencies: [],
path: "Sources/CThreadPool",
sources: [
"thpool.c",
],
cSettings: [
.headerSearchPath("Sources/CThreadPool/include"),
]
),
]
name: "Fault",
platforms: [
.macOS(.v13) // Regex features only available in Ventura+
],
dependencies: [
// Dependencies declare other packages that this package depends on.
.package(
url: "https://github.com/apple/swift-collections.git", .upToNextMajor(from: "1.0.0")
),
.package(url: "https://github.com/pvieito/PythonKit", from: "0.5.0"),
.package(url: "https://github.com/donn/Defile.git", from: "5.2.1"),
.package(url: "https://github.com/attaswift/BigInt.git", from: "5.2.1"),
.package(url: "https://github.com/jpsim/Yams.git", from: "5.0.6"),
.package(url: "https://github.com/apple/swift-argument-parser", from: "1.3.0"),
],
targets: [
// Targets are the basic building blocks of a package. A target can define a module or a test suite.
// Targets can depend on other targets in this package, and on products in packages which this package depends on.
.executableTarget(
name: "fault",
dependencies: [
"PythonKit", .product(name: "ArgumentParser", package: "swift-argument-parser"),
"Defile", .product(name: "Collections", package: "swift-collections"), "BigInt",
"Yams",
"CThreadPool",
],
path: "Sources/Fault"
),
.target(
name: "CThreadPool",
dependencies: [],
path: "Sources/CThreadPool",
sources: [
"thpool.c"
],
cSettings: [
.headerSearchPath("Sources/CThreadPool/include")
]
),
]
)
294 changes: 147 additions & 147 deletions Sources/Fault/BoundaryScanRegister.swift
Original file line number Diff line number Diff line change
Expand Up @@ -16,154 +16,154 @@ import Foundation
import PythonKit

class BoundaryScanRegisterCreator {
var name: String
private var inputName: String
private var outputName: String
var counter: Int = 0

var clock: String
var reset: String
var resetActive: Simulator.Active
var testing: String
var shift: String

private var clockIdentifier: PythonObject
private var resetIdentifier: PythonObject
private var testingIdentifier: PythonObject
private var shiftIdentifier: PythonObject

private var Node: PythonObject

init(
name: String,
clock: String,
reset: String,
resetActive: Simulator.Active,
testing: String,
shift: String,
using Node: PythonObject
) {
self.name = name
inputName = "\(name)_input"
outputName = "\(name)_output"

self.clock = clock
clockIdentifier = Node.Identifier(clock)

self.reset = reset
resetIdentifier = Node.Identifier(reset)

self.resetActive = resetActive

self.testing = testing
testingIdentifier = Node.Identifier(testing)

self.shift = shift
shiftIdentifier = Node.Identifier(shift)

self.Node = Node
}

func create(
group: String,
din: PythonObject,
dout: PythonObject,
sin: String,
sout: String,
input: Bool
) -> PythonObject {
let sinIdentifier = Node.Identifier(sin)
let soutIdentifier = Node.Identifier(sout)

let name = input ? inputName : outputName

let portArguments = [
Node.PortArg("din", din),
Node.PortArg("dout", dout),
Node.PortArg("sin", sinIdentifier),
Node.PortArg("sout", soutIdentifier),
Node.PortArg("clock", clockIdentifier),
Node.PortArg("reset", resetIdentifier),
Node.PortArg("testing", testingIdentifier),
Node.PortArg("shift", shiftIdentifier),
]

let instanceName = "__\(name)_\(group)_\(counter)__"

let submoduleInstance = Node.Instance(
name,
instanceName,
Python.tuple(portArguments),
Python.tuple()
)

counter += 1

return Node.InstanceList(
name,
Python.tuple(),
Python.tuple([submoduleInstance])
)
}

var inputDefinition: String {
"""
module \(inputName) (
din,
dout,
sin,
sout,
clock,
reset,
testing,
shift
);
input din; output dout;
input sin; output sout;
input clock, reset, testing, shift;
reg store;
always @ (posedge clock or \(resetActive == .high ? "posedge" : "negedge") reset) begin
if (\(resetActive == .high ? "" : "~") reset) begin
store <= 1'b0;
end else begin
store <= shift ? sin: dout;
end
var name: String
private var inputName: String
private var outputName: String
var counter: Int = 0

var clock: String
var reset: String
var resetActive: Simulator.Active
var testing: String
var shift: String

private var clockIdentifier: PythonObject
private var resetIdentifier: PythonObject
private var testingIdentifier: PythonObject
private var shiftIdentifier: PythonObject

private var Node: PythonObject

init(
name: String,
clock: String,
reset: String,
resetActive: Simulator.Active,
testing: String,
shift: String,
using Node: PythonObject
) {
self.name = name
inputName = "\(name)_input"
outputName = "\(name)_output"

self.clock = clock
clockIdentifier = Node.Identifier(clock)

self.reset = reset
resetIdentifier = Node.Identifier(reset)

self.resetActive = resetActive

self.testing = testing
testingIdentifier = Node.Identifier(testing)

self.shift = shift
shiftIdentifier = Node.Identifier(shift)

self.Node = Node
}

func create(
group: String,
din: PythonObject,
dout: PythonObject,
sin: String,
sout: String,
input: Bool
) -> PythonObject {
let sinIdentifier = Node.Identifier(sin)
let soutIdentifier = Node.Identifier(sout)

let name = input ? inputName : outputName

let portArguments = [
Node.PortArg("din", din),
Node.PortArg("dout", dout),
Node.PortArg("sin", sinIdentifier),
Node.PortArg("sout", soutIdentifier),
Node.PortArg("clock", clockIdentifier),
Node.PortArg("reset", resetIdentifier),
Node.PortArg("testing", testingIdentifier),
Node.PortArg("shift", shiftIdentifier),
]

let instanceName = "__\(name)_\(group)_\(counter)__"

let submoduleInstance = Node.Instance(
name,
instanceName,
Python.tuple(portArguments),
Python.tuple()
)

counter += 1

return Node.InstanceList(
name,
Python.tuple(),
Python.tuple([submoduleInstance])
)
}

var inputDefinition: String {
"""
module \(inputName) (
din,
dout,
sin,
sout,
clock,
reset,
testing,
shift
);
input din; output dout;
input sin; output sout;
input clock, reset, testing, shift;
reg store;
always @ (posedge clock or \(resetActive == .high ? "posedge" : "negedge") reset) begin
if (\(resetActive == .high ? "" : "~") reset) begin
store <= 1'b0;
end else begin
store <= shift ? sin: dout;
end
assign sout = store;
assign dout = testing ? store : din;
endmodule
"""
}

var outputDefinition: String {
"""
module \(outputName) (
din,
dout,
sin,
sout,
clock,
reset,
testing,
shift
);
input din; output dout;
input sin; output sout;
input clock, reset, testing, shift;
reg store;
always @ (posedge clock or \(resetActive == .high ? "posedge" : "negedge") reset) begin
if (\(resetActive == .high ? "" : "~") reset) begin
store <= 1'b0;
end else begin
store <= shift ? sin: dout;
end
end
assign sout = store;
assign dout = testing ? store : din;
endmodule
"""
}

var outputDefinition: String {
"""
module \(outputName) (
din,
dout,
sin,
sout,
clock,
reset,
testing,
shift
);
input din; output dout;
input sin; output sout;
input clock, reset, testing, shift;
reg store;
always @ (posedge clock or \(resetActive == .high ? "posedge" : "negedge") reset) begin
if (\(resetActive == .high ? "" : "~") reset) begin
store <= 1'b0;
end else begin
store <= shift ? sin: dout;
end
assign sout = store;
assign dout = din;
endmodule
end
assign sout = store;
assign dout = din;
endmodule
"""
}
"""
}
}
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