This project is a powerful tool for IC designers to efficiently size transistors based on specific operating conditions and performance requirements. It consists of two main phases: LUT (Look-Up Table) generation and data visualization.
- Support for complex conditional queries
- Dynamic plotting with customizable axes and color mapping
- Real-time display of operating points
- Handles large datasets (demonstrated with 900k points)
- Python script interfacing with Spectre simulator Generates comprehensive transistor operating point data
- Interactive GUI for data exploration and transistor sizing Built with Tkinter, Matplotlib, and Pandas
- Load the DataFrame (e.g., "900kPoints.csv")
- Add conditions using the sliding bars (e.g., VSB > 0.2, VSB < 0.4)
- Configure graph settings (X-axis, Y-axis, hue variable, etc.)
- Click "Plot" to visualize the data
- Click on any point to display its full operating point information
The included demo showcases sizing the input NMOS pair of a 5T OTA:
- Conditions set: 0.2 < VSB < 0.4 (accounting for body effect), requirements for transistor parameteres (gm, rout)
- Plot: VGS vs. area, with drain current (id) as the hue variable
- Goal: Find the point with lowest VGS and area while maintaining reasonable power consumption
- Dataset: 900,000 operating points
This demo illustrates the power of the tool in quickly identifying optimal transistor sizes that meet multiple criteria simultaneously.
main_app.py: Contains the main GUI application logic
DF_OPS.py: Handles dataframe operations and condition parsing
- Clone this repository
- Install required dependencies (Tkinter, Pandas, Matplotlib)
- Run main_app.py to launch the application
- Load your transistor operating point data and start exploring!
Note: The LUT generation phase is not included in this repository for security reasons. Users should generate their own LUT data using appropriate simulation tools before using this visualization application.