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Archfx/README.md

Hello World! [1] 

I am a Hardware and Firmware Design and Verification Engineer. My interests lie at the thin intersection of Electronics Engineering and Computer Science Engineering. ✌️

GitHub Twitter Twitter ORCiD LinkedIn ResearchGate Google Scholar dblp Insta Blog Website

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    Integration of two camera 📷 modules to Basys 3 FPGA

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    Real Time depth map 🏞️ generation using SSD algorithm on low end Basys 3 FPGA. Support 320x240 and 160x120 resolutions.

    VHDL 14 4

  6. ice40lib ice40lib Public

    Peripheral library 📚 for open source FPGAs based on iCE40. (Configured for ICESugar-Nano)

    Verilog 5