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[ROCm] Introducing dump support for AMDGCN (triton-lang#25)
* add `amdgcn` target for tools/aot.py * clang-format fix * [ROCm] added AMDGPU kernel call conversion * [fix] Fixing AMDGPU calling convection
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#ifndef TRITON_TARGET_AMDGCNTRANSLATION_H | ||
#define TRITON_TARGET_AMDGCNTRANSLATION_H | ||
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#include <memory> | ||
#include <string> | ||
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namespace llvm { | ||
class Module; | ||
} // namespace llvm | ||
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namespace triton { | ||
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// Translate LLVM IR to AMDGCN code. | ||
std::string translateLLVMIRToAMDGCN(llvm::Module &module, | ||
const std::string &_proc); | ||
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} // namespace triton | ||
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#endif |
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#include "triton/Target/AMDGCN/AMDGCNTranslation.h" | ||
#include "mlir/Dialect/LLVMIR/LLVMDialect.h" | ||
#include "mlir/ExecutionEngine/ExecutionEngine.h" | ||
#include "mlir/ExecutionEngine/OptUtils.h" | ||
#include "mlir/IR/BuiltinOps.h" | ||
#include "mlir/IR/Dialect.h" | ||
#include "mlir/Pass/Pass.h" | ||
#include "mlir/Pass/PassManager.h" | ||
#include "mlir/Support/LogicalResult.h" | ||
#include "mlir/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.h" | ||
#include "mlir/Target/LLVMIR/Export.h" | ||
#include "mlir/Target/LLVMIR/LLVMTranslationInterface.h" | ||
#include "triton/Target/LLVMIR/LLVMIRTranslation.h" | ||
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#include "llvm/ExecutionEngine/ExecutionEngine.h" | ||
#include "llvm/ExecutionEngine/SectionMemoryManager.h" | ||
#include "llvm/IR/IRBuilder.h" | ||
#include "llvm/IR/IRPrintingPasses.h" | ||
#include "llvm/IR/LegacyPassManager.h" | ||
#include "llvm/IR/Module.h" | ||
#include "llvm/IR/Verifier.h" | ||
#include "llvm/MC/TargetRegistry.h" | ||
#include "llvm/Support/CodeGen.h" | ||
#include "llvm/Support/CommandLine.h" | ||
#include "llvm/Support/SourceMgr.h" | ||
#include "llvm/Support/TargetSelect.h" | ||
#include "llvm/Support/raw_ostream.h" | ||
#include "llvm/Target/TargetMachine.h" | ||
#include "llvm/Target/TargetOptions.h" | ||
#include "llvm/Transforms/Scalar.h" | ||
#include "llvm/Transforms/Utils/Cloning.h" | ||
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namespace triton { | ||
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static void init_llvm() { | ||
LLVMInitializeAMDGPUTargetInfo(); | ||
LLVMInitializeAMDGPUTarget(); | ||
LLVMInitializeAMDGPUTargetMC(); | ||
LLVMInitializeAMDGPUAsmPrinter(); | ||
} | ||
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static std::string llir_to_amdgcn(llvm::Module *module, | ||
const std::string &_proc) { | ||
init_llvm(); | ||
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llvm::SmallVector<char, 0> buffer; | ||
std::string triple = "amdgcn-amd-amdhsa"; | ||
std::string layout = ""; | ||
std::string features = "+sramecc,-xnack"; | ||
// verify and store llvm | ||
llvm::legacy::PassManager pm; | ||
pm.add(llvm::createVerifierPass()); | ||
pm.run(*module); | ||
// create machine | ||
module->setTargetTriple(triple); | ||
std::string error; | ||
auto target = | ||
llvm::TargetRegistry::lookupTarget(module->getTargetTriple(), error); | ||
llvm::TargetOptions opt; | ||
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opt.AllowFPOpFusion = llvm::FPOpFusion::Fast; | ||
opt.UnsafeFPMath = false; | ||
opt.NoInfsFPMath = false; | ||
opt.NoNaNsFPMath = true; | ||
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llvm::TargetMachine *machine = target->createTargetMachine( | ||
module->getTargetTriple(), _proc, features, opt, llvm::Reloc::PIC_, | ||
llvm::None, llvm::CodeGenOpt::None); | ||
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// set data layout | ||
if (layout.empty()) | ||
module->setDataLayout(machine->createDataLayout()); | ||
else | ||
module->setDataLayout(layout); | ||
// emit machine code | ||
for (llvm::Function &f : module->functions()) { | ||
f.addFnAttr(llvm::Attribute::AlwaysInline); | ||
} | ||
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llvm::legacy::PassManager pass; | ||
llvm::raw_svector_ostream stream(buffer); | ||
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// emit | ||
machine->addPassesToEmitFile(pass, stream, nullptr, | ||
llvm::CodeGenFileType::CGFT_AssemblyFile); | ||
pass.run(*module); | ||
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std::string amdgcn(buffer.begin(), buffer.end()); | ||
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return amdgcn; | ||
} | ||
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std::string translateLLVMIRToAMDGCN(llvm::Module &module, | ||
const std::string &_proc) { | ||
auto gcnCode = llir_to_amdgcn(&module, _proc); | ||
return gcnCode; | ||
} | ||
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} // namespace triton |
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add_mlir_translation_library(TritonAMDGCN | ||
AMDGCNTranslation.cpp | ||
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LINK_COMPONENTS | ||
Core | ||
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LINK_LIBS PUBLIC | ||
MLIRIR | ||
MLIRLLVMIR | ||
MLIRSupport | ||
MLIRTargetLLVMIRExport | ||
) |
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add_subdirectory(AMDGCN) | ||
add_subdirectory(LLVMIR) | ||
add_subdirectory(PTX) |
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