ICE on invalid MIR

Centril · Nov 16, 2019 · 8952c8a · 8952c8a
1 parent 09180d7
commit 8952c8a
Showing 1 changed file with 1 addition and 4 deletions.
diff --git a/src/librustc_mir/interpret/terminator.rs b/src/librustc_mir/interpret/terminator.rs
@@ -264,10 +264,7 @@ impl<'mir, 'tcx, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
 
         match instance.def {
             ty::InstanceDef::Intrinsic(..) => {
-                if caller_abi != Abi::RustIntrinsic && caller_abi != Abi::PlatformIntrinsic {
-                    throw_ub_format!("Rust intrinsic called with an ABI other than \
-                        `RustIntrinsic` and `PlatformIntrinsic`.");
-                }
+                assert!(caller_abi == Abi::RustIntrinsic || caller_abi == Abi::PlatformIntrinsic);
 
                 let old_stack = self.cur_frame();
                 let old_bb = self.frame().block;