Added DMA Write Control

Cherrytree56567 · Oct 23, 2023 · 6f78ab3 · 6f78ab3
1 parent a376d38
commit 6f78ab3
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Showing 2 changed files with 15 additions and 2 deletions.
diff --git a/PSEMU/Bus.h b/PSEMU/Bus.h
@@ -76,7 +76,7 @@ class Bus {
             std::cout << "[BUS] WARNING: IRQ CONTROL NOT IMPLEMENTED. IRQ control: " << std::to_string(offset.value()) << " " << std::to_string(value) << "\n";
             return;
         } else if (auto offset = _DMA.contains(abs_addr); offset.has_value()) {
-            std::cout << "[BUS] WARNING: DMA NOT IMPLEMENTED. DMA write: " << std::to_string(abs_addr) << std::to_string(value) << "\n";
+            set_dma_reg(offset.value(), value);
             return;
         } else if (auto offset = GPU.contains(abs_addr); offset.has_value()) {
             std::cout << "[BUS] WARNING: GPU NOT IMPLEMENTED. GPU write " << std::to_string(offset.value()) << " " << std::to_string(value) << "\n";
@@ -196,12 +196,24 @@ class Bus {
             break;
 
         default: 
-            std::cout << "[BUS] Unhandled DMA access\n"; 
+            std::cout << "[BUS] ERROR: Unhandled DMA access\n"; 
             return 0; 
             break;
         }
     }
 
+    void set_dma_reg(uint32_t offset, uint32_t value) {
+        switch (offset){
+        case 0x70:
+            dma.set_control(value);
+            break;
+
+        default: 
+            std::cout << "[BUS] ERROR: Unhandled DMA write access\n";
+            break;
+        }
+    }
+
     Bios bios;
     RAM ram;
     DMA dma;

diff --git a/PSEMU/DMA.h b/PSEMU/DMA.h
@@ -8,6 +8,7 @@ class DMA {
 	}
 
 	uint32_t get_control() { return control; }
+	void set_control(uint32_t value) { control = value; }
 
 private:
 	uint32_t control;