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Merge pull request #362 from edgepro-dev/feature/edgepro1
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Adding new board called EdgePro1 based on MIMXRT1064
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fpoussin committed Jul 17, 2023
2 parents 3197a82 + 1bf1d2f commit 45fe65f
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154 changes: 154 additions & 0 deletions os/common/startup/ARMCMx/compilers/GCC/ld/MIMXRT1064.ld
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/*
* Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
* (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/

/*
* MIMXRT1064 memory setup.
*/
MEMORY
{
/*
* The top 64K of flash are unavailable:
*
* 60K are reserved for EEPROM emulation,
* 4K are special read-only memory containing a known-good blink program
*
*/
flash0 : org = 0x70000000, len = 4096K /* FLASH */
flash1 : org = 0x00000000, len = 0
flash2 : org = 0x00000000, len = 0
flash3 : org = 0x00000000, len = 0
flash4 : org = 0x00000000, len = 0
flash5 : org = 0x00000000, len = 0
flash6 : org = 0x00000000, len = 0
flash7 : org = 0x00000000, len = 0

/* NOTE: ram0, ram1 and ram2 can be configured to use various
* percentages of the available 512K of FlexRAM.
*
* The linker script defines each with a 512k size.
*
* That is not safe to do with ChibiOS, where the full size
* of an individual entry (e.g. 512K for ram1) will be used
* in full, e.g. for the heap.
*
* We get around this limitation by allocating all 512K of
* FlexRAM as DTCM (ram1), and not using ram0 and ram2 at all.
*
* See also:
* IMXRT1060RM: Page 36 Table 3-1 System memory map (CM7)
*/

/* Our startup code configures all of the flexram as DTCM. */
/* ram0: DTCM, general purpose only
2000_0000, up to 512KB */
ram0 : org = 0x20000000, len = 512k

/* Our startup code does not configure any ram1. */
/* Possible optimization: copy .text code into ram0 */
/* ram1: ITCM, can be TCM or general purpose
0000_0000, up to 512KB */
/* ram1 : org = 0x00000000, len = 512k */
ram1 : org = 0x00000000, len = 0

/* Our startup code does not configure any ram2. */
/* ram2: OCRAM (On-Chip RAM), general purpose but not TCM (slower)
2020_0000 Size: 512KB OCRAM2 */
/* ram2 : org = 0x20200000, len = 512k */
ram2 : org = 0x00000000, len = 0

ram3 : org = 0x00000000, len = 0
ram4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0
ram6 : org = 0x00000000, len = 0
ram7 : org = 0x00000000, len = 0
}

/* Flash region for the configuration bytes.*/
SECTIONS
{
.text.progmem : ALIGN(4)
{
. = 0;
KEEP(*(.flashconfig))
FILL(0xFF)
/* IVT offset is 0x1000 from the bootable image as per section 2.5
of https://www.nxp.com/docs/en/application-note/AN12107.pdf */
. = ORIGIN(flash0) + 0x1000;
KEEP(*(.ivt))
KEEP(*(.bootdata))

/* .vectors get placed in rules_code.ld */
} > flash0

.cfmprotect : ALIGN(4) SUBALIGN(4)
{
KEEP(*(.cfmconfig))
} > flash0
}

/* For each data/text section two region are defined, a virtual region
and a load region (_LMA suffix).*/

/* Flash region to be used for exception vectors.*/
REGION_ALIAS("VECTORS_FLASH", flash0);
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);

/* Flash region to be used for constructors and destructors.*/
REGION_ALIAS("XTORS_FLASH", flash0);
REGION_ALIAS("XTORS_FLASH_LMA", flash0);

/* Flash region to be used for code text.*/
REGION_ALIAS("TEXT_FLASH", flash0);
REGION_ALIAS("TEXT_FLASH_LMA", flash0);

/* Flash region to be used for read only data.*/
REGION_ALIAS("RODATA_FLASH", flash0);
REGION_ALIAS("RODATA_FLASH_LMA", flash0);

/* Flash region to be used for various.*/
REGION_ALIAS("VARIOUS_FLASH", flash0);
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);

/* Flash region to be used for RAM(n) initialization data.*/
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);

/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);

/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);

/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
REGION_ALIAS("DATA_RAM_LMA", flash0);

/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);

/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);

/* Generic rules inclusion.*/
INCLUDE rules.ld
19 changes: 19 additions & 0 deletions os/common/startup/ARMCMx/compilers/GCC/mk/startup_MIMXRT1064.mk
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# List of the ChibiOS generic MIMXRT1064 startup and CMSIS files.
STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c

STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S

STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld \
$(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/MIMXRT1064 \
$(CHIBIOS)/os/common/ext/CMSIS/include \
$(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \
$(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/MIMXRT1064

STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld
STARTUPLD_CONTRIB = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld

# Shared variables
ALLXASMSRC += $(STARTUPASM)
ALLCSRC += $(STARTUPSRC)
ALLINC += $(STARTUPINC)
80 changes: 80 additions & 0 deletions os/common/startup/ARMCMx/devices/MIMXRT1064/cmparams.h
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/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio.
(C) 2015 RedoX https://github.com/RedoXyde
(C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/

/**
* @file GCC/ARMCMx/MK66F18/cmparams.h
* @brief ARM Cortex-M4 parameters for the Kinetis MK66F18.
*
* @defgroup ARMCMx_MK66F18 Kinetis MK66F18 Specific Parameters
* @ingroup ARMCMx_SPECIFIC
* @details This file contains the Cortex-M4 specific parameters for the
* Kinetis MK66F18 platform.
* @{
*/

#ifndef _CMPARAMS_H_
#define _CMPARAMS_H_

/**
* @brief Cortex core model.
*/
#define CORTEX_MODEL 7

/**
* @brief Systick unit presence.
*/
#define CORTEX_HAS_ST TRUE

/**
* @brief Floating Point unit presence.
*/
#define CORTEX_HAS_FPU TRUE

/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4

/**
* @brief Number of interrupt vectors.
* @note This number does not include the 16 system vectors and must be
* rounded to a multiple of 8.
*/
#define CORTEX_NUM_VECTORS 160

/* The following code is not processed when the file is included from an
asm module.*/
#if !defined(_FROM_ASM_)

/* Including the device CMSIS header. Note, we are not using the definitions
from this header because we need this file to be usable also from
assembler source files. We verify that the info matches instead.*/
#include "MIMXRT1064.h"

#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
#error "CMSIS __NVIC_PRIO_BITS mismatch"
#endif

#endif /* !defined(_FROM_ASM_) */

#endif /* _CMPARAMS_H_ */

/** @} */
47 changes: 47 additions & 0 deletions os/hal/boards/EDGEPRO1/board.c
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/*
ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"

#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
};
#endif

/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
}

void __late_init(void) {
MIMXRT1064_clock_init();
MIMXRT1064_MPU_init();
}

/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}
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