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net/ixgbe/base: enable E610 device
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Add high level link management support for E610 device, as well as
enable all code paths related to E610 initialization. This makes it so
that E610 can be brought up using ixgbe driver.

Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Signed-off-by: Jedrzej Jagielski <jedrzej.jagielski@intel.com>
Signed-off-by: Piotr Kwapulinski <piotr.kwapulinski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
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@pkwapuli @bruce-richardson
pkwapuli authored and bruce-richardson committed May 30, 2024
1 parent 4d311aa commit 3166377
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Showing 11 changed files with 1,302 additions and 23 deletions.
7 changes: 5 additions & 2 deletions drivers/net/ixgbe/base/ixgbe_82599.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2001-2020 Intel Corporation
* Copyright(c) 2001-2024 Intel Corporation
*/

#include "ixgbe_type.h"
Expand Down Expand Up @@ -1389,7 +1389,8 @@ void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue)
fdirctrl |= (dropqueue << IXGBE_FDIRCTRL_DROP_Q_SHIFT);
if ((hw->mac.type == ixgbe_mac_X550) ||
(hw->mac.type == ixgbe_mac_X550EM_x) ||
(hw->mac.type == ixgbe_mac_X550EM_a))
(hw->mac.type == ixgbe_mac_X550EM_a) ||
(hw->mac.type == ixgbe_mac_E610))
fdirctrl |= IXGBE_FDIRCTRL_DROP_NO_MATCH;

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
Expand Down Expand Up @@ -1804,6 +1805,7 @@ s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
case ixgbe_mac_E610:
IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, 0xFFFFFFFF);
break;
default:
Expand All @@ -1827,6 +1829,7 @@ s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
case ixgbe_mac_E610:
IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, ~fdirtcpm);
break;
default:
Expand Down
60 changes: 58 additions & 2 deletions drivers/net/ixgbe/base/ixgbe_api.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2001-2020 Intel Corporation
* Copyright(c) 2001-2024 Intel Corporation
*/

#include "ixgbe_api.h"
Expand Down Expand Up @@ -89,6 +89,9 @@ s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
case ixgbe_mac_X550EM_a_vf:
status = ixgbe_init_ops_vf(hw);
break;
case ixgbe_mac_E610:
status = ixgbe_init_ops_E610(hw);
break;
default:
status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
break;
Expand Down Expand Up @@ -208,6 +211,14 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
hw->mac.type = ixgbe_mac_X550EM_a_vf;
hw->mvals = ixgbe_mvals_X550EM_a;
break;
case IXGBE_DEV_ID_E610_BACKPLANE:
case IXGBE_DEV_ID_E610_SFP:
case IXGBE_DEV_ID_E610_10G_T:
case IXGBE_DEV_ID_E610_2_5G_T:
case IXGBE_DEV_ID_E610_SGMII:
hw->mac.type = ixgbe_mac_E610;
hw->mvals = ixgbe_mvals_X550EM_a;
break;
default:
ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
Expand Down Expand Up @@ -447,7 +458,8 @@ s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
**/
s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
{
return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
return ixgbe_call_func(hw, hw->eeprom.ops.read_pba_string, (hw, pba_num,
pba_num_size), IXGBE_NOT_IMPLEMENTED);
}

/**
Expand Down Expand Up @@ -1143,6 +1155,19 @@ s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
IXGBE_NOT_IMPLEMENTED);
}

/**
* ixgbe_get_fw_tsam_mode - Returns information whether TSAM is enabled
* @hw: pointer to hardware structure
*
* Checks Thermal Sensor Autonomous Mode by reading the value of the
* dedicated register.
* Returns True if TSAM is enabled, False if TSAM is disabled.
*/
bool ixgbe_get_fw_tsam_mode(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.get_fw_tsam_mode, (hw),
IXGBE_NOT_IMPLEMENTED);
}

/**
* ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
Expand Down Expand Up @@ -1686,3 +1711,34 @@ void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
if (hw->mac.ops.set_rate_select_speed)
hw->mac.ops.set_rate_select_speed(hw, speed);
}

/**
* ixgbe_get_fw_version - get FW version
* @hw: pointer to hardware structure
*
* Get the current FW version.
*
* Return: the exit code of the operation or IXGBE_NOT_IMPLEMENTED
* if the function is not implemented.
*/
s32 ixgbe_get_fw_version(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.get_fw_version,
(hw), IXGBE_NOT_IMPLEMENTED);
}

/**
* ixgbe_get_nvm_ver - get NVM version
* @hw: pointer to hardware structure
* @nvm: pointer to NVM info structure
*
* Get the current NVM version.
*
* Return: the exit code of the operation or IXGBE_NOT_IMPLEMENTED
* if the function is not implemented.
*/
s32 ixgbe_get_nvm_ver(struct ixgbe_hw* hw, struct ixgbe_nvm_info *nvm)
{
return ixgbe_call_func(hw, hw->mac.ops.get_nvm_version,
(hw, nvm), IXGBE_NOT_IMPLEMENTED);
}
7 changes: 5 additions & 2 deletions drivers/net/ixgbe/base/ixgbe_api.h
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2001-2020 Intel Corporation
* Copyright(c) 2001-2024 Intel Corporation
*/

#ifndef _IXGBE_API_H_
Expand All @@ -18,6 +18,7 @@ extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw);
extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);

s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
Expand Down Expand Up @@ -105,6 +106,7 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
u8 ver, u16 len, char *driver_ver);
bool ixgbe_get_fw_tsam_mode(struct ixgbe_hw *hw);
s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw);
s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw);
void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
Expand Down Expand Up @@ -192,5 +194,6 @@ void ixgbe_disable_rx(struct ixgbe_hw *hw);
void ixgbe_enable_rx(struct ixgbe_hw *hw);
s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);

s32 ixgbe_get_fw_version(struct ixgbe_hw *hw);
s32 ixgbe_get_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);
#endif /* _IXGBE_API_H_ */
31 changes: 19 additions & 12 deletions drivers/net/ixgbe/base/ixgbe_common.c
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2001-2020 Intel Corporation
* Copyright(c) 2001-2024 Intel Corporation
*/

#include "ixgbe_common.h"
Expand Down Expand Up @@ -61,6 +61,7 @@ s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw)
ixgbe_validate_eeprom_checksum_generic;
eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_generic;
eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_generic;
eeprom->ops.read_pba_string = ixgbe_read_pba_string_generic;

/* MAC */
mac->ops.init_hw = ixgbe_init_hw_generic;
Expand Down Expand Up @@ -146,6 +147,7 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
case IXGBE_DEV_ID_X550EM_A_SFP_N:
case IXGBE_DEV_ID_X550EM_A_QSFP:
case IXGBE_DEV_ID_X550EM_A_QSFP_N:
case IXGBE_DEV_ID_E610_SFP:
supported = false;
break;
default:
Expand Down Expand Up @@ -177,6 +179,8 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
case IXGBE_DEV_ID_X550EM_A_10G_T:
case IXGBE_DEV_ID_X550EM_A_1G_T:
case IXGBE_DEV_ID_X550EM_A_1G_T_L:
case IXGBE_DEV_ID_E610_10G_T:
case IXGBE_DEV_ID_E610_2_5G_T:
supported = true;
break;
default:
Expand Down Expand Up @@ -577,17 +581,11 @@ s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw)
}
}

if (hw->mac.type == ixgbe_mac_X550 || hw->mac.type == ixgbe_mac_X540) {
if (hw->mac.type == ixgbe_mac_X540 ||
hw->mac.type == ixgbe_mac_X550 ||
hw->mac.type == ixgbe_mac_E610) {
if (hw->phy.id == 0)
ixgbe_identify_phy(hw);
hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL,
IXGBE_MDIO_PCS_DEV_TYPE, &i);
hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH,
IXGBE_MDIO_PCS_DEV_TYPE, &i);
hw->phy.ops.read_reg(hw, IXGBE_LDPCECL,
IXGBE_MDIO_PCS_DEV_TYPE, &i);
hw->phy.ops.read_reg(hw, IXGBE_LDPCECH,
IXGBE_MDIO_PCS_DEV_TYPE, &i);
}

return IXGBE_SUCCESS;
Expand Down Expand Up @@ -998,6 +996,9 @@ void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status)
case IXGBE_PCI_LINK_SPEED_8000:
hw->bus.speed = ixgbe_bus_speed_8000;
break;
case IXGBE_PCI_LINK_SPEED_16000:
hw->bus.speed = ixgbe_bus_speed_16000;
break;
default:
hw->bus.speed = ixgbe_bus_speed_unknown;
break;
Expand All @@ -1020,7 +1021,9 @@ s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw)
DEBUGFUNC("ixgbe_get_bus_info_generic");

/* Get the negotiated link width and speed from PCI config space */
link_status = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_LINK_STATUS);
link_status = IXGBE_READ_PCIE_WORD(hw, hw->mac.type == ixgbe_mac_E610 ?
IXGBE_PCI_LINK_STATUS_E610 :
IXGBE_PCI_LINK_STATUS);

ixgbe_set_pci_config_data_generic(hw, link_status);

Expand Down Expand Up @@ -3653,6 +3656,10 @@ u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)
pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS;
max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;
break;
case ixgbe_mac_E610:
pcie_offset = IXGBE_PCIE_MSIX_E610_CAPS;
max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;
break;
default:
return msix_count;
}
Expand Down Expand Up @@ -4228,7 +4235,7 @@ s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
break;
case IXGBE_LINKS_SPEED_100_82599:
*speed = IXGBE_LINK_SPEED_100_FULL;
if (hw->mac.type == ixgbe_mac_X550) {
if (hw->mac.type == ixgbe_mac_X550 || hw->mac.type == ixgbe_mac_E610) {
if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
*speed = IXGBE_LINK_SPEED_5GB_FULL;
}
Expand Down
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