Lane-detection-using-hough-transform

Using Verilog HDL

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
README.md		README.md
adder16.v		adder16.v
adder16_sub_add.v		adder16_sub_add.v
adder24_sub_add.v		adder24_sub_add.v
adder4.v		adder4.v
adder8.v		adder8.v
adder9.v		adder9.v
architecture_HoughTransform.PNG		architecture_HoughTransform.PNG
block_find_max.v		block_find_max.v
block_memo.v		block_memo.v
block_post.v		block_post.v
block_pre.v		block_pre.v
block_queue.v		block_queue.v
cnt_cell.v		cnt_cell.v
comparator16.v		comparator16.v
comparator2.v		comparator2.v
comparator20.v		comparator20.v
comparator4.v		comparator4.v
comparator8.v		comparator8.v
controller.v		controller.v
counter.v		counter.v
datapath.v		datapath.v
eq_pi.v		eq_pi.v
equal_179.v		equal_179.v
full_adder.v		full_adder.v
gt_90.v		gt_90.v
image_canny.v		image_canny.v
memory.v		memory.v
mul16_vedic.v		mul16_vedic.v
mul2_vedic.v		mul2_vedic.v
mul4_vedic.v		mul4_vedic.v
mul8_vedic.v		mul8_vedic.v
queue.v		queue.v
shift_right.v		shift_right.v
sin_cos.v		sin_cos.v
sin_cos_i.v		sin_cos_i.v
tb_datapath.v		tb_datapath.v

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