Make apps not include or replace the firmware

Co-authored-by: Phil Howard <phil@gadgetoid.com>

32blit-stm32/CMakeLists.txt

@@ -170,6 +170,8 @@ set(MCU_LINKER_SCRIPT "${CMAKE_CURRENT_LIST_DIR}/${MCU_LINKER_SCRIPT}")
 set(MCU_LINKER_SCRIPT "${MCU_LINKER_SCRIPT}" PARENT_SCOPE)
 set(MCU_LINKER_SCRIPT_EXT "${CMAKE_CURRENT_LIST_DIR}/${MCU_LINKER_SCRIPT_EXT}" PARENT_SCOPE)
 
+set(USER_STARTUP ${CMAKE_CURRENT_SOURCE_DIR}/startup_user.s PARENT_SCOPE)
+
 function(blit_executable_common NAME)
 	target_link_libraries(${NAME} BlitEngine)
 	set_property(TARGET ${NAME} APPEND_STRING PROPERTY LINK_FLAGS " -Wl,-Map=${NAME}.map,--cref")
@@ -183,7 +185,8 @@ function(blit_executable_common NAME)
 endfunction()
 
 function(blit_executable NAME SOURCES)
-	add_executable(${NAME} $<TARGET_OBJECTS:BlitHalSTM32Ext> ${SOURCES} ${ARGN})
+	set_source_files_properties(${USER_STARTUP} PROPERTIES LANGUAGE CXX)
+	add_executable(${NAME} ${USER_STARTUP} ${SOURCES} ${ARGN})
 
 	install(FILES ${CMAKE_CURRENT_BINARY_DIR}/${NAME}.bin
 		DESTINATION bin

32blit-stm32/Src/32blit.cpp

@@ -857,6 +857,8 @@ char *get_fr_err_text(FRESULT err){
 typedef  void (*pFunction)(void);
 pFunction JumpToApplication;
 
+typedef void(*renderFunction)(uint32_t);
+
 void blit_switch_execution(uint32_t address)
 {
   #if EXTERNAL_LOAD_ADDRESS == 0x90000000
@@ -867,6 +869,21 @@ void blit_switch_execution(uint32_t address)
 
   init_api_shared();
 
+	// enable qspi memory mapping if needed
+	if(EXTERNAL_LOAD_ADDRESS >= 0x90000000)
+		qspi_enable_memorymapped_mode();
+
+  uint32_t magic = (*(__IO uint32_t*) (EXTERNAL_LOAD_ADDRESS));
+
+  if(magic == 0x54494C42 /*BLIT*/) {
+    pFunction init = (pFunction) (*(__IO uint32_t*) (EXTERNAL_LOAD_ADDRESS + 12));
+    init();
+
+    blit::render = (renderFunction) (*(__IO uint32_t*) (EXTERNAL_LOAD_ADDRESS + 4));
+    blit::update = (renderFunction) (*(__IO uint32_t*) (EXTERNAL_LOAD_ADDRESS + 8));
+    return;
+  }
+
   // Stop the ADC DMA
   HAL_ADC_Stop_DMA(&hadc1);
   HAL_ADC_Stop_DMA(&hadc3);
@@ -893,9 +910,6 @@ void blit_switch_execution(uint32_t address)
   HAL_NVIC_DisableIRQ(TIM2_IRQn);
 
 	volatile uint32_t uAddr = EXTERNAL_LOAD_ADDRESS;
-	// enable qspi memory mapping if needed
-	if(EXTERNAL_LOAD_ADDRESS >= 0x90000000)
-		qspi_enable_memorymapped_mode();
 
 	/* Disable I-Cache */
 	SCB_DisableICache();

32blit-stm32/startup_user.s

@@ -0,0 +1,124 @@
+/*
+  ******************************************************************************
+  * @file      startup_stm32h750xx.s
+  * @author    MCD Application Team
+  * @brief     STM32H750xx Devices vector table for GCC based toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == do_init,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+*/
+
+  .syntax unified
+  .cpu cortex-m7
+  .fpu softvfp
+  .thumb
+
+.extern init
+.extern update
+.extern render
+
+.global  g_pfnVectors
+
+
+// start address for the initialization values of the .data section.
+// defined in linker script
+.word  _sidata
+// start address for the .data section. defined in linker script
+.word  _sdata
+// end address for the .data section. defined in linker script
+.word  _edata
+// start address for the .bss section. defined in linker script
+.word  _sbss
+// end address for the .bss section. defined in linker script
+.word  _ebss
+// stack used for SystemInit_ExtMemCtl; always internal RAM used
+
+
+  .section  .text.do_init
+  .weak  do_init
+  .type  do_init, %function
+do_init:
+
+
+// Copy the data segment initializers from flash to SRAM
+  movs  r1, #0
+  b  LoopCopyDataInit
+
+CopyDataInit:
+  ldr  r3, =_sidata
+  ldr  r3, [r3, r1]
+  str  r3, [r0, r1]
+  adds  r1, r1, #4
+
+LoopCopyDataInit:
+  ldr  r0, =_sdata
+  ldr  r3, =_edata
+  adds  r2, r0, r1
+  cmp  r2, r3
+  bcc  CopyDataInit
+
+  ldr  r2, =_sbss
+  b  LoopFillZerobss
+
+// Zero fill the bss segment.
+FillZerobss:
+  movs  r3, #0
+  str  r3, [r2], #4
+
+LoopFillZerobss:
+  ldr  r3, = _ebss
+  cmp  r2, r3
+  bcc  FillZerobss
+
+  push {lr}
+// Call static constructors
+  bl __libc_init_array
+// Call the application's entry point.
+  bl  _Z4initv
+  pop {pc}
+
+/*****************************************************************************
+*
+* The minimal vector table for a Cortex M. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+*******************************************************************************/
+
+ .section  .isr_vector,"a",%progbits
+  #.type  g_pfnVectors, %object
+  #.size  g_pfnVectors, .-g_pfnVectors
+
+g_pfnVectors:
+  .word  0x54494C42
+  .word  _Z6renderm
+  .word  _Z6updatem
+  .word  do_init
+
+/*
+.weak      render
+.thumb_set render,main
+
+.weak      update
+.thumb_set update,main
+
+.weak      init
+.thumb_set init,main
+*/