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stubbing and experimentation
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Dillonb committed Sep 15, 2024
1 parent c072a72 commit 46782a9
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Showing 4 changed files with 181 additions and 7 deletions.
54 changes: 54 additions & 0 deletions src/jit/src/ir.rs
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@@ -0,0 +1,54 @@
use std::rc::Rc;

pub enum IrSize {
U8,
S8,
U16,
S16,
U32,
S32

}

pub enum IrInstruction {
Nop,
SetConstant,
SetFloatConstant,
Or(Rc<IrInstruction>, Rc<IrInstruction>),
Xor(Rc<IrInstruction>, Rc<IrInstruction>),
And(Rc<IrInstruction>, Rc<IrInstruction>),
Sub,
Not,
Add(Rc<IrInstruction>, Rc<IrInstruction>),
Shift,
Store,
Load,
GetPtr(u64, IrSize),
SetPtr(u64, IrSize),
MaskAndCast,
CheckCondition,

// rework these
SetCondBlockExitPc,
SetBlockExitPc,
CondBlockExit,

TlbLookup,
LoadGuestReg,
FlushGuestReg,
Multiply,
Divide,
Eret,
Call,
MovRegType,
FloatConvert,
FloatMultiply,
FloatDivide,
FloatAdd,
FloatSub,
FloatSqrt,
FloatAbs,
FloatNeg,
FloatCheckCondition,
InterpreterFallback
}
54 changes: 54 additions & 0 deletions src/jit/src/ir_to_x64.rs
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@@ -0,0 +1,54 @@
use crate::ir::IrInstruction;
use dynasmrt::{dynasm, DynasmApi, DynasmLabelApi};

pub fn compile(code : &[IrInstruction]) {
let mut ops = dynasmrt::x64::Assembler::new().unwrap();
for instr in code {
match instr {
IrInstruction::Nop => todo!("IR Nop"),
IrInstruction::SetConstant => todo!("IR SetConstant"),
IrInstruction::SetFloatConstant => todo!("IR SetFloatConstant"),
IrInstruction::Or(_, _) => todo!("IR Or"),
IrInstruction::Xor(_, _) => todo!("IR Xor"),
IrInstruction::And(_, _) => todo!("IR And"),
IrInstruction::Sub => todo!("IR Sub"),
IrInstruction::Not => todo!("IR Not"),
IrInstruction::Add(_, _) => todo!("IR Add"),
IrInstruction::Shift => todo!("IR Shift"),
IrInstruction::Store => todo!("IR Store"),
IrInstruction::Load => todo!("IR Load"),
IrInstruction::GetPtr(address, size) => {
dynasm!(ops
; .arch x64
; mov rax, rcx
// ; push [rsp + rsp]
)
},
IrInstruction::SetPtr(_, _) => todo!("IR SetPtr"),
IrInstruction::MaskAndCast => todo!("IR MaskAndCast"),
IrInstruction::CheckCondition => todo!("IR CheckCondition"),
IrInstruction::SetCondBlockExitPc => todo!("IR SetCondBlockExitPc"),
IrInstruction::SetBlockExitPc => todo!("IR SetBlockExitPc"),
IrInstruction::CondBlockExit => todo!("IR CondBlockExit"),
IrInstruction::TlbLookup => todo!("IR TlbLookup"),
IrInstruction::LoadGuestReg => todo!("IR LoadGuestReg"),
IrInstruction::FlushGuestReg => todo!("IR FlushGuestReg"),
IrInstruction::Multiply => todo!("IR Multiply"),
IrInstruction::Divide => todo!("IR Divide"),
IrInstruction::Eret => todo!("IR Eret"),
IrInstruction::Call => todo!("IR Call"),
IrInstruction::MovRegType => todo!("IR MovRegType"),
IrInstruction::FloatConvert => todo!("IR FloatConvert"),
IrInstruction::FloatMultiply => todo!("IR FloatMultiply"),
IrInstruction::FloatDivide => todo!("IR FloatDivide"),
IrInstruction::FloatAdd => todo!("IR FloatAdd"),
IrInstruction::FloatSub => todo!("IR FloatSub"),
IrInstruction::FloatSqrt => todo!("IR FloatSqrt"),
IrInstruction::FloatAbs => todo!("IR FloatAbs"),
IrInstruction::FloatNeg => todo!("IR FloatNeg"),
IrInstruction::FloatCheckCondition => todo!("IR FloatCheckCondition"),
IrInstruction::InterpreterFallback => todo!("IR InterpreterFallback"),
}
}

}
3 changes: 3 additions & 0 deletions src/jit/src/lib.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,7 @@
mod mips_parser;
mod ir;
mod ir_to_x64;

#[no_mangle]
pub unsafe extern fn rs_jit_compile_new_block(instructions: *mut u32, num_instructions: usize, virtual_address: u64, physical_address: u32) {
let safe_code = std::slice::from_raw_parts(instructions, num_instructions);
Expand Down
77 changes: 70 additions & 7 deletions src/jit/src/mips_parser.rs
Original file line number Diff line number Diff line change
@@ -1,3 +1,65 @@
use itertools::izip;
use proc_bitfield::ConvRaw;

#[derive(ConvRaw, Debug)]
enum MipsOpcode {
CP0 = 0b010000,
CP1 = 0b010001,
CP2 = 0b010010,
CP3 = 0b010011,
LD = 0b110111,
LUI = 0b001111,
ADDI = 0b001000,
ADDIU = 0b001001,
DADDI = 0b011000,
ANDI = 0b001100,
LBU = 0b100100,
LHU = 0b100101,
LH = 0b100001,
LW = 0b100011,
LWU = 0b100111,
BEQ = 0b000100,
BEQL = 0b010100,
BGTZ = 0b000111,
BGTZL = 0b010111,
BLEZ = 0b000110,
BLEZL = 0b010110,
BNE = 0b000101,
BNEL = 0b010101,
CACHE = 0b101111,
REGIMM = 0b000001,
SPCL = 0b000000,
SB = 0b101000,
SH = 0b101001,
SD = 0b111111,
SW = 0b101011,
ORI = 0b001101,
J = 0b000010,
JAL = 0b000011,
SLTI = 0b001010,
SLTIU = 0b001011,
XORI = 0b001110,
DADDIU = 0b011001,
LB = 0b100000,
LDC1 = 0b110101,
SDC1 = 0b111101,
LWC1 = 0b110001,
SWC1 = 0b111001,
LWL = 0b100010,
LWR = 0b100110,
SWL = 0b101010,
SWR = 0b101110,
LDL = 0b011010,
LDR = 0b011011,
SDL = 0b101100,
SDR = 0b101101,
LL = 0b110000,
LLD = 0b110100,
SC = 0b111000,
SCD = 0b111100,
RDHWR = 0b011111
}

proc_bitfield::bitfield! {
#[derive(Clone, Copy, PartialEq, Eq)]
pub struct MipsInstruction(pub u32): Debug, FromStorage, IntoStorage, DerefStorage {
Expand All @@ -8,21 +70,22 @@ proc_bitfield::bitfield! {

pub rt: u8 @ 16 ..=20,
pub rs: u8 @ 21 ..=25,
pub op: u8 @ 26 ..=31,

pub op_bits: u8 @ 26 ..=31,
pub op: u8 [unwrap MipsOpcode] @ 26 ..= 31
}
}

pub fn parse(code: &[u32], virtual_address: u64, physical_address: u32) {
let instructions = code.iter().map(|word| MipsInstruction(*word));
let zipped = izip!(instructions, (virtual_address..).step_by(4), (physical_address..).step_by(4));

let code_len = code.len();
println!("Compiling {code_len} instructions at virtual address 0x{virtual_address:016X} and physical address 0x{physical_address:08X}");

let mut addr = virtual_address;
for instr in instructions {
let x = instr.raw();
let opcode = instr.op();
println!("{addr:016X}\t{x:08X} (opcode {opcode:X})");
addr += 4;
for (instruction, vaddr, paddr) in zipped {
let iw = instruction.raw();
let op_enum = instruction.op();
println!("{vaddr:016X}\t{paddr:08X}\t{iw:08X} (opcode {op_enum:?})");
}
}

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