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msp430 mature support added
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EDI-Systems committed Feb 27, 2018
1 parent 1801dbc commit 318fb61
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Showing 780 changed files with 300 additions and 81,274 deletions.
6 changes: 6 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -63,3 +63,9 @@ Project/**/Debug/**
*.uvopt*
*.dep
*.TMP

# CCS specific
Project/**/.jxbrowser-data/**
Project/**/.metadata/**
Project/**/.tempFiles/**
Project/**/.jxbrowser-data/**
35 changes: 22 additions & 13 deletions MProkaron/Benchmark/Platform/test_MSP430FR5994.h
Original file line number Diff line number Diff line change
Expand Up @@ -11,8 +11,9 @@ Description : The testbench for MSP430FR5994.
/* End Includes **************************************************************/

/* Defines *******************************************************************/
/* This test is really slow. It takes 1-2 minutes(typ.1 min 30 sec) to run through @ 16MHz */
/* How to read counter */
#define COUNTER_READ() 0 //((TIM2->CNT)<<1)
#define COUNTER_READ() (TA1R)
/* Are we doing minimal measurements? */
/* #define MINIMAL_SIZE */
/* The MSP430 timers are all 16 bits, so */
Expand All @@ -23,12 +24,11 @@ typedef u16 tim_t;
#ifndef MINIMAL_SIZE
void Int_Handler(void);
ptr_t Stack_1[128];
struct RMP_Thd Thd_1={0};
volatile struct RMP_Thd Thd_1={0};
ptr_t Stack_2[128];
struct RMP_Thd Thd_2={0};
struct RMP_Sem Sem_1={0};
//TIM_HandleTypeDef TIM2_Handle={0};
//TIM_HandleTypeDef TIM4_Handle={0};
volatile struct RMP_Thd Thd_2={0};
volatile struct RMP_Sem Sem_1={0};
struct Timer_A_initUpModeParam TIM1_Handle={0};
/* End Globals ***************************************************************/

/* Begin Function:Timer_Init **************************************************
Expand All @@ -40,8 +40,15 @@ Return : None.
******************************************************************************/
void Timer_Init(void)
{
/* Initialize timer 2 to run at the same speed as the CPU */

/* Initialize timer 1 to run at 1/16 speed of the CPU */
TIM1_Handle.clockSource=TIMER_A_CLOCKSOURCE_SMCLK;
TIM1_Handle.clockSourceDivider=TIMER_A_CLOCKSOURCE_DIVIDER_1;
TIM1_Handle.timerPeriod=0xFFFF;
TIM1_Handle.timerInterruptEnable_TAIE=TIMER_A_TAIE_INTERRUPT_DISABLE;
TIM1_Handle.captureCompareInterruptEnable_CCR0_CCIE=TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE;
TIM1_Handle.timerClear=TIMER_A_SKIP_CLEAR;
TIM1_Handle.startTimer=1;
Timer_A_initUpMode(TA1_BASE,&TIM1_Handle);
}
/* End Function:Timer_Init ***************************************************/

Expand All @@ -54,14 +61,16 @@ Return : None.
******************************************************************************/
void Int_Init(void)
{
/* Initialize timer 2 to run at the same speed as the CPU */

/* Make sure that we also generate interrupts from the same timer */
TA1CCTL0|=CCIE;
}


/* The interrupt handler */
void TIM4_IRQHandler(void)
#pragma vector=TIMER1_A0_VECTOR
__interrupt void TIM1_IRQHandler(void)
{
TA1CCTL0&=~CCIFG;
Int_Handler();
}
/* End Function:Int_Init *****************************************************/
Expand All @@ -75,8 +84,8 @@ Return : None.
******************************************************************************/
void Int_Disable(void)
{
/* Disable timer 4 interrupt */

/* Disable timer 1 interrupt */
TA1CCTL0&=~CCIE;
}
#endif
/* End Function:Int_Disable **************************************************/
Expand Down
20 changes: 15 additions & 5 deletions MProkaron/Benchmark/test.c
Original file line number Diff line number Diff line change
Expand Up @@ -14,10 +14,10 @@ Description : The performance testbench for RMP. Do not modify this file; what

/* Globals *******************************************************************/
#ifndef MINIMAL_SIZE
tim_t Start=0;
tim_t End=0;
ptr_t Total=0;
ptr_t Temp=0;
volatile tim_t Start=0;
volatile tim_t End=0;
volatile ptr_t Total=0;
volatile ptr_t Temp=0;
/* Test results also written here */
volatile ptr_t Yield_Time=0;
volatile ptr_t Mailbox_Time=0;
Expand Down Expand Up @@ -45,7 +45,7 @@ void Test_Yield_1(void)

void Test_Mail_1(void)
{
cnt_t Count;
static cnt_t Count;
for(Count=0;Count<10000;Count++)
{
/* Read counter here */
Expand Down Expand Up @@ -211,14 +211,24 @@ void Int_Handler(void)
Count++;
Start=COUNTER_READ();
if(RMP_Thd_Snd_ISR(&Thd_2, 1)<0)
{
RMP_PRINTK_S("ISR Mailbox send failure: ");
RMP_PRINTK_I(Count);
RMP_PRINTK_S(" sends.\r\n");
while(1);
}
}
else if(Count<20000)
{
Count++;
Start=COUNTER_READ();
if(RMP_Sem_Post_ISR(&Sem_1, 1)<0)
{
RMP_PRINTK_S("ISR semaphore post failure: ");
RMP_PRINTK_I(Count);
RMP_PRINTK_S(" posts.\r\n");
while(1);
}
}
else
Int_Disable();
Expand Down
26 changes: 12 additions & 14 deletions MProkaron/Include/Kernel/kernel.h
Original file line number Diff line number Diff line change
Expand Up @@ -186,23 +186,23 @@ struct RMP_Sem
#ifndef __HDR_PUBLIC_MEMBERS__
/*****************************************************************************/
/* The scheduler bitmap */
static ptr_t RMP_Bitmap[RMP_BITMAP_SIZE];
static struct RMP_List RMP_Run[RMP_MAX_PREEMPT_PRIO];
static struct RMP_List RMP_Delay;
static volatile ptr_t RMP_Bitmap[RMP_BITMAP_SIZE];
static volatile struct RMP_List RMP_Run[RMP_MAX_PREEMPT_PRIO];
static volatile struct RMP_List RMP_Delay;

/* The timestamp value */
static ptr_t RMP_Tick;
static volatile ptr_t RMP_Tick;
/* Scheduler lock */
static ptr_t RMP_Sched_Lock_Cnt;
static ptr_t RMP_Sched_Locked;
static volatile ptr_t RMP_Sched_Lock_Cnt;
static volatile ptr_t RMP_Sched_Locked;
/* Scheduler pending */
static ptr_t RMP_Sched_Pend;
static volatile ptr_t RMP_Sched_Pend;
/* Timer events pending */
static ptr_t RMP_Timer_Pend;
static volatile ptr_t RMP_Timer_Pend;

/* Init thread */
static ptr_t RMP_Init_Stack[RMP_INIT_STACK_SIZE>>(RMP_WORD_ORDER-3)];
static struct RMP_Thd RMP_Init_Thd;
static volatile ptr_t RMP_Init_Stack[RMP_INIT_STACK_SIZE>>(RMP_WORD_ORDER-3)];
static volatile struct RMP_Thd RMP_Init_Thd;
/*****************************************************************************/
/* End Private Global Variables **********************************************/

Expand All @@ -224,11 +224,9 @@ static void _RMP_Timer_Proc(void);
#endif

/*****************************************************************************/


/* The current thread */
__EXTERN__ struct RMP_Thd* RMP_Cur_Thd;
__EXTERN__ ptr_t RMP_Cur_SP;
__EXTERN__ volatile struct RMP_Thd* RMP_Cur_Thd;
__EXTERN__ volatile ptr_t RMP_Cur_SP;
/*****************************************************************************/

/* End Public Global Variables ***********************************************/
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,9 @@ Description: The configuration file for MSP43FR5994.
******************************************************************************/

/* Defines *******************************************************************/
/* The TI-supplied header */
/* The TI-supplied headers */
#include <msp430.h>
#include "driverlib.h"

/* The maximum number of preemption priority levels in the system.
* This parameter must be divisible by the word length - 16 is usually sufficient */
Expand All @@ -22,22 +23,71 @@ Description: The configuration file for MSP43FR5994.
/* The stzck size of the init thread */
#define RMP_INIT_STACK_SIZE 128

/* We are using MSP430X */
/* We are using MSP430X or not */
#define RMP_MSP430_X RMP_TRUE
/* The tick timer value */
#define RMP_MSP430_TICK_VAL 10000

/* Other low-level initialization stuff - clock and serial */
#define RMP_MSP430_LOW_LEVEL_INIT() \
do \
{ \
struct Timer_A_initUpModeParam TIM0_Handle; \
struct EUSCI_A_UART_initParam UART0_Handle; \
/* Stop the WDT */ \
WDTCTL = WDTPW | WDTHOLD; \
/* Enable GPIO settings */ \
PM5CTL0&=~LOCKLPM5; \
/* 32.768kHz input */ \
GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_PJ, \
GPIO_PIN4+GPIO_PIN5, \
GPIO_PRIMARY_MODULE_FUNCTION); \
/* Set DCO frequency to 16 MHz */ \
CS_setDCOFreq(CS_DCORSEL_1, CS_DCOFSEL_4); \
/* Set SMCLK = DCO with frequency divider of 1 */ \
CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1); \
/* Set MCLK = DCO with frequency divider of 1 */ \
CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1); \
/* Set the timer 0 and its interrupts - timer 0 will be fully occupied by the OS */\
TIM0_Handle.clockSource=TIMER_A_CLOCKSOURCE_SMCLK; \
TIM0_Handle.clockSourceDivider=TIMER_A_CLOCKSOURCE_DIVIDER_16; \
TIM0_Handle.timerPeriod=RMP_MSP430_TICK_VAL; \
TIM0_Handle.timerInterruptEnable_TAIE=TIMER_A_TAIE_INTERRUPT_DISABLE; \
TIM0_Handle.captureCompareInterruptEnable_CCR0_CCIE=TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE; \
TIM0_Handle.timerClear=TIMER_A_SKIP_CLEAR; \
TIM0_Handle.startTimer=1; \
Timer_A_initUpMode(TA0_BASE,&TIM0_Handle); \
Timer_A_enableCaptureCompareInterrupt(TA0_BASE, OFS_TAxCCTL1); \
/* UART init */ \
UART0_Handle.selectClockSource=EUSCI_A_UART_CLOCKSOURCE_SMCLK; \
UART0_Handle.clockPrescalar=8; \
UART0_Handle.firstModReg=10; \
UART0_Handle.secondModReg=0xF7; \
UART0_Handle.parity=EUSCI_A_UART_NO_PARITY; \
UART0_Handle.msborLsbFirst=EUSCI_A_UART_LSB_FIRST; \
UART0_Handle.numberofStopBits=EUSCI_A_UART_ONE_STOP_BIT; \
UART0_Handle.uartMode=EUSCI_A_UART_MODE; \
UART0_Handle.overSampling=EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION; \
EUSCI_A_UART_init(EUSCI_A0_BASE, &UART0_Handle); \
EUSCI_A_UART_enable(EUSCI_A0_BASE); \
/* GPIO Init */ \
GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P2, GPIO_PIN0, GPIO_SECONDARY_MODULE_FUNCTION); \
GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P2, GPIO_PIN1, GPIO_SECONDARY_MODULE_FUNCTION); \
EUSCI_A_UART_transmitData(EUSCI_A0_BASE,'\r'); \
EUSCI_A_UART_transmitData(EUSCI_A0_BASE,'\n'); \
} \
while(0)

/* Flag operations */
#define RMP_MSP430_PEND_SOFT_FLAG() {TA0CCTL1|=CCIFG;}
#define RMP_MSP430_CLEAR_SOFT_FLAG() {TA0CCTL1&=~CCIFG;}
#define RMP_MSP430_CLEAR_TIMER_FLAG() {TA0CCTL0&=~CCIFG;}

/* This is for debugging output */
#define RMP_MSP430_PUTCHAR(CHAR) \
do \
{ \
EUSCI_A_UART_transmitData(EUSCI_A0_BASE,(CHAR)); \
} \
while(0)
/* End Defines ***************************************************************/
Expand Down
14 changes: 12 additions & 2 deletions MProkaron/Include/Platform/MSP430/platform_msp430.h
Original file line number Diff line number Diff line change
Expand Up @@ -83,14 +83,20 @@ typedef s16 ret_t;
/* The maximum length of char printing - no need to change this in most cases */
#define RMP_KERNEL_DEBUG_MAX_STR 128
/* The offset of the stack when initializing */
#define RMP_INIT_STACK RMP_INIT_STACK_TAIL(17)
#define RMP_INIT_STACK RMP_INIT_STACK_TAIL(12)

/* The CPU and application specific macros are here */
#include "platform_msp430_conf.h"
/* End System macros *********************************************************/

/* MSP430 specific macros ****************************************************/
#define RMP_MSP430_SR_SCG1 (1<<7)
#define RMP_MSP430_SR_SCG0 (1<<6)
#define RMP_MSP430_SR_OSCOFF (1<<5)
#define RMP_MSP430_SR_CPUOFF (1<<4)
#define RMP_MSP430_SR_GIE (1<<3)

#define RMP_MSP430X_PCSR(PC,SR) (((PC)<<16)|(((PC)>>4)&0xF000)|(SR))
/*****************************************************************************/
/* __PLATFORM_MSP430_H_DEFS__ */
#endif
Expand Down Expand Up @@ -165,13 +171,17 @@ EXTERN void RMP_Enable_Int(void);

__EXTERN__ ptr_t RMP_MSB_Get(ptr_t Val);
EXTERN void _RMP_Start(ptr_t Entry, ptr_t Stack);
EXTERN void _RMP_Yield(void);
__EXTERN__ void _RMP_Yield(void);

/* Initialization */
__EXTERN__ void _RMP_Stack_Init(ptr_t Entry, ptr_t Stack, ptr_t Arg);
__EXTERN__ void _RMP_Low_Level_Init(void);
__EXTERN__ void RMP_Putchar(char Char);
__EXTERN__ void _RMP_Plat_Hook(void);

/* Platform-dependent hooks */
__EXTERN__ void _RMP_Clear_Soft_Flag(void);
__EXTERN__ void _RMP_Clear_Timer_Flag(void);
/*****************************************************************************/
/* Undefine "__EXTERN__" to avoid redefinition */
#undef __EXTERN__
Expand Down
13 changes: 8 additions & 5 deletions MProkaron/Kernel/kernel.c
Original file line number Diff line number Diff line change
Expand Up @@ -261,8 +261,6 @@ Return : None.
******************************************************************************/
void RMP_Lock_Sched(void)
{
/* Disable first before registering it. If an switch occurs between
* registering and disabling, then register-and-disable will cause fault. */
RMP_Sched_Locked=1;
RMP_Sched_Lock_Cnt++;
}
Expand Down Expand Up @@ -290,8 +288,11 @@ void RMP_Unlock_Sched(void)
_RMP_Yield();
}
}
else if(RMP_Sched_Lock_Cnt!=0)
else if(RMP_Sched_Lock_Cnt>1)
RMP_Sched_Lock_Cnt--;
/* Trying to unlock a scheduler that is not locked */
else
while(1);
}
/* End Function:RMP_Unlock_Sched *********************************************/

Expand Down Expand Up @@ -1057,7 +1058,9 @@ ret_t RMP_Thd_Rcv(ptr_t* Data, ptr_t Slices)
RMP_THD_STATE_SET(RMP_Cur_Thd->State,RMP_THD_RCVBLK);

RMP_Unlock_Sched();

/* Dummy read - to separate the lock & unlock. If the compiler optimizes these two
* functions(inline them) on some architectures sometimes we never block. */
*Data=RMP_Cur_Thd->Mailbox;
/* We've been unblocked. There must be something in our mbox, or we should have failed */
RMP_Lock_Sched();
*Data=RMP_Cur_Thd->Mailbox;
Expand Down Expand Up @@ -1553,7 +1556,7 @@ int main(void)
/* Now boot into the first thread */
RMP_Clear(&RMP_Init_Thd,sizeof(struct RMP_Thd));
RMP_Init_Thd.Prio=0;
RMP_Init_Thd.Slices=RMP_MAX_SLICES-1;
RMP_Init_Thd.Slices=10;
RMP_Init_Thd.Slices_Left=10;
RMP_Init_Thd.State=RMP_THD_RUNNING;
RMP_Init_Thd.Stack=RMP_INIT_STACK;
Expand Down
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