Why?

This repository serves as both a theoretical and practical guide to performing summations in FPGAs, specifically using the RedPitaya 125-14 and Vivado. The goal is to aid in the understanding and implementation of projects that involve this type of problem.

Table of Contents

• Introduction
• Resources
  • .xdc File
  • IP Libraries
• Important Blocks to Know
  • AXI GPIO
  • DMA
  • Zynq Processing System
  • Custom Blocks
• Tutorial
  • Adding Two Numbers
  • Adding Negative Numbers
  • Adding Arrays of Numbers

Possible improvments and todo list

• [] Fast Fourier Transform
• [] Correlation

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