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update root descriptor offset after link/merge #488
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retest this please |
Test summary for commit 2c15839Driver commits used in build
ShaderDB test
CTS tests (built with branch Vulkan-CTS-1.2.0.2-fetch-sources-fix)
Rhel 7.6, Vega10Ubuntu 18.04, Navi10Ubuntu 18.04, Ellesmere |
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Test summary for commit c032a18Driver commits used in build
ShaderDB test
CTS tests (built with branch Vulkan-CTS-1.2.0.2-fetch-sources-fix)
Rhel 7.6, Vega10Ubuntu 18.04, Navi10Ubuntu 18.04, Ellesmere |
Test summary for commit 17ce2cbDriver commits used in build
ShaderDB test
CTS tests (built with branch Vulkan-CTS-1.2.0.2-fetch-sources-fix)
Rhel 7.6, Vega10Ubuntu 18.04, Navi10Ubuntu 18.04, Ellesmere |
Test summary for commit 8746bb2Driver commits used in build
ShaderDB test
CTS tests (built with branch Vulkan-CTS-1.2.0.2-fetch-sources-fix)
Rhel 7.6, Vega10Ubuntu 18.04, Navi10Ubuntu 18.04, Ellesmere |
Test summary for commit 4baf50cDriver commits used in build
ShaderDB test
CTS tests (built with branch Vulkan-CTS-1.2.0.2-fetch-sources-fix)
Rhel 7.6, Vega10Ubuntu 18.04, Navi10Ubuntu 18.04, Ellesmere |
ping... |
there is conflicts, please rebase. |
@kuhar please review this patch |
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Let's make it pending for another day in case there are more comments.
Also, a rebase is needed because llpc.h is changed. |
rebased with Tim's separation, some constant needs to be defined in two places(llpcUtil.h and llpcInternal.h), seems it doesn't make sense. Is that expected? |
llpcUtil.h is for front-end definitions. llpcInternal.h is for middle-end definitions, and will soo be moving, with the whole of the middle-end, into a different directory. The multiple definition problem is caused by the elf linking code being in the wrong place -- it should really be in the middle-end. But we're not going to fix that short-term, so for now let's leave the multiple definitions. |
I'm not familiar with these parts of the codebase the code touches, so I only commented about some nits I found without approving the patch. I don't see any issues in the current revision. |
build failure: |
fill descriptor magic number and set number to USER_DATA registers, accordingly update offset after link/merge v2: a. fix cts failures(care userDataLimit). b. add option to decide if enable this feature. c. add mask to get Magic and set. d. improve coding style. v3: rebase Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Test summary for commit 85f386bDriver commits used in build
ShaderDB test
CTS tests (built with branch Vulkan-CTS-1.2.0.2-fetch-sources-fix)
Rhel 7.6, Vega10Ubuntu 18.04, Navi10 |
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This should not have been committed as-is :(
@@ -1320,6 +1334,19 @@ uint32_t GraphicsShaderCacheChecker::Check( | |||
return stageMask; | |||
} | |||
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// ===================================================================================================================== | |||
// Update root level descriptor offset for graphics pipeline. | |||
void GraphicsShaderCacheChecker::UpdateRootUserDateOffset( |
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UserData
// Whether update descriptor root offset in ELF | ||
bool updateDescInElf; |
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Can you provide a more useful comment?
it has been merged, do you need I make another patch or just drop your comments? :) |
I'm still trying to understand some of the details of how this is going to be used. I will follow up. |
…/merge fill descriptor magic number and set number to USER_DATA registers, accordingly update offset after link/merge v2: a. fix cts failures(care userDataLimit). b. add option to decide if enable this feature. c. add mask to get Magic and set. d. improve coding style. v3: rebase Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Pull Request: GPUOpen-Drivers#488 OVS = http://ocltc.amd.com:8111/viewModification.html?modId=132590&personal=true&init=1&tab=vcsModificationTests git-pf-change: stg@2081347
fill descriptor magic number and set number to USER_DATA registers,
accordingly update offset after link/merge
v2:
a. fix cts failures(care userDataLimit).
b. add option to decide if enable this feature.
c. add mask to get Magic and set.
d. improve coding style.
Signed-off-by: Chunming Zhou david1.zhou@amd.com