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1. 5bitsMulti-gf180 5bitsMulti-gf180 Public

   Digital flow implementation using OpenLane for a custom 5-bit multiplier.

   Python

2. ADC_LogiCompilation-gf180 ADC_LogiCompilation-gf180 Public

   Compilation of three different ADC digital logics for GFMPW-1

   Verilog

3. RO_Aging_UNICASS RO_Aging_UNICASS Public

   This repository includes the files related to the proposal entitled ‘Ring Oscillators Frequency degradation for Reliability characterization with Bias temperature instability (BTI) and hot carrier …

   Python

4. SC_RISC-V_OpenLane_AcTest SC_RISC-V_OpenLane_AcTest Public

   Forked from DanielBarrios2190/Openlane_Actions_test

   Single Cycle RISC-V Implementation usign OpenLane

   Verilog

5. tt04-submission-TrafficLight tt04-submission-TrafficLight Public

   Forked from TinyTapeout/tt04-submission-template

   Traffic Light for Tiny Tapeout 04

   Verilog

6. Computer-Programming-I-UIS/game-tetragon Computer-Programming-I-UIS/game-tetragon Public

   game-tetragon created by GitHub Classroom

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