PSoC™ 6 MCU: SGPIO target interface

This code example uses a SPI resource and Smart I/O in PSoC™ 6 MCU to implement the serial general purpose input/output (SGPIO) target interface, which is a four-signal bus defined in the SFF-8485 standard. Another SPI resource is used to implement the SGPIO initiator, which drives the clock on the SGPIO bus.

View this README on GitHub.

Provide feedback on this code example.

Requirements

• ModusToolbox™ software v3.0 or later (tested with v3.0)
• PSoC™ 6 Board support package (BSP) minimum required version: 4.0.0
• Programming language: C
• Associated parts: All PSoC™ 6 MCU and XMC7000 MCU parts

Supported toolchains (make variable 'TOOLCHAIN')

• GNU Arm® embedded compiler v10.3.1 (GCC_ARM) - Default value of TOOLCHAIN
• Arm® compiler v6.16 (ARM)
• IAR C/C++ compiler v9.30.1 (IAR)

Supported kits (make variable 'TARGET')

• PSoC™ 6 Wi-Fi Bluetooth® prototyping kit (CY8CPROTO-062-4343W) – Default value of TARGET
• PSoC™ 6 Wi-Fi Bluetooth® pioneer kit (CY8CKIT-062-WIFI-BT)
• PSoC™ 6 Bluetooth® LE pioneer kit (CY8CKIT-062-BLE)
• PSoC™ 6 Bluetooth® LE prototyping kit (CY8CPROTO-063-BLE)
• PSoC™ 62S2 Wi-Fi Bluetooth® pioneer kit (CY8CKIT-062S2-43012)
• PSoC™ 64 "Secure Boot" Wi-Fi Bluetooth® pioneer kit (CY8CKIT-064B0S2-4343W)
• Rapid IoT connect platform RP01 feather kit (CYSBSYSKIT-01)
• Rapid IoT connect developer kit (CYSBSYSKIT-DEV-01)
• PSoC™ 62S2 evaluation kit (CY8CEVAL-062S2, CY8CEVAL-062S2-LAI-4373M2)

Hardware setup

This example implements a loop back between the SGPIO target and SGPIO master. External wiring is required between pins.

Table 1. External wire connections

Kit's name	Pins to connect	SGPIO signal description
CY8CPROTO-062-4343W	P9[0] to P13[0] P9[1] to P13[1] P9[2] to P13[2] P9[3] to P13[3]	SDataOut SDataIn SClock SLoad
CYSBSYSKIT-01	P9[0] to P5[0] P9[1] to P5[1] P9[2] to P5[2] P9[3] to P5[3]	SDataOut SDataIn SClock SLoad
CYSBSYSKIT-DEV-01	P9[0] to P5[0] P9[1] to P5[1] P9[2] to P5[2] P9[3] to P5[3]	SDataOut SDataIn SClock SLoad
All other kits	P9[0] to P10[0] P9[1] to P10[1] P9[2] to P10[2] P9[3] to P10[3]	SDataOut SDataIn SClock SLoad

Pins from port 9 are mapped to the SGPIO target. Pins from port 13 or 10 are mapped to the SGPIO initiator.

Note: Only port 9 and port 8 support Smart I/O. That means the SGPIO target can only be placed in the 0~3 pins of these two ports.

This example uses the board's default configuration. See the kit user guide to ensure that the board is configured correctly.

Note: For this example project using the above pin connections, the PSoC™ 6 Wi-Fi Bluetooth® pioneer kit (CY8CKIT-062-WIFI-BT) requires a zero-ohm resistor to be added at R162.

Note: The PSoC™ 6 Bluetooth® LE pioneer kit (CY8CKIT-062-BLE) and the PSoC™ 6 Wi-Fi Bluetooth® pioneer kit (CY8CKIT-062-WIFI-BT) ship with KitProg2 installed. The ModusToolbox™ software requires KitProg3. Before using this code example, make sure that the board is upgraded to KitProg3. The tool and instructions are available in the Firmware Loader GitHub repository. If you do not upgrade, you will see an error like "unable to find CMSIS-DAP device" or "KitProg firmware is out of date".

Software setup

Install a terminal emulator if you do not have one. Instructions in this document use Tera Term.

This example requires no additional software or tools.

Using the code example

Create the project and open it using one of the following:

In Eclipse IDE for ModusToolbox™ software

1. Click the New Application link in the Quick Panel (or, use File > New > ModusToolbox™ Application). This launches the Project Creator tool.

2. Pick a kit supported by the code example from the list shown in the Project Creator - Choose Board Support Package (BSP) dialog.

   When you select a supported kit, the example is reconfigured automatically to work with the kit. To work with a different supported kit later, use the Library Manager to choose the BSP for the supported kit. You can use the Library Manager to select or update the BSP and firmware libraries used in this application. To access the Library Manager, click the link from the Quick Panel.

   You can also just start the application creation process again and select a different kit.

   If you want to use the application for a kit not listed here, you may need to update the source files. If the kit does not have the required resources, the application may not work.

3. In the Project Creator - Select Application dialog, choose the example by enabling the checkbox.

4. (Optional) Change the suggested New Application Name.

5. The Application(s) Root Path defaults to the Eclipse workspace which is usually the desired location for the application. If you want to store the application in a different location, you can change the Application(s) Root Path value. Applications that share libraries should be in the same root path.

6. Click Create to complete the application creation process.

For more details, see the Eclipse IDE for ModusToolbox™ software user guide (locally available at {ModusToolbox™ software install directory}/docs_{version}/mt_ide_user_guide.pdf).

In command-line interface (CLI)

ModusToolbox™ software provides the Project Creator as both a GUI tool and the command line tool, "project-creator-cli". The CLI tool can be used to create applications from a CLI terminal or from within batch files or shell scripts. This tool is available in the {ModusToolbox™ software install directory}/tools_{version}/project-creator/ directory.

Use a CLI terminal to invoke the "project-creator-cli" tool. On Windows, use the command line "modus-shell" program provided in the ModusToolbox™ software installation instead of a standard Windows command-line application. This shell provides access to all ModusToolbox™ software tools. You can access it by typing modus-shell in the search box in the Windows menu. In Linux and macOS, you can use any terminal application.

The "project-creator-cli" tool has the following arguments:

Argument	Description	Required/optional
--board-id	Defined in the <id> field of the BSP manifest	Required
--app-id	Defined in the <id> field of the CE manifest	Required
--target-dir	Specify the directory in which the application is to be created if you prefer not to use the default current working directory	Optional
--user-app-name	Specify the name of the application if you prefer to have a name other than the example's default name	Optional

The following example clones the "Hello world" application with the desired name "MyHelloWorld" configured for the CY8CPROTO-062-4343W BSP into the specified working directory, C:/mtb_projects:

project-creator-cli --board-id CY8CPROTO-062-4343W --app-id mtb-example-psoc6-hello-world --user-app-name MyHelloWorld --target-dir "C:/mtb_projects"

Note: The project-creator-cli tool uses the git clone and make getlibs commands to fetch the repository and import the required libraries. For details, see the "Project creator tools" section of the ModusToolbox™ software user guide (locally available at {ModusToolbox™ software install directory}/docs_{version}/mtb_user_guide.pdf).

To work with a different supported kit later, use the Library Manager to choose the BSP for the supported kit. You can invoke the Library Manager GUI tool from the terminal using make modlibs command or use the Library Manager CLI tool "library-manager-cli" to change the BSP.

The "library-manager-cli" tool has the following arguments:

Argument	Description	Required/optional
--add-bsp-name	Name of the BSP that should be added to the application	Required
--set-active-bsp	Name of the BSP that should be as active BSP for the application	Required
--add-bsp-version	Specify the version of the BSP that should be added to the application if you do not wish to use the latest from manifest	Optional
--add-bsp-location	Specify the location of the BSP (local/shared) if you prefer to add the BSP in a shared path	Optional

Following example adds the CY8CPROTO-062-4343W BSP to the already created application and makes it the active BSP for the app:

library-manager-cli --project "C:/mtb_projects/MyHelloWorld" --add-bsp-name CY8CPROTO-062-4343W --add-bsp-version "latest-v4.X" --add-bsp-location "local"

library-manager-cli --project "C:/mtb_projects/MyHelloWorld" --set-active-bsp APP_CY8CPROTO-062-4343W

In third-party IDEs

Use one of the following options:

• Use the standalone Project Creator tool:

  1. Launch Project Creator from the Windows Start menu or from {ModusToolbox™ software install directory}/tools_{version}/project-creator/project-creator.exe.

  2. In the initial Choose Board Support Package screen, select the BSP, and click Next.

  3. In the Select Application screen, select the appropriate IDE from the Target IDE drop-down menu.

  4. Click Create and follow the instructions printed in the bottom pane to import or open the exported project in the respective IDE.

• Use command-line interface (CLI):

  1. Follow the instructions from the In command-line interface (CLI) section to create the application.

  2. Export the application to a supported IDE using the make <ide> command.

  3. Follow the instructions displayed in the terminal to create or import the application as an IDE project.

For a list of supported IDEs and more details, see the "Exporting to IDEs" section of the ModusToolbox™ software user guide (locally available at {ModusToolbox™ software install directory}/docs_{version}/mtb_user_guide.pdf).

Operation

If using a PSoC™ 64 "Secure" MCU kit (like CY8CKIT-064B0S2-4343W), the PSoC™ 64 device must be provisioned with keys and policies before being programmed. Follow the instructions in the "Secure Boot" SDK user guide to provision the device. If the kit is already provisioned, copy-paste the keys and policy folder to the application folder.

1. Connect the board to your PC using the provided USB cable through the KitProg3 USB connector.

2. Open a terminal program and select the KitProg3 COM port. Set the serial port parameters to 8N1 and 115200 baud.

3. Program the board using one of the following:

   Using Eclipse IDE for ModusToolbox™ software

   1. Select the application project in the Project Explorer.

   2. In the Quick Panel, scroll down, and click <Application Name> Program (KitProg3_MiniProg4).

   Using CLI

   From the terminal, execute the make program command to build and program the application using the default toolchain to the default target. The default toolchain and target are specified in the application's Makefile but you can override those values manually:

   make program TARGET=<BSP> TOOLCHAIN=<toolchain>
   

   Example:

   make program TARGET=CY8CPROTO-062-4343W TOOLCHAIN=GCC_ARM
   

4. After programming, the application starts automatically. Confirm that "<CE Title>" is displayed on the UART terminal.

   Figure 1. Terminal output on program startup

   

5. The device constantly writes the same data to the SGPIO bus. Press the kit's user button to print the latest status of the device. Confirm that the terminal displays the following information.

   Figure 2. Terminal output on button press

   

Debugging

You can debug the example to step through the code. In the IDE, use the <Application Name> Debug (KitProg3_MiniProg4) configuration in the Quick Panel. For details, see the "Program and debug" section in the Eclipse IDE for ModusToolbox™ software user guide.

Note: (Only while debugging) On the CM4 CPU, some code in main() may execute before the debugger halts at the beginning of main(). This means that some code executes twice – once before the debugger stops execution, and again after the debugger resets the program counter to the beginning of main(). See KBA231071 to learn about this and for the workaround.

Design and implementation

This design provides middleware files (sgpio_target.c/h) to implement the SGPIO target interface. It requires an SPI resource and a Smart I/O resource. All the initialization of these blocks are handled by the middleware. You need to configure only the clocks and pin assignment for the SPI and Smart I/O.

SGPIO interface overview

The SGPIO interface time diagram is shown as follows. It streams information about 4 drives, where each drive contains 3 bits.

Figure 3. Repeating bit stream (from SFF-8485)

Due to the similarities to the SPI interface, you can leverage the SPI master to simulate the SGPIO initiator. The SPI master is configured with the Sub Mode set to TI (Start Coincides) and the data width set to 12 (size of the SGPIO frame for 4 drives).

Figure 4. SPI frame as SGPIO initiator

Note: The SGPIO target can support up to 20 drives, but the SGPIO initiator in this example only works with 4 drives.

The mapping between the two interfaces is shown in the following table:

Table 2. SPI and SGPIO mapping

SPI signal	SGPIO signal	Description
SCLK	SClock	Clock driven by the SPI master / SGPIO initiator
MOSI	SDataOut	Data driven by the SPI master / SGPIO initiator
MISO	SDataIn	Data driven by the SPI slave / SGPIO target
SS	SLoad	Indicates when the bit stream starts

Note: SLoad in the SGPIO interface contains some additional vendor-specific bits. These bits are not supported in this implementation.

Each SGPIO frame contains information about a drive. It has three bits and can indicate the drive's information such as activity, location, and errors.

Clocking

The SGPIO interface requires a bus clock of up to 100 kHz. Therefore, the SPI master (SGPIO initiator) data rate is configured to 100 kbps.

The SPI slave (SGPIO target) data rate is configured to a higher data rate (1000 kbps) to work with the Smart I/O, which is sourced by the same clock linked to the SGPIO target.

Firmware overview

The firmware is designed to constantly send data over the SGPIO interface. When the kit's button is pressed, the drive's information is printed to the terminal.

The SGPIO target init function requires an SPI resource and Smart I/O resource as arguments. The SPI resource is configured to generate an interrupt when the Rx buffer is not empty. The interrupt handler parses the bits to construct the SGPIO frame so that you can use high-level functions in the firmware to read/write to the SGPIO bus.

The Smart I/O resource is configured to translate the SGPIO-SLoad signal to the SPI-SS signal. It uses the internal LUTs to detect the rising edge of the SGPIO-SLoad signal, which indicates when the SPI-SS signal needs to assert. The data lines between the SPI and SGPIO behave identically, not requiring any manipulation by the Smart I/O resource.

There are two interrupts in this code example:

• button_interrupt_handler: It triggers on pressing the kit's button. It sets a flag to be read in the main loop.

• sgpio_interrupt_handler: It triggers when the SGPIO target's internal FIFO has data. It executes the SGPIO target middleware interrupt function.

Resources and settings

Table 3. Application resources

Resource	Alias/object	Purpose
SCB (SPI) (PDL)	SGPIO_INITIATOR_SPI	Simulates the SGPIO initiator
SCB (SPI) (PDL)	SGPIO_TARGET_SPI	Used by the SGPIO target middleware to serialize data
Smart I/O (PDL)	SMARTIO	Used by the SGPIO target middleware to translate SPI to SGPIO
UART (HAL)	cy_retarget_io_uart_obj	UART HAL object used by retarget-io for the Debug UART port
GPIO (HAL)	CYBSP_USER_BTN	User button

Related resources

Resources	Links
Application notes	AN228571 – Getting started with PSoC™ 6 MCU on ModusToolbox™ software AN215656 – PSoC™ 6 MCU: Dual-CPU system design
Code examples	Using ModusToolbox™ software on GitHub Using PSoC™ Creator
Device documentation	PSoC™ 6 MCU datasheets PSoC™ 6 technical reference manuals
Development kits	Select your kits from the evaluation board finder
Libraries on GitHub	mtb-pdl-cat1 – PSoC™ 6 peripheral driver library (PDL) mtb-hal-cat1 – Hardware abstraction layer (HAL) library retarget-io – Utility library to retarget STDIO messages to a UART port
Middleware on GitHub	capsense – CAPSENSE™ library and documents psoc6-middleware – Links to all PSoC™ 6 MCU middleware
Tools	Eclipse IDE for ModusToolbox™ software – ModusToolbox™ software is a collection of easy-to-use software and tools enabling rapid development with Infineon MCUs, covering applications from embedded sense and control to wireless and cloud-connected systems using AIROC™ Wi-Fi and Bluetooth® connectivity devices.

Other resources

Infineon provides a wealth of data at www.infineon.com to help you select the right device, and quickly and effectively integrate it into your design.

For PSoC™ 6 MCU devices, see How to design with PSoC™ 6 MCU – KBA223067 in the Infineon community.

Document history

Document title: CE231066 - PSoC™ 6 MCU: SGPIO target interface

Version	Description of change
1.0.0	New code example
1.1.0	Added support for CYSBSYSKIT-01 Rapid IoT connect platform RP01 feather kit
1.2.0	Added support for CYSBSYSKIT-DEV-01 Rapid IoT connect developer kit
1.3.0	Updated CUSTOM design.modus for CYSBSYSKIT-01 Rapid IoT connect developer kit
1.4.0	Updated to support ModusToolbox™ software v2.3 Added support for CY8CEVAL-062S2, CY8CEVAL-062S2-LAI-4373M2
2.0.0	Removed target specific macros from the source code
3.0.0	Major Updated to support ModusToolbox™ software v3.0 and BSPs v4.X This version is not backward compatible with previous versions of ModusToolbox

---

© Cypress Semiconductor Corporation, 2020-2022. This document is the property of Cypress Semiconductor Corporation, an Infineon Technologies company, and its affiliates ("Cypress"). This document, including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress’s patents that are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited.
TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. No computing device can be absolutely secure. Therefore, despite security measures implemented in Cypress hardware or software products, Cypress shall have no liability arising out of any security breach, such as unauthorized access to or use of a Cypress product. CYPRESS DOES NOT REPRESENT, WARRANT, OR GUARANTEE THAT CYPRESS PRODUCTS, OR SYSTEMS CREATED USING CYPRESS PRODUCTS, WILL BE FREE FROM CORRUPTION, ATTACK, VIRUSES, INTERFERENCE, HACKING, DATA LOSS OR THEFT, OR OTHER SECURITY INTRUSION (collectively, "Security Breach"). Cypress disclaims any liability relating to any Security Breach, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from any Security Breach. In addition, the products described in these materials may contain design defects or errors known as errata which may cause the product to deviate from published specifications. To the extent permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. "High-Risk Device" means any device or system whose failure could cause personal injury, death, or property damage. Examples of High-Risk Devices are weapons, nuclear installations, surgical implants, and other medical devices. "Critical Component" means any component of a High-Risk Device whose failure to perform can be reasonably expected to cause, directly or indirectly, the failure of the High-Risk Device, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from any use of a Cypress product as a Critical Component in a High-Risk Device. You shall indemnify and hold Cypress, including its affiliates, and its directors, officers, employees, agents, distributors, and assigns harmless from and against all claims, costs, damages, and expenses, arising out of any claim, including claims for product liability, personal injury or death, or property damage arising from any use of a Cypress product as a Critical Component in a High-Risk Device. Cypress products are not intended or authorized for use as a Critical Component in any High-Risk Device except to the limited extent that (i) Cypress’s published data sheet for the product explicitly states Cypress has qualified the product for use in a specific High-Risk Device, or (ii) Cypress has given you advance written authorization to use the product as a Critical Component in the specific High-Risk Device and you have signed a separate indemnification agreement.
Cypress, the Cypress logo, and combinations thereof, WICED, ModusToolbox, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress or a subsidiary of Cypress in the United States or in other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.