ARM and AArch64 feature bits

src/features_aarch64.h

@@ -0,0 +1,13 @@
+// This file is a part of Julia. License is MIT: https://julialang.org/license
+
+// AArch64 features definition
+// hwcap
+AArch64_FEATURE_DEF(crypto, 3, 0)
+AArch64_FEATURE_DEF(crc, 7, 0)
+AArch64_FEATURE_DEF(lse, 8, 0)
+AArch64_FEATURE_DEF(fullfp16, 9, 0)
+AArch64_FEATURE_DEF(rdm, 12, 50000)
+AArch64_FEATURE_DEF(jscvt, 13, UINT32_MAX)
+AArch64_FEATURE_DEF(fcma, 14, UINT32_MAX)
+AArch64_FEATURE_DEF(lrcpc, 15, UINT32_MAX)
+// AArch64_FEATURE_DEF(ras, ???, 0)

src/features_arm.h

@@ -0,0 +1,28 @@
+// This file is a part of Julia. License is MIT: https://julialang.org/license
+
+// ARM features definition
+// hwcap
+ARM_FEATURE_DEF(neon, 12, 0)
+ARM_FEATURE_DEF(vfp3, 13, 0)
+// ARM_FEATURE_DEF(vfpv3d16, 14, 0) // d16
+ARM_FEATURE_DEF(vfp4, 16, 0)
+ARM_FEATURE_DEF(hwdiv_arm, 17, 0)
+ARM_FEATURE_DEF(hwdiv, 18, 0)
+ARM_FEATURE_DEF(d32, 19, 0) // -d16
+
+// hwcap2
+ARM_FEATURE_DEF(crypto, 32 + 0, 0)
+ARM_FEATURE_DEF(crc, 32 + 4, 0)
+// ARM_FEATURE_DEF(ras, 32 + ???, 0)
+// ARM_FEATURE_DEF(fullfp16, 32 + ???, 0)
+
+// custom bits to match llvm model
+ARM_FEATURE_DEF(v7, 32 * 2 + 0, 0)
+ARM_FEATURE_DEF(v7a, 32 * 2 + 1, 0)
+ARM_FEATURE_DEF(v7r, 32 * 2 + 2, 0)
+// no v7m for now
+ARM_FEATURE_DEF(v8, 32 * 2 + 3, 0)
+ARM_FEATURE_DEF(v8a, 32 * 2 + 4, 0)
+ARM_FEATURE_DEF(v8r, 32 * 2 + 5, 0)
+ARM_FEATURE_DEF(v8_1a, 32 * 2 + 6, 0)
+ARM_FEATURE_DEF(v8_2a, 32 * 2 + 7, 0)

src/processor.h

@@ -55,6 +55,12 @@ typedef enum {
 #define X86_FEATURE_DEF(name, bit, llvmver) JL_X86_##name = bit,
 #include "features_x86.h"
 #undef X86_FEATURE_DEF
+#define ARM_FEATURE_DEF(name, bit, llvmver) JL_ARM_##name = bit,
+#include "features_arm.h"
+#undef ARM_FEATURE_DEF
+#define AArch64_FEATURE_DEF(name, bit, llvmver) JL_AArch64_##name = bit,
+#include "features_aarch64.h"
+#undef AArch64_FEATURE_DEF
 } jl_cpu_feature_t;
 
 int jl_test_cpu_feature(jl_cpu_feature_t feature);