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Jzjerry/readme.md

Hi, I'm JIANG (Jerry) Zijun

Click here to learn more about me!

✨Fancy Stuffs✨

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Code Time

Profile Views

I'm an Early 🐤

🌞 Morning                64 commits          █░░░░░░░░░░░░░░░░░░░░░░░░   04.70 % 
🌆 Daytime                715 commits         █████████████░░░░░░░░░░░░   52.53 % 
🌃 Evening                504 commits         █████████░░░░░░░░░░░░░░░░   37.03 % 
🌙 Night                  78 commits          █░░░░░░░░░░░░░░░░░░░░░░░░   05.73 % 

📅 I'm Most Productive on Monday

Monday                   281 commits         █████░░░░░░░░░░░░░░░░░░░░   20.65 % 
Tuesday                  263 commits         █████░░░░░░░░░░░░░░░░░░░░   19.32 % 
Wednesday                196 commits         ████░░░░░░░░░░░░░░░░░░░░░   14.40 % 
Thursday                 222 commits         ████░░░░░░░░░░░░░░░░░░░░░   16.31 % 
Friday                   209 commits         ████░░░░░░░░░░░░░░░░░░░░░   15.36 % 
Saturday                 95 commits          ██░░░░░░░░░░░░░░░░░░░░░░░   06.98 % 
Sunday                   95 commits          ██░░░░░░░░░░░░░░░░░░░░░░░   06.98 % 

📊 This Week I Spent My Time On

🕑︎ Time Zone: Asia/Shanghai

💬 Programming Languages: 
Python                   42 mins             █████████████████████████   99.95 % 
Makefile                 0 secs              ░░░░░░░░░░░░░░░░░░░░░░░░░   00.04 % 
S                        0 secs              ░░░░░░░░░░░░░░░░░░░░░░░░░   00.02 % 

🔥 Editors: 
VS Code                  42 mins             █████████████████████████   100.00 % 

💻 Operating System: 
WSL                      42 mins             █████████████████████████   100.00 % 

I Mostly Code in Python

Python                   11 repos            ██████░░░░░░░░░░░░░░░░░░░   25.58 % 
C++                      7 repos             ████░░░░░░░░░░░░░░░░░░░░░   16.28 % 
Scala                    7 repos             ████░░░░░░░░░░░░░░░░░░░░░   16.28 % 
C                        7 repos             ████░░░░░░░░░░░░░░░░░░░░░   16.28 % 
Verilog                  6 repos             ███░░░░░░░░░░░░░░░░░░░░░░   13.95 % 

Last Updated on 06/10/2024 18:39:36 UTC

Pinned Loading

  1. Jzjerry.github.io Jzjerry.github.io Public

    HTML 2

  2. VexRiscv VexRiscv Public

    Forked from SpinalHDL/VexRiscv

    A FPGA friendly 32 bit RISC-V CPU implementation

    Assembly

  3. VexiiRiscv VexiiRiscv Public

    Forked from SpinalHDL/VexiiRiscv

    Scala

  4. NodeMCU_LCD NodeMCU_LCD Public

    A simple monitor for Bilibili livers based on ESP8266 & TFT_eSPI

    C++ 2