ARM CPU ID check to include two CPU IDs (for Juno r2)

src/variorum/ARM/config_arm.c

@@ -13,25 +13,62 @@
 #include <ARM_Juno_r2.h>
 #include <ARM_Neoverse_N1.h>
 #include <variorum_error.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#define CPU_ID_SIZE 64
 
 uint64_t *detect_arm_arch(void)
 {
-    // ARM systems come in various flavors. For now, we will use a default model number.
+    char cpu0_id_str[CPU_ID_SIZE];
+    char cpu1_id_str[CPU_ID_SIZE];
+    uint64_t cpu0_id_val;
+    uint64_t cpu1_id_val;
+    char *cpu0_id_reg_path =
+        "/sys/devices/system/cpu/cpu0/regs/identification/midr_el1";
+    char *cpu1_id_reg_path =
+        "/sys/devices/system/cpu/cpu1/regs/identification/midr_el1";
     unsigned long *model = (unsigned long *) malloc(sizeof(uint64_t));
-    asm volatile(
-        "mrs %0, MIDR_EL1"
-        : "=r"(*model));
-    *model = (*model & 0x00ffff);
-    *model = (*model >> 4);
+
+    int cpu0_id_reg_fd = open(cpu0_id_reg_path, O_RDONLY);
+    int cpu1_id_reg_fd = open(cpu1_id_reg_path, O_RDONLY);
+
+    if (!cpu0_id_reg_fd || !cpu1_id_reg_fd)
+    {
+        variorum_error_handler("Error encountered in accessing CPU ID information",
+                               VARIORUM_ERROR_INVAL, getenv("HOSTNAME"),
+                               __FILE__, __FUNCTION__, __LINE__);
+        return NULL;
+    }
+
+    int cpu0_id_bytes = read(cpu0_id_reg_fd, cpu0_id_str, CPU_ID_SIZE);
+    int cpu1_id_bytes = read(cpu1_id_reg_fd, cpu1_id_str, CPU_ID_SIZE);
+
+    if (!cpu0_id_bytes || !cpu1_id_bytes)
+    {
+        variorum_error_handler("Error encountered in accessing CPU ID information",
+                               VARIORUM_ERROR_INVAL, getenv("HOSTNAME"),
+                               __FILE__, __FUNCTION__, __LINE__);
+        return NULL;
+    }
+
+    cpu0_id_val = strtol(cpu0_id_str, NULL, 16);
+    cpu1_id_val = strtol(cpu1_id_str, NULL, 16);
+
+    *model = (cpu0_id_val & 0x000000000000fff0) << 8;
+    *model |= ((cpu1_id_val & 0x000000000000fff0) >> 4);
+
+    close(cpu0_id_reg_fd);
+    close(cpu1_id_reg_fd);
+
     return model;
 }
 
 int set_arm_func_ptrs(int idx)
 {
     int err = 0;
 
-    if (*g_platform[idx].arch_id == ARM_CORTEX_A72 ||
-        *g_platform[idx].arch_id == ARM_CORTEX_A53)
+    if (*g_platform[idx].arch_id == ((ARM_CORTEX_A53 << 12) | ARM_CORTEX_A72))
     {
         /* Initialize interfaces */
         g_platform[idx].variorum_print_power                     =
@@ -49,7 +86,8 @@ int set_arm_func_ptrs(int idx)
         g_platform[idx].variorum_get_node_power_domain_info_json =
             arm_juno_r2_get_power_domain_info_json;
     }
-    else if (*g_platform[idx].arch_id == ARM_NEOVERSE_N1)
+    else if (*g_platform[idx].arch_id == ((ARM_NEOVERSE_N1 << 12) |
+                                          ARM_NEOVERSE_N1))
     {
         /* Initialize interfaces */
         g_platform[idx].variorum_print_power                     =