CDMO Project (VLSI Design)

Overview

The CDMO project involves the solving of a VLSI (Very Large Scale Integration) problem using (i) Constraint Programming (CP), and (ii) propositional SATisfiability (SAT) and/or its extension to Satisfiability Modulo Theories (SMT). VLSI refers to the trend of integrating circuits into silicon chips.

Authors

• Leonidas Gee
• Anna Fabris

Dataset

The dataset consist of 40 VLSI instances, where each instance is a text file containing the following:

• The first line gives w, which is the width of the silicon plate.
• The following line gives n, which is the number of necessary circuits to place inside the plate.
• Then n lines follow, each with x_i and y_i , representing the horizontal and vertical dimensions of the i-th circuit.

Methodologies

The steps taken for each method are described in a series of reports as follows:

• CP Report
• SAT Report
• SMT Report

Results

The images below show the visualisations of different solved instances using either CP, SAT or SMT.