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A small MIPS CPU core originally based on Sarah L. Harris MIPS CPU ("Digital Design and Computer Arhitecture" by David Money Harris and Sarah L Harris). The first version of schoolMIPS was written for Young Russian Chip Architects summer school.
The schoolMIPS have several versions (from simple to complex). Each of them is placed in the separate git branch:
- 00_simple - the simplest CPU without data memory, but the programs for this core are compiled using GNU gcc;
- 01_mmio - the same but with data memory, simple system bus and peripherals (pwm, gpio, als);
- 02_irq - data memory, system timer, interrupt and exceptions (CP0 coprocessor);
- 03_pipeline - the pipelined version of the simplest core with data memory
- 04_pipeline_irq - the pipelined version of 02_irq
- 05_pipeline_ahb - 04_pipeline_irq with AHB-Lite bus support and Scratchpad RAM
- schoolMIPS User Manual (Russian)
- schoolMIPS slides for 00_simple (Russian, English)
- Digital Design and Computer Arhitecture (Russian)
- MIPS32 Instruction Set Quick Reference (pdf)
- MIPS Architecture For ProgrammersVolume II-A: The MIPS32 InstructionSet (pdf)
- AHB-Lite slides (English)
System bus and peripheral devices are not shown
