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Merge pull request #4 from birdybro/master
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Fix naming scheme and file structure
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hrvach authored Feb 21, 2021
2 parents 4344182 + cbd9d1d commit 65d4108
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Showing 9 changed files with 225 additions and 225 deletions.
2 changes: 1 addition & 1 deletion EDSAC.qsf
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top

set_global_assignment -name LAST_QUARTUS_VERSION "17.0.2 Standard Edition"
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Standard Edition"

set_global_assignment -name GENERATE_RBF_FILE ON
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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16 changes: 8 additions & 8 deletions files.qip
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@@ -1,8 +1,8 @@
set_global_assignment -name VERILOG_FILE adpcm_decoder.v
set_global_assignment -name VERILOG_FILE teletype.v
set_global_assignment -name SYSTEMVERILOG_FILE rle_framebuffer.sv
set_global_assignment -name VERILOG_FILE memory.v
set_global_assignment -name VERILOG_FILE lfsr.v
set_global_assignment -name SYSTEMVERILOG_FILE util.sv
set_global_assignment -name SYSTEMVERILOG_FILE edsac_cpu.sv
set_global_assignment -name SYSTEMVERILOG_FILE edsac.sv
set_global_assignment -name VERILOG_FILE rtl/adpcm_decoder.v
set_global_assignment -name VERILOG_FILE rtl/teletype.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rle_framebuffer.sv
set_global_assignment -name VERILOG_FILE rtl/memory.v
set_global_assignment -name VERILOG_FILE rtl/lfsr.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/util.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/edsac_cpu.sv
set_global_assignment -name SYSTEMVERILOG_FILE EDSAC.sv
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432 changes: 216 additions & 216 deletions teletype.v → rtl/teletype.v

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