Tests

Led	Onboard RGB Led
Freq	Output wave signal on pin A8/CK_OUT0 (select wave form in main())
Usart	USART0 (115200,8N1), Pins TX0, RX0
Lcd	Onboard LCD 160x80, SPI master
Dma	DMA mem to CRC register
UsartIrq	USART0 (115200,8N1), Echo serial input to serial output and LCD with 10 character per second, using 1k buffer
PA8	Read GPIO PA8 which is connected to BOOT0 button
EspLink	Connect Rx0/Tx0/Gnd/Rst to an ESP8266 running esp-link v3.2.47
EspLinkWeb	Connect Rx0/Tx0/Gnd/Rst to an ESP8266 running esp-link v3.2.47 and update a User Defined Web Page (copy from html folder)
EspLinkSocket	Connect Rx0/Tx0/Gnd/Rst to an ESP8266 running esp-link v3.2.47 and start TCP server (telnet or netcat to esp-link port 5555 or 6666)
I2c	Connect a 3.3V 1602 LCD via PCF8574 (I2C-to-parallel) to port I2C0 (pins B6,B7) in master mode
SpiDma	Evaluate SPI with and without DMA with and without IRQ
GpioIrq	Display BOOT0 button status on LED via Irq Handler
LcdFonts	Show test string in various fonts on LCD
Can	Connect two Longan Nanos via CAN bus
SdCard	Read/Write SD card
Flash	Using 64MBit SPI Flash memory

Case

3D Printer files for a case are in the folder _CaseStl.

License

My code uses the MIT License. The repository contains code from other sources, for their license conditions check the files in the lib/ folders.

Resources

Boards

Board	MCU	Flash	SRAM
Longan Nano	GD32VF103CBT6	128kB	32kB
Longan Nano Lite	GD32VF103C8T6	64kB	20kB

Documentation, Examples, etc

Sipeed Longan Nano Specs Tools Wiki BBS

GD32VF103 User Manual 1.2

GD32VF103 Datasheet 1.3

GD32VF103 Firmware Library User Guide 1.0

GD32VF103 Demo Suites 1.1.0 (.rar)

GD32VF103 Firmware Library 1.1.1 (.rar)

The RISC-V Instruction Set Manual Volume I: Unprivileged ISA

platformio.ini

[env:sipeed-longan-nano-lite]
platform = gd32v
board = sipeed-longan-nano-lite
framework = gd32vf103-sdk
upload_protocol = dfu
 
[env:sipeed-longan-nano]
platform = gd32v
board = sipeed-longan-nano
framework = gd32vf103-sdk
upload_protocol = dfu

Longan Nano Lite needs version >= 1.1.1 of the GD32V platform.

DFU Upload (Linux)

1. connect USB
2. press buttons RESET, BOOT0
3. release button RESET
4. release button BOOT0
5. start upload in PlatformIO

PIN Connections

A			B			C			D
Pin	5VT	OnBoard Function	Pin	5VT	OnBoard Function	Pin	5VT	OnBoard Function	Pin	5VT	OnBoard Function
A0	-		B0	-	LCD RS				[D0/OSCIN]	-	8MHz Clk
A1	-	Green LED active low	B1	-	LCD RST				[D1/OSCOUT]	-	8MHz Clk
A2	-	Blue LED active low	[B2]	*	LCD CS
A3	-		B3	*
A4	-		B4	*
A5/SCK0	-	LCD SPI Clk	B5	-
A6	-		B6	*
A7/MOSI0	-	LCD SPI MOSI	B7	*
A8	*	10k PullDown?, connected to BOOT0 button active high	B8	*
A9	*		B9	*
A10	*		B10	*
A11/USBFS_DM	*	USB D-	B11	*
A12/USBFS_DP	*	USB D+	B12/NSS1	*	TF CARD SPI CS	C13	-	Red LED active low
A13	*		B13/SCK1	*	TF CARD SPI Clk	C14/OSC32IN	-	32kHz Clk
A14	*		B14/MISO1	*	TF CARD SPI MISO, 10k PullUp	C15/OSC32OUT	-	32kHz Clk
A15	*		B15/MOSI1	*	TF CARD SPI MOSI, 10k PullUp
[x] not available as header pin; 5VT (5 Volt Tolerant Input): * yes, - no

Troubles with Longan Nano and GD32V Platform

Compile

• .../.platformio/packages/framework-gd32vf103-sdk/GD32VF103_standard_peripheral/gd32vf103.h:179:41: error: redeclaration of C++ built-in type 'bool' [-fpermissive]
   179 | typedef enum {FALSE = 0, TRUE = !FALSE} bool;

  Put this line in comments, then C++ will compile the SDK files.

• Adding dfu suffix to firmware.bin
  sh: 1: dfu-suffix: not found

  dfu-utils only gets installed when uploading with dfu. Build with target 'upload' once, then the program will be found.

Upload

• DFU on Linux:
  • GD32V 1.1.1: Longan Nano Lite working fine. Longan Nano only after download & compile of latest dfu-util.
  • GD32V 1.2.0: Error messages after upload, but seems to work. Sometimes a reset is needed after upload and sometimes not.
• JLink on Linux (tried with 1.1.1): Gives error message after upload, but after power cycling the Longan Nano the program is working (reset is not enough).
• DFU on Windows (tried with 1.1.1): didn't get it working. Use GigaDevice Dfu Tool instead.
• JLink on Windows: didn't try yet.