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hal: microchip: mec5: Version 0.2 MEC5 HAL consistent naming
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Change symbols name to use prefix "mec_hal_" to prevent name
clashes with symbols from other components (application, Zephyr,
etc).

Signed-off-by: Scott Worley <scott.worley@microchip.com>
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scottwcpg committed Jun 3, 2024
1 parent 1279561 commit 71eba05
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Showing 151 changed files with 19,831 additions and 17,575 deletions.
686 changes: 342 additions & 344 deletions mec5/devices/MEC174X/mec1743_qlj.h
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661 changes: 330 additions & 331 deletions mec5/devices/MEC174X/mec1743_qsz.h
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11 changes: 11 additions & 0 deletions mec5/devices/MEC174X/mec1743qlj_specs.h
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Expand Up @@ -63,6 +63,10 @@
#define MEC5_BASIC_TIMER_16_MSK 0x0fu
#define MEC5_BASIC_TIMER_32_MSK 0x30u

#define MEC5_HIB_TIMER_INSTANCES 2
#define MEC5_CTMR_TIMER_INSTANCES 4
#define MEC5_CCT_INSTANCES 1

#define MEC5_DMAC_NUM_CHANNELS 16

#define MEC5_ESPI_HW_VER_15 15
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#define MEC5_P2S_INSTANCES 2

#define MEC5_KSCAN_INSTANCES 1

#define MEC5_PWM_INSTANCES 12

#define MEC5_TACH_INSTANCES 4

#define MEC5_VCI_PINS 5
#define MEC5_VCI_PINS_MASK 0x3fu
#define MEC5_VCI_GPIO_PINS_MASK 0x3eu
#define MEC5_VCI_HAS_LID_DETECT

#define MEC5_HAS_ROM_TIMER 1
#define MEC5_HAS_PERIPH_PRIVILEGE 1

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11 changes: 11 additions & 0 deletions mec5/devices/MEC174X/mec1743qsz_specs.h
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#define MEC5_BASIC_TIMER_16_MSK 0x0fu
#define MEC5_BASIC_TIMER_32_MSK 0x30u

#define MEC5_HIB_TIMER_INSTANCES 2
#define MEC5_CTMR_TIMER_INSTANCES 4
#define MEC5_CCT_INSTANCES 1

#define MEC5_DMAC_NUM_CHANNELS 16

#define MEC5_ESPI_HW_VER_15 15
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#define MEC5_P2S_INSTANCES 2

#define MEC5_KSCAN_INSTANCES 1

#define MEC5_PWM_INSTANCES 9

#define MEC5_TACH_INSTANCES 4

#define MEC5_VCI_PINS 4
#define MEC5_VCI_PINS_MASK 0x1fu
#define MEC5_VCI_GPIO_PINS_MASK 0x1eu
#define MEC5_VCI_HAS_LID_DETECT

#define MEC5_HAS_ROM_TIMER 1
#define MEC5_HAS_PERIPH_PRIVILEGE 1

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704 changes: 352 additions & 352 deletions mec5/devices/MEC175X/mec1753_qlj.h
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690 changes: 345 additions & 345 deletions mec5/devices/MEC175X/mec1753_qsz.h
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11 changes: 11 additions & 0 deletions mec5/devices/MEC175X/mec1753qlj_specs.h
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Expand Up @@ -63,6 +63,10 @@
#define MEC5_BASIC_TIMER_16_MSK 0x0fu
#define MEC5_BASIC_TIMER_32_MSK 0x30u

#define MEC5_HIB_TIMER_INSTANCES 2
#define MEC5_CTMR_TIMER_INSTANCES 4
#define MEC5_CCT_INSTANCES 1

#define MEC5_DMAC_NUM_CHANNELS 20

#define MEC5_ESPI_HW_VER_15 15
Expand Down Expand Up @@ -120,10 +124,17 @@

#define MEC5_P2S_INSTANCES 2

#define MEC5_KSCAN_INSTANCES 1

#define MEC5_PWM_INSTANCES 12

#define MEC5_TACH_INSTANCES 4

#define MEC5_VCI_PINS 5
#define MEC5_VCI_PINS_MASK 0x3fu
#define MEC5_VCI_GPIO_PINS_MASK 0x3eu
#define MEC5_VCI_HAS_LID_DETECT

#define MEC5_HAS_ROM_TIMER 1
#define MEC5_HAS_PERIPH_PRIVILEGE 1

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11 changes: 11 additions & 0 deletions mec5/devices/MEC175X/mec1753qsz_specs.h
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Expand Up @@ -63,6 +63,10 @@
#define MEC5_BASIC_TIMER_16_MSK 0x0fu
#define MEC5_BASIC_TIMER_32_MSK 0x30u

#define MEC5_HIB_TIMER_INSTANCES 2
#define MEC5_CTMR_TIMER_INSTANCES 4
#define MEC5_CCT_INSTANCES 1

#define MEC5_DMAC_NUM_CHANNELS 20

#define MEC5_ESPI_HW_VER_15 15
Expand Down Expand Up @@ -120,10 +124,17 @@

#define MEC5_P2S_INSTANCES 2

#define MEC5_KSCAN_INSTANCES 1

#define MEC5_PWM_INSTANCES 9

#define MEC5_TACH_INSTANCES 4

#define MEC5_VCI_PINS 4
#define MEC5_VCI_PINS_MASK 0x1fu
#define MEC5_VCI_GPIO_PINS_MASK 0x1eu
#define MEC5_VCI_HAS_LID_DETECT

#define MEC5_HAS_ROM_TIMER 1
#define MEC5_HAS_PERIPH_PRIVILEGE 1

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546 changes: 0 additions & 546 deletions mec5/devices/MECH172X/mec1723_nlj.h
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539 changes: 0 additions & 539 deletions mec5/devices/MECH172X/mec1723_nsz.h
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547 changes: 547 additions & 0 deletions mec5/devices/MECH172X/mech1723_nlj.h
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541 changes: 541 additions & 0 deletions mec5/devices/MECH172X/mech1723_nsz.h
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10 changes: 10 additions & 0 deletions mec5/devices/MECH172X/mec1723nlj_specs.h → mec5/devices/MECH172X/mech1723nlj_specs.h
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#define MEC5_BASIC_TIMER_16_MSK 0x0fu
#define MEC5_BASIC_TIMER_32_MSK 0x30u

#define MEC5_HIB_TIMER_INSTANCES 2
#define MEC5_CTMR_TIMER_INSTANCES 4
#define MEC5_CCT_INSTANCES 1

#define MEC5_DMAC_NUM_CHANNELS 16

#define MEC5_ESPI_HW_VER_14 14
Expand Down Expand Up @@ -119,8 +123,14 @@

#define MEC5_P2S_INSTANCES 1

#define MEC5_KSCAN_INSTANCES 1

#define MEC5_PWM_INSTANCES 12

#define MEC5_TACH_INSTANCES 4

#define MEC5_VCI_PINS 5
#define MEC5_VCI_PINS_MASK 0x3fu
#define MEC5_VCI_GPIO_PINS_MASK 0x3eu

#endif /* __MEC1723NLJ_SPECS_H__ */
10 changes: 10 additions & 0 deletions mec5/devices/MECH172X/mec1723nsz_specs.h → mec5/devices/MECH172X/mech1723nsz_specs.h
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Expand Up @@ -63,6 +63,10 @@
#define MEC5_BASIC_TIMER_16_MSK 0x0fu
#define MEC5_BASIC_TIMER_32_MSK 0x30u

#define MEC5_HIB_TIMER_INSTANCES 2
#define MEC5_CTMR_TIMER_INSTANCES 4
#define MEC5_CCT_INSTANCES 1

#define MEC5_DMAC_NUM_CHANNELS 16

#define MEC5_ESPI_HW_VER_14 14
Expand Down Expand Up @@ -119,8 +123,14 @@

#define MEC5_P2S_INSTANCES 1

#define MEC5_KSCAN_INSTANCES 1

#define MEC5_PWM_INSTANCES 9

#define MEC5_TACH_INSTANCES 4

#define MEC5_VCI_PINS 4
#define MEC5_VCI_PINS_MASK 0x1fu
#define MEC5_VCI_GPIO_PINS_MASK 0x1eu

#endif /* __MEC1723NSZ_SPECS_H__ */
44 changes: 22 additions & 22 deletions mec5/devices/common/mec5_acpi_ec_v1.h
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Expand Up @@ -11,10 +11,10 @@
*/

/**
* @brief ACPI Host to EC command interface (ACPI_EC)
* @brief ACPI Host to EC command interface (MEC_ACPI_EC0)
*/

typedef struct acpi_ec_regs { /*!< (@ 0x400F0800) ACPI_EC Structure */
typedef struct mec_acpi_ec_regs { /*!< (@ 0x400F0800) MEC_ACPI_EC0 Structure */
__IOM uint32_t AEC_HDATA; /*!< (@ 0x00000000) Host Data */
__OM uint8_t AEC_HCMDSTS; /*!< (@ 0x00000004) Host Command(WO), Status(RO) */
__IM uint8_t AEC_HBYTE_CTRL; /*!< (@ 0x00000005) Byte Access Control */
Expand All @@ -25,7 +25,8 @@ typedef struct acpi_ec_regs { /*!< (@ 0x400F0800) ACPI_EC Stru
__IOM uint8_t AEC_BYTE_CTRL; /*!< (@ 0x00000105) EC only accessible byte access control */
__IM uint16_t RESERVED2;
__IOM uint32_t AEC_H2E_DATA; /*!< (@ 0x00000108) Host to EC data */
} ACPI_EC_Type; /*!< Size = 268 (0x10c) */
} MEC_ACPI_EC_Type; /*!< Size = 268 (0x10c) */

/** @} */ /* End of group Device_Peripheral_peripherals */

/** @addtogroup PosMask_peripherals
Expand All @@ -36,26 +37,25 @@ typedef struct acpi_ec_regs { /*!< (@ 0x400F0800) ACPI_EC Stru
/* ==================================================== AEC_HBYTE_CTRL ===================================================== */
/* ===================================================== AEC_E2H_DATA ====================================================== */
/* ====================================================== AEC_STATUS ======================================================= */
#define ACPI_EC_AEC_STATUS_OBF_Pos (0UL) /*!< OBF (Bit 0) */
#define ACPI_EC_AEC_STATUS_OBF_Msk (0x1UL) /*!< OBF (Bitfield-Mask: 0x01) */
#define ACPI_EC_AEC_STATUS_IBF_Pos (1UL) /*!< IBF (Bit 1) */
#define ACPI_EC_AEC_STATUS_IBF_Msk (0x2UL) /*!< IBF (Bitfield-Mask: 0x01) */
#define ACPI_EC_AEC_STATUS_UD1A_Pos (2UL) /*!< UD1A (Bit 2) */
#define ACPI_EC_AEC_STATUS_UD1A_Msk (0x4UL) /*!< UD1A (Bitfield-Mask: 0x01) */
#define ACPI_EC_AEC_STATUS_CMD_Pos (3UL) /*!< CMD (Bit 3) */
#define ACPI_EC_AEC_STATUS_CMD_Msk (0x8UL) /*!< CMD (Bitfield-Mask: 0x01) */
#define ACPI_EC_AEC_STATUS_BURST_Pos (4UL) /*!< BURST (Bit 4) */
#define ACPI_EC_AEC_STATUS_BURST_Msk (0x10UL) /*!< BURST (Bitfield-Mask: 0x01) */
#define ACPI_EC_AEC_STATUS_SCI_EVT_Pos (5UL) /*!< SCI_EVT (Bit 5) */
#define ACPI_EC_AEC_STATUS_SCI_EVT_Msk (0x20UL) /*!< SCI_EVT (Bitfield-Mask: 0x01) */
#define ACPI_EC_AEC_STATUS_SMI_EVT_Pos (6UL) /*!< SMI_EVT (Bit 6) */
#define ACPI_EC_AEC_STATUS_SMI_EVT_Msk (0x40UL) /*!< SMI_EVT (Bitfield-Mask: 0x01) */
#define ACPI_EC_AEC_STATUS_UD0A_Pos (7UL) /*!< UD0A (Bit 7) */
#define ACPI_EC_AEC_STATUS_UD0A_Msk (0x80UL) /*!< UD0A (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_OBF_Pos (0UL) /*!< OBF (Bit 0) */
#define MEC_ACPI_EC_AEC_STATUS_OBF_Msk (0x1UL) /*!< OBF (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_IBF_Pos (1UL) /*!< IBF (Bit 1) */
#define MEC_ACPI_EC_AEC_STATUS_IBF_Msk (0x2UL) /*!< IBF (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_UD1A_Pos (2UL) /*!< UD1A (Bit 2) */
#define MEC_ACPI_EC_AEC_STATUS_UD1A_Msk (0x4UL) /*!< UD1A (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_CMD_Pos (3UL) /*!< CMD (Bit 3) */
#define MEC_ACPI_EC_AEC_STATUS_CMD_Msk (0x8UL) /*!< CMD (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_BURST_Pos (4UL) /*!< BURST (Bit 4) */
#define MEC_ACPI_EC_AEC_STATUS_BURST_Msk (0x10UL) /*!< BURST (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_SCI_EVT_Pos (5UL) /*!< SCI_EVT (Bit 5) */
#define MEC_ACPI_EC_AEC_STATUS_SCI_EVT_Msk (0x20UL) /*!< SCI_EVT (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_SMI_EVT_Pos (6UL) /*!< SMI_EVT (Bit 6) */
#define MEC_ACPI_EC_AEC_STATUS_SMI_EVT_Msk (0x40UL) /*!< SMI_EVT (Bitfield-Mask: 0x01) */
#define MEC_ACPI_EC_AEC_STATUS_UD0A_Pos (7UL) /*!< UD0A (Bit 7) */
#define MEC_ACPI_EC_AEC_STATUS_UD0A_Msk (0x80UL) /*!< UD0A (Bitfield-Mask: 0x01) */
/* ===================================================== AEC_BYTE_CTRL ===================================================== */
#define ACPI_EC_AEC_BYTE_CTRL_FOUR_BYTE_MODE_Pos (0UL) /*!< FOUR_BYTE_MODE (Bit 0) */
#define ACPI_EC_AEC_BYTE_CTRL_FOUR_BYTE_MODE_Msk (0x1UL) /*!< FOUR_BYTE_MODE (Bitfield-Mask: 0x01) */
/* ===================================================== AEC_H2E_DATA ====================================================== */
#define MEC_ACPI_EC_AEC_BYTE_CTRL_FOUR_BYTE_MODE_Pos (0UL) /*!< FOUR_BYTE_MODE (Bit 0) */
#define MEC_ACPI_EC_AEC_BYTE_CTRL_FOUR_BYTE_MODE_Msk (0x1UL) /*!< FOUR_BYTE_MODE (Bitfield-Mask: 0x01) */
/** @} */ /* End of group PosMask_peripherals */

#endif /* _MEC5_ACPI_EC_V1_H */
6 changes: 3 additions & 3 deletions mec5/devices/common/mec5_acpi_pm1_v1.h
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Expand Up @@ -11,10 +11,10 @@
*/

/**
* @brief ACPI PM1 interface (ACPI_PM1)
* @brief ACPI PM1 interface (MEC_ACPI_PM1)
*/

typedef struct acpi_pm1_regs { /*!< (@ 0x400F1C00) ACPI_PM1 Structure */
typedef struct mec_acpi_pm1_regs { /*!< (@ 0x400F1C00) MEC_ACPI_PM1 Structure */
__IM uint8_t HSTS1; /*!< (@ 0x00000000) ACPI PM1 status 1 */
__IOM uint8_t HSTS2; /*!< (@ 0x00000001) ACPI PM1 status 2 */
__IM uint8_t HEN1; /*!< (@ 0x00000002) ACPI PM1 status 1 */
Expand All @@ -34,7 +34,7 @@ typedef struct acpi_pm1_regs { /*!< (@ 0x400F1C00) ACPI_PM1 Str
__IM uint8_t EP2CTRL2; /*!< (@ 0x00000107) EC-only: ACPI PM1 power-man 2 control 2 */
__IM uint8_t RESERVED1[8];
__IOM uint8_t EPMSTS1; /*!< (@ 0x00000110) EC-only: ACPI PM1 EC PM SCI Status */
} ACPI_PM1_Type; /*!< Size = 273 (0x111) */
} MEC_ACPI_PM1_Type; /*!< Size = 273 (0x111) */
/** @} */ /* End of group Device_Peripheral_peripherals */

#endif /* _MEC5_ACPI_PM1_V1_H */
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