Merge pull request #462 from senior-zero/fix-main/github/segmented_so…

…rt_ldg Fix segmented sort for SM{61,70}
NVIDIA · Apr 21, 2022 · 00869c8 · 00869c8
2 parents a7e3495 + 88d8f04
commit 00869c8
Showing 1 changed file with 8 additions and 4 deletions.
diff --git a/cub/device/dispatch/dispatch_segmented_sort.cuh b/cub/device/dispatch/dispatch_segmented_sort.cuh
@@ -770,7 +770,7 @@ struct DeviceSegmentedSortPolicy
                                     9,
                                     DominantT,
                                     BLOCK_LOAD_WARP_TRANSPOSE,
-                                    LOAD_LDG,
+                                    LOAD_DEFAULT,
                                     RADIX_RANK_MATCH,
                                     BLOCK_SCAN_WARP_SCANS,
                                     RADIX_BITS>;
@@ -810,7 +810,7 @@ struct DeviceSegmentedSortPolicy
                                     16,
                                     DominantT,
                                     BLOCK_LOAD_DIRECT,
-                                    LOAD_LDG,
+                                    LOAD_DEFAULT,
                                     RADIX_RANK_MEMOIZE,
                                     BLOCK_SCAN_RAKING_MEMOIZE,
                                     RADIX_BITS>;
@@ -890,7 +890,7 @@ struct DeviceSegmentedSortPolicy
                                     19,
                                     DominantT,
                                     BLOCK_LOAD_DIRECT,
-                                    LOAD_LDG,
+                                    LOAD_DEFAULT,
                                     RADIX_RANK_MEMOIZE,
                                     BLOCK_SCAN_WARP_SCANS,
                                     RADIX_BITS>;
@@ -970,7 +970,7 @@ struct DeviceSegmentedSortPolicy
                                     19,
                                     DominantT,
                                     BLOCK_LOAD_DIRECT,
-                                    LOAD_LDG,
+                                    LOAD_DEFAULT,
                                     RADIX_RANK_MEMOIZE,
                                     BLOCK_SCAN_WARP_SCANS,
                                     RADIX_BITS>;
@@ -1234,6 +1234,10 @@ struct DispatchSegmentedSort : SelectedPolicy
     using SmallAndMediumPolicyT =
       typename ActivePolicyT::SmallAndMediumSegmentedSortPolicyT;
 
+    static_assert(
+      LargeSegmentPolicyT::LOAD_MODIFIER != CacheLoadModifier::LOAD_LDG,
+      "The memory consistency model does not apply to texture accesses");
+
     static_assert(
         KEYS_ONLY
         || LargeSegmentPolicyT::LOAD_ALGORITHM != BLOCK_LOAD_STRIPED