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FPGA Autoloading
There are currently two ways to have the FPGA automatically loaded when you begin using the bladeRF: a host-software based mechanism, and a firmware-based mechanism.
These "autoload" mechanisms alleviate the need to manually load the FPGA via the bladeRF-cli or using the bladerf_load_fpga()
function.
As of version 0.16.0, libbladeRF provides a mechanism to load an FPGA when a device handle is opened, if the FPGA is detected to not already be in a configured state.
This approach is generally recommended over the firmware-based mechanism for users who will always be using the bladeRF device with a host machine.
Upon opening a device handle, libbladeRF checks the device's FPGA size. It then searchs for the corresponding FPGA bitfile (hostedx40.rbf
or hostedx115.rbf
) in one of the following locations. The order in which these locations are searched is from top to bottom.
Simply place (or symlink, for *nix users) the FPGA bitfile in one of these directories and it will be loaded when you first open the device handle.
- The directory specified by the
BLADERF_SEARCH_DIR
environment variable (New 2014-12-10) - The current working directory (New 2014-12-10)
- The directory containing the program being executed.
-
your_home_directory/.config/Nuand/bladeRF/
(libbladeRF v0.16.0 +) -
your_home_directory/.Nuand/bladeRF/
(libbladeRF v0.16.0 +) -
/etc/Nuand/bladeRF/
(libbladeRF v0.16.0 +) -
/usr/share/Nuand/bladeRF/
(libbladeRF v0.16.0 +)
- The directory specified by the
BLADERF_SEARCH_DIR
environment variable (New 2014-12-10) - The current working directory (New 2014-12-10)
- The directory containing the program being executed. (New 2014-12-10)
-
C:\Users\<user name>\AppData\Roaming\Nuand\bladeRF
(via FOLDERID_RoamingAppData) (libbladeRF v0.16.0 +) - The installation directory, via the
HKEY_LOCAL_MACHINE\Software\Nuand LLC\Path
registry key (libbladeRF v0.17.0 +)
Another option is to write an FPGA-bitstream to the device's SPI flash. When the firmware boots, it checks for the presence of FPGA metadata, and will begin to load the FPGA if a bitstream is present.
This process is slower than the host-based mechanism mentioned above. However, this mechanism allows for "headless" (without a host PC) operation. It takes approximately 4 seconds to load an x40 image, and ~12 seconds to load an x115 image.
IMPORTANT: Be sure that the firmware autoload has completed before attempting to use the device (i.e., open a device handle)! When the FPGA is fully configured, LEDs 1-3 will be lit.
The FPGA may be written to the bladeRF's SPI flash via the CLI:
bladeRF-cli -L path/to/hostedx(size).rbf
To disable this autoload mechanism, erase the FPGA image and metadata. This can also be done via the CLI:
bladeRF-cli -L X
IMPORTANT: It is highly recommended that you disable FPGA autoload when prior to upgrading device firmware in order to avoid any potential conflicts.