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Paged user TAs #1044

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merged 2 commits into from
Sep 28, 2016
Merged

Paged user TAs #1044

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f0f7c8a
core: arm: kern.ld.S: consistent 8 bytes alignment
jenswi-linaro Sep 12, 2016
a884c93
core: add support for paging of user TAs
jenswi-linaro Sep 12, 2016
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1 change: 1 addition & 0 deletions core/arch/arm/include/kernel/user_ta.h
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Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,7 @@ struct user_ta_ctx {
uint32_t context; /* Context ID of the process */
struct tee_mmu_info *mmu; /* Saved MMU information (ddr only) */
void *ta_time_offs; /* Time reference used by the TA */
struct tee_pager_area_head *areas;
#if defined(CFG_SE_API)
struct tee_se_service *se_service;
#endif
Expand Down
71 changes: 60 additions & 11 deletions core/arch/arm/include/mm/pgt_cache.h
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Original file line number Diff line number Diff line change
Expand Up @@ -35,11 +35,29 @@
#define PGT_NUM_PGT_PER_PAGE 4
#endif

#ifdef CFG_SMALL_PAGE_USER_TA
#include <kernel/tee_ta_manager.h>
#include <sys/queue.h>
#include <types_ext.h>
#include <util.h>

struct pgt {
void *tbl;
#if defined(CFG_PAGED_USER_TA)
vaddr_t vabase;
struct tee_ta_ctx *ctx;
size_t num_used_entries;
#endif
#if defined(CFG_WITH_PAGER)
#if !defined(CFG_WITH_LPAE)
struct pgt_parent *parent;
#endif
#endif
#ifdef CFG_SMALL_PAGE_USER_TA
SLIST_ENTRY(pgt) link;
#endif
};

#ifdef CFG_SMALL_PAGE_USER_TA
/*
* Reserve 2 page tables per thread, but at least 4 page tables in total
*/
Expand All @@ -49,23 +67,16 @@
#define PGT_CACHE_SIZE ROUNDUP(CFG_NUM_THREADS * 2, PGT_NUM_PGT_PER_PAGE)
#endif

struct pgt {
void *tbl;
#if defined(CFG_WITH_PAGER) && !defined(CFG_WITH_LPAE)
struct pgt_parent *parent;
#endif
SLIST_ENTRY(pgt) link;
};

SLIST_HEAD(pgt_cache, pgt);

static inline bool pgt_check_avail(size_t num_tbls)
{
return num_tbls <= PGT_CACHE_SIZE;
}

void pgt_alloc(struct pgt_cache *pgt_cache, size_t num_tbls);
void pgt_free(struct pgt_cache *pgt_cache);
void pgt_alloc(struct pgt_cache *pgt_cache, void *owning_ctx,
vaddr_t begin, vaddr_t last);
void pgt_free(struct pgt_cache *pgt_cache, bool save_ctx);

void pgt_init(void);

Expand All @@ -77,4 +88,42 @@ static inline void pgt_init(void)

#endif

#if defined(CFG_PAGED_USER_TA)
void pgt_flush_ctx(struct tee_ta_ctx *ctx);

static inline void pgt_inc_used_entries(struct pgt *pgt)
{
pgt->num_used_entries++;
}

static inline void pgt_dec_used_entries(struct pgt *pgt)
{
pgt->num_used_entries--;
}

static inline void pgt_set_used_entries(struct pgt *pgt, size_t val)
{
pgt->num_used_entries = val;
}

#else
static inline void pgt_flush_ctx(struct tee_ta_ctx *ctx __unused)
{
}

static inline void pgt_inc_used_entries(struct pgt *pgt __unused)
{
}

static inline void pgt_dec_used_entries(struct pgt *pgt __unused)
{
}

static inline void pgt_set_used_entries(struct pgt *pgt __unused,
size_t val __unused)
{
}

#endif

#endif /*MM_PGT_CACHE_H*/
69 changes: 69 additions & 0 deletions core/arch/arm/include/mm/tee_pager.h
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Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,7 @@

#include <kernel/abort.h>
#include <kernel/panic.h>
#include <kernel/user_ta.h>
#include <mm/tee_mm.h>
#include <trace.h>

Expand All @@ -40,6 +41,8 @@
*/
extern struct core_mmu_table_info tee_pager_tbl_info;

struct tee_pager_area_head;

/*
* tee_pager_init() - Initialized the pager
* @mm_alias: The alias area where all physical pages managed by the
Expand Down Expand Up @@ -74,6 +77,61 @@ void tee_pager_init(tee_mm_entry_t *mm_alias);
bool tee_pager_add_core_area(vaddr_t base, size_t size, uint32_t flags,
const void *store, const void *hashes);

/*
* tee_pager_add_uta_area() - Adds a pageable user ta area
* @utc: user ta context of the area
* @base: base of covered memory area
* @size: size of covered memory area
*
* The mapping is created suitable to initialize the memory content while
* loading the TA. Once the TA is properly loaded the areas should be
* finalized with tee_pager_set_uta_area() to get more strict settings.
*
* Return true on success of false if the area can't be added
*/
bool tee_pager_add_uta_area(struct user_ta_ctx *utc, vaddr_t base, size_t size);

/*
* tee_pager_set_uta_area() - Set attributes of a initialized memory area
* @utc: user ta context of the area
* @base: base of covered memory area
* @size: size of covered memory area
* @flags: TEE_MATTR_U* flags describing permissions of the area
*
* Return true on success of false if the area can't be updated
*/
bool tee_pager_set_uta_area(struct user_ta_ctx *utc, vaddr_t base, size_t size,
uint32_t flags);

/*
* tee_pager_rem_uta_areas() - Remove all user ta areas
* @utc: user ta context
*
* This function is called when a user ta context is teared down.
*/
#ifdef CFG_PAGED_USER_TA
void tee_pager_rem_uta_areas(struct user_ta_ctx *utc);
#else
static inline void tee_pager_rem_uta_areas(struct user_ta_ctx *utc __unused)
{
}
#endif

/*
* tee_pager_assign_uta_tables() - Assigns translation table to a user ta
* @utc: user ta context
*
* This function is called to assign translation tables for the pageable
* areas of a user TA.
*/
#ifdef CFG_PAGED_USER_TA
void tee_pager_assign_uta_tables(struct user_ta_ctx *utc);
#else
static inline void tee_pager_assign_uta_tables(struct user_ta_ctx *utc __unused)
{
}
#endif

/*
* Adds physical pages to the pager to use. The supplied virtual address range
* is searched for mapped physical pages and unmapped pages are ignored.
Expand All @@ -95,6 +153,17 @@ void tee_pager_add_pages(vaddr_t vaddr, size_t npages, bool unmap);
*/
void *tee_pager_alloc(size_t size, uint32_t flags);

#ifdef CFG_PAGED_USER_TA
/*
* tee_pager_pgt_save_and_release_entries() - Save dirty pages to backing store
* and remove physical page from translation table
* @pgt: page table descriptor
*
* This function is called when a translation table needs to be recycled
*/
void tee_pager_pgt_save_and_release_entries(struct pgt *pgt);
#endif

/*
* tee_pager_release_phys() - Release physical pages used for mapping
* @addr: virtual address of first page to release
Expand Down
27 changes: 14 additions & 13 deletions core/arch/arm/kernel/kern.ld.S
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Original file line number Diff line number Diff line change
Expand Up @@ -81,6 +81,7 @@ SECTIONS
*(.text .text.*)
#endif
*(.sram.text.glue_7* .gnu.linkonce.t.*)
. = ALIGN(8);
__text_end = .;
}

Expand Down Expand Up @@ -124,7 +125,7 @@ SECTIONS
__extab_end = .;
}

.rodata : ALIGN(4) {
.rodata : ALIGN(8) {
__rodata_start = .;
*(.gnu.linkonce.r.*)
#ifdef CFG_WITH_PAGER
Expand All @@ -147,23 +148,23 @@ SECTIONS
KEEP(*(phys_mem_map_section))
__end_phys_mem_map_section = . ;
#endif
. = ALIGN(4);
. = ALIGN(8);
__rodata_end = .;
}


.data : ALIGN(4) {
.data : ALIGN(8) {
/* writable data */
__data_start_rom = .;
/* in one segment binaries, the rom data address is on top
of the ram data address */
__early_bss_start = .;
*(.early_bss .early_bss.*)
. = ALIGN(4);
. = ALIGN(8);
__early_bss_end = .;
__data_start = .;
*(.data .data.* .gnu.linkonce.d.*)
. = ALIGN(4);
. = ALIGN(8);
}

.ctors : ALIGN(8) {
Expand All @@ -181,12 +182,12 @@ SECTIONS

__data_end = .;
/* unintialized data */
.bss : ALIGN(4) {
.bss : ALIGN(8) {
__bss_start = .;
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
. = ALIGN(8);
__bss_end = .;
}

Expand Down Expand Up @@ -242,32 +243,32 @@ SECTIONS
* sections will go into the unpaged area.
*/
#include <text_init.ld.S>
. = ALIGN(4);
. = ALIGN(8);
__text_init_end = .;
}

.rodata_init : ALIGN(4) {
.rodata_init : ALIGN(8) {
__rodata_init_start = .;
#include <rodata_init.ld.S>
. = ALIGN(8);
__start_phys_mem_map_section = . ;
KEEP(*(phys_mem_map_section))
__end_phys_mem_map_section = . ;
. = ALIGN(4);
. = ALIGN(8);
__rodata_init_end = .;
}
__init_start = __text_init_start;
__init_end = .;
__init_size = __init_end - __text_init_start;

.text_pageable : ALIGN(4) {
.text_pageable : ALIGN(8) {
__text_pageable_start = .;
*(.text*)
. = ALIGN(4);
. = ALIGN(8);
__text_pageable_end = .;
}

.rodata_pageable : ALIGN(4) {
.rodata_pageable : ALIGN(8) {
__rodata_pageable_start = .;
*(.rodata*)
/*
Expand Down
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