hikey960: Initial commit v2

.travis.yml

@@ -181,6 +181,11 @@ script:
   - $make PLATFORM=hikey CFG_ARM64_core=y
   - $make PLATFORM=hikey CFG_ARM64_core=y CFG_TEE_TA_LOG_LEVEL=4 DEBUG=1
 
+  # HiKey960 board (HiSilicon Kirin 960)
+  - $make PLATFORM=hikey-hikey960
+  - $make PLATFORM=hikey-hikey960 CFG_ARM64_core=y
+  - $make PLATFORM=hikey-hikey960 CFG_ARM64_core=y CFG_TEE_TA_LOG_LEVEL=4 DEBUG=1
+
   # Mediatek mt8173 EVB
   - $make PLATFORM=mediatek-mt8173 CFG_ARM64_core=y
 

MAINTAINERS.md

@@ -17,6 +17,7 @@ for these platforms.
 | NXP i.MX7 Dual SabreSD Board		|`Peng Fan <peng.fan@nxp.com>`|
 | ARM Foundation FVP			|`Linaro <op-tee@linaro.org>`|
 | HiKey Board (HiSilicon Kirin 620)	|`Linaro <op-tee@linaro.org>`|
+| HiKey960 Board (HiSilicon Kirin 960)	|`Linaro <op-tee@linaro.org>`|
 | HiSilicon D02				|`Linaro <op-tee@linaro.org>`|
 | MediaTek MT8173 EVB Board		|`Linaro <op-tee@linaro.org>`|
 | QEMU					|`Linaro <op-tee@linaro.org>`|

README.md

@@ -53,7 +53,8 @@ platforms have different sub-maintainers, please refer to the file
 | [NXP i.MX7Dual SabreSD Board](http://www.nxp.com/products/software-and-tools/hardware-development-tools/sabre-development-system/sabre-board-for-smart-devices-based-on-the-i.mx-7dual-applications-processors:MCIMX7SABRE) |`PLATFORM=imx-mx7dsabresd`| Yes |
 | [ARM Foundation FVP](https://developer.arm.com/products/system-design/fixed-virtual-platforms) |`PLATFORM=vexpress-fvp`| Yes |
 | [HiSilicon D02](http://open-estuary.org/d02-2)|`PLATFORM=d02`| No |
-| [HiKey Board (HiSilicon Kirin 620)](https://www.96boards.org/products/hikey)|`PLATFORM=hikey`| Yes |
+| [HiKey Board (HiSilicon Kirin 620)](https://www.96boards.org/products/hikey)|`PLATFORM=hikey` or `PLATFORM=hikey-hikey`| Yes |
+| [HiKey960 Board (HiSilicon Kirin 960)](https://www.96boards.org/products/hikey960)|`PLATFORM=hikey-hikey960`| Yes |
 | [MediaTek MT8173 EVB Board](https://www.mediatek.com/products/tablets/mt8173)|`PLATFORM=mediatek-mt8173`| No |
 | [QEMU](http://wiki.qemu.org/Main_Page) |`PLATFORM=vexpress-qemu_virt`| Yes |
 | [QEMUv8](http://wiki.qemu.org/Main_Page) |`PLATFORM=vexpress-qemu_armv8a`| Yes |

core/arch/arm/plat-hikey/conf.mk

@@ -1,3 +1,5 @@
+PLATFORM_FLAVOR ?= hikey
+
 include core/arch/arm/cpu/cortex-armv8-0.mk
 
 # 32-bit flags
@@ -22,6 +24,7 @@ CFG_NUM_THREADS ?= 8
 CFG_CRYPTO_WITH_CE ?= y
 CFG_WITH_STACK_CANARIES ?= y
 
+ifeq ($(PLATFORM_FLAVOR),hikey)
 CFG_PL061 ?= y
 CFG_PL022 ?= y
 CFG_SPI ?= y
@@ -38,7 +41,16 @@ endif
 ifeq ($(CFG_PL061),y)
 core-platform-cppflags		+= -DPLAT_PL061_MAX_GPIOS=160
 endif
+endif
 
 CFG_SECURE_DATA_PATH ?= y
 CFG_TEE_SDP_MEM_BASE ?= 0x3E800000
 CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
+
+ifeq ($(PLATFORM_FLAVOR),hikey)
+CFG_CONSOLE_UART ?= 3
+endif
+
+ifeq ($(PLATFORM_FLAVOR),hikey960)
+CFG_CONSOLE_UART ?= 6
+endif

core/arch/arm/plat-hikey/main.c

@@ -31,7 +31,9 @@
 #include <drivers/pl022_spi.h>
 #include <drivers/pl061_gpio.h>
 #endif
+#if defined(PLATFORM_FLAVOR_hikey)
 #include <hikey_peripherals.h>
+#endif
 #include <initcall.h>
 #include <io.h>
 #include <kernel/generic_boot.h>
@@ -61,8 +63,10 @@ static const struct thread_handlers handlers = {
 static struct pl011_data console_data;
 
 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
+#if defined(PLATFORM_FLAVOR_hikey)
 register_phys_mem(MEM_AREA_IO_NSEC, PMUSSI_BASE, PMUSSI_REG_SIZE);
-#ifdef CFG_SPI
+#endif
+#if defined(CFG_SPI) && defined(PLATFORM_FLAVOR_hikey)
 register_phys_mem(MEM_AREA_IO_NSEC, PERI_BASE, PERI_BASE_REG_SIZE);
 register_phys_mem(MEM_AREA_IO_NSEC, PMX0_BASE, PMX0_REG_SIZE);
 register_phys_mem(MEM_AREA_IO_NSEC, PMX1_BASE, PMX1_REG_SIZE);
@@ -87,6 +91,7 @@ void console_init(void)
 	register_serial_console(&console_data.chip);
 }
 
+#if defined(PLATFORM_FLAVOR_hikey)
 #ifdef CFG_SPI
 void spi_init(void)
 {
@@ -176,3 +181,4 @@ static TEE_Result peripherals_init(void)
 }
 
 driver_init(peripherals_init);
+#endif /* PLATFORM_FLAVOR_hikey */

core/arch/arm/plat-hikey/platform_config.h

@@ -32,19 +32,39 @@
 #define STACK_ALIGNMENT		64
 
 /* PL011 UART */
-#if defined(CFG_CONSOLE_UART) && (CFG_CONSOLE_UART == 0)
-#define CONSOLE_UART_BASE       0xF8015000
-#elif !defined(CFG_CONSOLE_UART) || (CFG_CONSOLE_UART == 3)
-#define CONSOLE_UART_BASE       0xF7113000
+#if defined(PLATFORM_FLAVOR_hikey)
+
+#define PL011_UART0_BASE	0xF8015000
+#define PL011_UART3_BASE	0xF7113000
+#if (CFG_CONSOLE_UART == 3)
+#define CONSOLE_UART_BASE	PL011_UART3_BASE
+#elif (CFG_CONSOLE_UART == 0)
+#define CONSOLE_UART_BASE	PL011_UART0_BASE
 #else
 #error Unknown console UART
 #endif
 
+#elif defined(PLATFORM_FLAVOR_hikey960)
+
+#define PL011_UART5_BASE	0xFDF05000
+#define PL011_UART6_BASE	0xFFF32000
+#if (CFG_CONSOLE_UART == 6)
+#define CONSOLE_UART_BASE	PL011_UART6_BASE
+#elif (CFG_CONSOLE_UART == 5)
+#define CONSOLE_UART_BASE	PL011_UART5_BASE
+#else
+#error Unknown console UART
+#endif
+
+#else /* PLATFORM_FLAVOR_hikey */
+#error Unknown console UART
+#endif /* PLATFORM_FLAVOR_hikey */
+
 #define CONSOLE_BAUDRATE	115200
 #define CONSOLE_UART_CLK_IN_HZ	19200000
 
 /*
- * HiKey memory map
+ * HiKey and HiKey960 memory map
  *
  * TZDRAM is secured (firewalled) by the DDR controller, see ARM-TF, but note
  * that security of this type of memory is weak for two reasons:
@@ -54,9 +74,11 @@
  *      code similar to the one that sets the protection in ARM-TF (we're
  *      missing a "lockdown" step which would prevent any change to the DDRC
  *      configuration until the next SoC reset).
- * TZSRAM is emulated in the TZDRAM area, because the on-chip SRAM of the SoC
- * is too small to run OP-TEE (72K total with 64K available, see "SRAM Memory
- * Region Layout" in ARM-TF plat/hikey/include/hisi_sram_map.h).
+ * TZSRAM is emulated in the TZDRAM area, because the on-chip SRAM of the
+ * HiKey SoC is too small to run OP-TEE (72K total with 64K available, see
+ * "SRAM Memory Region Layout" in ARM-TF plat/hikey/include/hisi_sram_map.h),
+ * while the SRAM of the HiKey960 SoC is not available to the public at the
+ * moment.
  *
  * CFG_WITH_PAGER=n
  *

core/arch/arm/plat-hikey/sub.mk

@@ -1,3 +1,5 @@
 global-incdirs-y += .
 srcs-y += main.c
+ifeq ($(PLATFORM_FLAVOR),hikey)
 srcs-$(CFG_SPI_TEST) += spi_test.c
+endif