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Add non-secure DDR ranges to rcar-based boards #1871
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Thank you, @jenswi-linaro. Looks like 32-bit build for this will depend on your #1860. |
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I added new patch to force Hmm, interesting. GitHub shows that this patch is the last. But I rebased it to be first, so next two patches will not break the build. Looks like GH sorts patches by commit time... |
Exactly, I find it disturbing, too. There is a justification for it: https://help.github.com/articles/why-are-my-commits-in-the-wrong-order/... |
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On RCAR3 platform most of the DRAM is mapped over 4GB, so it needs LPE enabled with 32-bit builds. Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Prior to this patch OP-TEE was able to run only at salvator-h3 board (but it worked on salvator-m3 too, only by coincidence). Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
This patch adds non-secure DDR ranges for salvator-h3 and salvator-m3 boards. Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Thanks! Rebased and tags applied.
So if you want to see real order, you need to clone PR locally? This is really disturbing... |
After last rebase Shippable fails with strange error:
Have no idea how my patch can cause this. Maybe this is a broader issue? |
This error I have never seen outside of Shippable... restarting the build usually works. I have restarted it. |
Anyone can see the commits in the proper order at: https://github.com/OP-TEE/optee_os/commits/pull/1871/head. |
There are two patches that configure nonsec DDR ranges for RCAR salvator-h3 and salvator-m3 boards.