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Add constant time memcmp_ct function #3

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1 commit merged into from
Jun 24, 2014

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jbech-linaro
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This patch adds a constant time memory compare function that mitigates
timing attacks. This patch also fixes three locations where this could
be a problem.

Signed-off-by: Joakim Bech joakim.bech@linaro.org

@pascal-brand38
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The original memcmp() returns an integer less than, equal to, or greater than zero if s1 is found, respectively, to be less than, to match, or be greater than s2.
In this version of memcmp_ct(), it returns 0 if the memories equal, and non-zero otherwise.

Is not it an issue not to have the very-same behavior, even if I agree we only look if the result is 0 or not?

@jbech-linaro
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True, due to the nature how to check this, it would be tricky to have the same behavior as the libc memcmp. Adding a comment that clarifies this might be enough?

@pascal-brand38
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Yes, adding a comment is sufficient I guess.

@jenswi-linaro
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The return value of memcmp() makes it suitable as a comparison function for qsort() and one may expect the same of any function which has "memcmp" in the name. Perhaps we should name it differently to make it clear that it doesn't behave as an ordinary memcmp? What do you think of something like:
bool bufs_are_equal_ct(const void *s1, const void *s2, size_t n);

@jbech-linaro
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Added the comment and also renamed the function to buf_compare_ct. Let me know if/when this is OK for you and I'll squash and push using force to make it a single patch.

@pascal-brand38
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Hi,

this is ok for me... but I did not run any tests nor try to compile.
I think there is no problem, but the process would require that we test it.

Can you push the squashed version, and then I'll test on tomorrow morning?

Regards,
Pascal.

On 23 June 2014 13:44, Joakim Bech notifications@github.com wrote:

Added the comment and also renamed the function to buf_compare_ct. Let me
know if/when this is OK for you and I'll squash and push using force to
make it a single patch.


Reply to this email directly or view it on GitHub
#3 (comment).

@jbech-linaro
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Yes, I can push the squashed version and indeed it must be tested on a device, which I haven't done (Jens and me needs to be able to share the Orly2 board we have so I also can test, at least using "xtest light", I'll sort that out with Jens).

This patch adds a constant time memory compare function that mitigates
timing attacks. This patch also fixes three locations where this could
be a problem.

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>
@jbech-linaro
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In a few minutes I will push (--force) the squashed version.

@ghost ghost merged commit 1665420 into OP-TEE:master Jun 24, 2014
@jbech-linaro jbech-linaro deleted the const_time_memcmp branch June 24, 2014 21:34
jforissier referenced this pull request in jforissier/optee_os Aug 8, 2017
Address Etienne's comments (round #3).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
jforissier referenced this pull request in jforissier/optee_os Aug 8, 2017
Address Etienne's comments (round #3).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
jforissier referenced this pull request in jforissier/optee_os Aug 8, 2017
Address Etienne's comments (round #3).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
@0xB0D 0xB0D mentioned this pull request Aug 30, 2018
clementfaure added a commit to clementfaure/optee_os that referenced this pull request Feb 27, 2020
Re-work drvcrypt_get_alg_hash_oid() and move it to hash_oid.c

Signed-off-by: Clement Faure <clement.faure@nxp.com>
clementfaure added a commit to clementfaure/optee_os that referenced this pull request Mar 6, 2020
Fix the RSA private key format OP-TEE#3.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
clementfaure added a commit to clementfaure/optee_os that referenced this pull request Mar 9, 2020
…river

Fix comment typo.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request Apr 28, 2020
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:03 00 Core data-abort at address 0xfc09e74c (alignment fault)
E/TC:03 00  esr 0x96000021  ttbr0 0x20000fc0d7060   ttbr1 0x00000000   cidr 0x0
E/TC:03 00  cpu OP-TEE#3          cpsr 0x200001c4
E/TC:03 00  x0  00000000fc09e74c x1  0000000000000000
E/TC:03 00  x2  0000000000000050 x3  0000008000010100
E/TC:03 00  x4  0000000000000003 x5  00000000fc0e46e5
E/TC:03 00  x6  00000000fc09e74c x7  00000000fc09df78
E/TC:03 00  x8  0000000000000078 x9  00000000fc09c110
E/TC:03 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:03 00  x12 0000000032e4d24d x13 00000000fc0e46e5
E/TC:03 00  x14 0000000000000000 x15 0000000000000000
E/TC:03 00  x16 00000000fc0e4b88 x17 0000000000000000
E/TC:03 00  x18 0000000000000000 x19 0000000000000000
E/TC:03 00  x20 000000000000270f x21 00000000fc07c000
E/TC:03 00  x22 00000000fc07c000 x23 0000000000000000
E/TC:03 00  x24 00000000fc09e74c x25 00000000fc0716d0
E/TC:03 00  x26 00000000fc09df78 x27 0000000000000000
E/TC:03 00  x28 0000000000000000 x29 00000000fc0e4900
E/TC:03 00  x30 00000000fc01ae8c elr 00000000fc01c124
E/TC:03 00  sp_el0 00000000fc0e4900
E/TC:03 00 TEE load address @ 0xfc000000
E/TC:03 00 Core data-abort at address 0xfc09e74c .debug_info+649036 (alignment fault)
E/TC:03 00 Call stack:
E/TC:03 00  0x00000000fc01c124 caam_desc_pop at core/drivers/crypto/caam/caam_desc.c:88
E/TC:03 00  0x00000000fc01b2ac caam_jr_enqueue at core/drivers/crypto/caam/caam_jr.c:510
E/TC:03 00  0x00000000fc02247c caam_cipher_block at core/drivers/crypto/caam/cipher/caam_cipher.c:331
E/TC:03 00  0x00000000fc022970 do_update_cipher at core/drivers/crypto/caam/cipher/caam_cipher.c:976
E/TC:03 00  0x00000000fc01a290 cipher_update at core/drivers/crypto/crypto_api/cipher/cipher.c:144
E/TC:03 00  0x00000000fc03562c tee_fs_fek_crypt at core/tee/tee_fs_key_manager.c:118
E/TC:03 00  0x00000000fc033dbc verify_root at core/tee/fs_htree.c:549
E/TC:03 00  0x00000000fc031edc ree_fs_open_primitive at core/tee/tee_ree_fs.c:416
E/TC:03 00  0x00000000fc0345d0 tee_fs_dirfile_open at core/tee/fs_dirfile.c:122
E/TC:03 00  0x00000000fc0321cc open_dirh at core/tee/tee_ree_fs.c:530
E/TC:03 00  0x00000000fc032498 ree_fs_open at core/tee/tee_ree_fs.c:604
E/TC:03 00  0x00000000fc0363dc tadb_open at core/tee/tadb.c:214
E/TC:03 00  0x00000000fc036c44 tee_tadb_ta_open at core/tee/tadb.c:633
E/TC:03 00  0x00000000fc00578c secstor_ta_open at core/arch/arm/kernel/secstor_ta.c:19
E/TC:03 00  0x00000000fc026658 system_open_ta_binary at core/pta/system.c:259
E/TC:03 00  0x00000000fc005e24 pseudo_ta_enter_invoke_cmd at core/arch/arm/kernel/pseudo_ta.c:199
E/TC:03 00  0x00000000fc0250dc tee_ta_invoke_command at core/kernel/tee_ta_manager.c:761
E/TC:03 00  0x00000000fc02b398 syscall_invoke_ta_command at core/tee/tee_svc.c:885
E/TC:03 00  0x00000000fc0123bc tee_svc_do_call at core/arch/arm/tee/arch_svc_a64.S:141
E/TC:03 00  0x00000000fc00811c thread_svc_handler at core/arch/arm/kernel/thread.c:1378
E/TC:03 00  0x00000000fc0039e0 el0_svc at core/arch/arm/kernel/thread_a64.S:639

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request May 1, 2020
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:03 00 Core data-abort at address 0xfc09e74c (alignment fault)
E/TC:03 00  esr 0x96000021  ttbr0 0x20000fc0d7060   ttbr1 0x00000000   cidr 0x0
E/TC:03 00  cpu OP-TEE#3          cpsr 0x200001c4
E/TC:03 00  x0  00000000fc09e74c x1  0000000000000000
E/TC:03 00  x2  0000000000000050 x3  0000008000010100
E/TC:03 00  x4  0000000000000003 x5  00000000fc0e46e5
E/TC:03 00  x6  00000000fc09e74c x7  00000000fc09df78
E/TC:03 00  x8  0000000000000078 x9  00000000fc09c110
E/TC:03 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:03 00  x12 0000000032e4d24d x13 00000000fc0e46e5
E/TC:03 00  x14 0000000000000000 x15 0000000000000000
E/TC:03 00  x16 00000000fc0e4b88 x17 0000000000000000
E/TC:03 00  x18 0000000000000000 x19 0000000000000000
E/TC:03 00  x20 000000000000270f x21 00000000fc07c000
E/TC:03 00  x22 00000000fc07c000 x23 0000000000000000
E/TC:03 00  x24 00000000fc09e74c x25 00000000fc0716d0
E/TC:03 00  x26 00000000fc09df78 x27 0000000000000000
E/TC:03 00  x28 0000000000000000 x29 00000000fc0e4900
E/TC:03 00  x30 00000000fc01ae8c elr 00000000fc01c124
E/TC:03 00  sp_el0 00000000fc0e4900
E/TC:03 00 TEE load address @ 0xfc000000
E/TC:03 00 Core data-abort at address 0xfc09e74c .debug_info+649036 (alignment fault)
E/TC:03 00 Call stack:
E/TC:03 00  0x00000000fc01c124 caam_desc_pop at core/drivers/crypto/caam/caam_desc.c:88
E/TC:03 00  0x00000000fc01b2ac caam_jr_enqueue at core/drivers/crypto/caam/caam_jr.c:510
E/TC:03 00  0x00000000fc02247c caam_cipher_block at core/drivers/crypto/caam/cipher/caam_cipher.c:331
E/TC:03 00  0x00000000fc022970 do_update_cipher at core/drivers/crypto/caam/cipher/caam_cipher.c:976
E/TC:03 00  0x00000000fc01a290 cipher_update at core/drivers/crypto/crypto_api/cipher/cipher.c:144
E/TC:03 00  0x00000000fc03562c tee_fs_fek_crypt at core/tee/tee_fs_key_manager.c:118
E/TC:03 00  0x00000000fc033dbc verify_root at core/tee/fs_htree.c:549
E/TC:03 00  0x00000000fc031edc ree_fs_open_primitive at core/tee/tee_ree_fs.c:416
E/TC:03 00  0x00000000fc0345d0 tee_fs_dirfile_open at core/tee/fs_dirfile.c:122
E/TC:03 00  0x00000000fc0321cc open_dirh at core/tee/tee_ree_fs.c:530
E/TC:03 00  0x00000000fc032498 ree_fs_open at core/tee/tee_ree_fs.c:604
E/TC:03 00  0x00000000fc0363dc tadb_open at core/tee/tadb.c:214
E/TC:03 00  0x00000000fc036c44 tee_tadb_ta_open at core/tee/tadb.c:633
E/TC:03 00  0x00000000fc00578c secstor_ta_open at core/arch/arm/kernel/secstor_ta.c:19
E/TC:03 00  0x00000000fc026658 system_open_ta_binary at core/pta/system.c:259
E/TC:03 00  0x00000000fc005e24 pseudo_ta_enter_invoke_cmd at core/arch/arm/kernel/pseudo_ta.c:199
E/TC:03 00  0x00000000fc0250dc tee_ta_invoke_command at core/kernel/tee_ta_manager.c:761
E/TC:03 00  0x00000000fc02b398 syscall_invoke_ta_command at core/tee/tee_svc.c:885
E/TC:03 00  0x00000000fc0123bc tee_svc_do_call at core/arch/arm/tee/arch_svc_a64.S:141
E/TC:03 00  0x00000000fc00811c thread_svc_handler at core/arch/arm/kernel/thread.c:1378
E/TC:03 00  0x00000000fc0039e0 el0_svc at core/arch/arm/kernel/thread_a64.S:639

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request May 7, 2020
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:03 00 Core data-abort at address 0xfc09e74c (alignment fault)
E/TC:03 00  esr 0x96000021  ttbr0 0x20000fc0d7060   ttbr1 0x00000000   cidr 0x0
E/TC:03 00  cpu OP-TEE#3          cpsr 0x200001c4
E/TC:03 00  x0  00000000fc09e74c x1  0000000000000000
E/TC:03 00  x2  0000000000000050 x3  0000008000010100
E/TC:03 00  x4  0000000000000003 x5  00000000fc0e46e5
E/TC:03 00  x6  00000000fc09e74c x7  00000000fc09df78
E/TC:03 00  x8  0000000000000078 x9  00000000fc09c110
E/TC:03 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:03 00  x12 0000000032e4d24d x13 00000000fc0e46e5
E/TC:03 00  x14 0000000000000000 x15 0000000000000000
E/TC:03 00  x16 00000000fc0e4b88 x17 0000000000000000
E/TC:03 00  x18 0000000000000000 x19 0000000000000000
E/TC:03 00  x20 000000000000270f x21 00000000fc07c000
E/TC:03 00  x22 00000000fc07c000 x23 0000000000000000
E/TC:03 00  x24 00000000fc09e74c x25 00000000fc0716d0
E/TC:03 00  x26 00000000fc09df78 x27 0000000000000000
E/TC:03 00  x28 0000000000000000 x29 00000000fc0e4900
E/TC:03 00  x30 00000000fc01ae8c elr 00000000fc01c124
E/TC:03 00  sp_el0 00000000fc0e4900
E/TC:03 00 TEE load address @ 0xfc000000
E/TC:03 00 Core data-abort at address 0xfc09e74c .debug_info+649036 (alignment fault)
E/TC:03 00 Call stack:
E/TC:03 00  0x00000000fc01c124 caam_desc_pop at core/drivers/crypto/caam/caam_desc.c:88
E/TC:03 00  0x00000000fc01b2ac caam_jr_enqueue at core/drivers/crypto/caam/caam_jr.c:510
E/TC:03 00  0x00000000fc02247c caam_cipher_block at core/drivers/crypto/caam/cipher/caam_cipher.c:331
E/TC:03 00  0x00000000fc022970 do_update_cipher at core/drivers/crypto/caam/cipher/caam_cipher.c:976
E/TC:03 00  0x00000000fc01a290 cipher_update at core/drivers/crypto/crypto_api/cipher/cipher.c:144
E/TC:03 00  0x00000000fc03562c tee_fs_fek_crypt at core/tee/tee_fs_key_manager.c:118
E/TC:03 00  0x00000000fc033dbc verify_root at core/tee/fs_htree.c:549
E/TC:03 00  0x00000000fc031edc ree_fs_open_primitive at core/tee/tee_ree_fs.c:416
E/TC:03 00  0x00000000fc0345d0 tee_fs_dirfile_open at core/tee/fs_dirfile.c:122
E/TC:03 00  0x00000000fc0321cc open_dirh at core/tee/tee_ree_fs.c:530
E/TC:03 00  0x00000000fc032498 ree_fs_open at core/tee/tee_ree_fs.c:604
E/TC:03 00  0x00000000fc0363dc tadb_open at core/tee/tadb.c:214
E/TC:03 00  0x00000000fc036c44 tee_tadb_ta_open at core/tee/tadb.c:633
E/TC:03 00  0x00000000fc00578c secstor_ta_open at core/arch/arm/kernel/secstor_ta.c:19
E/TC:03 00  0x00000000fc026658 system_open_ta_binary at core/pta/system.c:259
E/TC:03 00  0x00000000fc005e24 pseudo_ta_enter_invoke_cmd at core/arch/arm/kernel/pseudo_ta.c:199
E/TC:03 00  0x00000000fc0250dc tee_ta_invoke_command at core/kernel/tee_ta_manager.c:761
E/TC:03 00  0x00000000fc02b398 syscall_invoke_ta_command at core/tee/tee_svc.c:885
E/TC:03 00  0x00000000fc0123bc tee_svc_do_call at core/arch/arm/tee/arch_svc_a64.S:141
E/TC:03 00  0x00000000fc00811c thread_svc_handler at core/arch/arm/kernel/thread.c:1378
E/TC:03 00  0x00000000fc0039e0 el0_svc at core/arch/arm/kernel/thread_a64.S:639

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
jforissier pushed a commit that referenced this pull request May 7, 2020
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:03 00 Core data-abort at address 0xfc09e74c (alignment fault)
E/TC:03 00  esr 0x96000021  ttbr0 0x20000fc0d7060   ttbr1 0x00000000   cidr 0x0
E/TC:03 00  cpu #3          cpsr 0x200001c4
E/TC:03 00  x0  00000000fc09e74c x1  0000000000000000
E/TC:03 00  x2  0000000000000050 x3  0000008000010100
E/TC:03 00  x4  0000000000000003 x5  00000000fc0e46e5
E/TC:03 00  x6  00000000fc09e74c x7  00000000fc09df78
E/TC:03 00  x8  0000000000000078 x9  00000000fc09c110
E/TC:03 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:03 00  x12 0000000032e4d24d x13 00000000fc0e46e5
E/TC:03 00  x14 0000000000000000 x15 0000000000000000
E/TC:03 00  x16 00000000fc0e4b88 x17 0000000000000000
E/TC:03 00  x18 0000000000000000 x19 0000000000000000
E/TC:03 00  x20 000000000000270f x21 00000000fc07c000
E/TC:03 00  x22 00000000fc07c000 x23 0000000000000000
E/TC:03 00  x24 00000000fc09e74c x25 00000000fc0716d0
E/TC:03 00  x26 00000000fc09df78 x27 0000000000000000
E/TC:03 00  x28 0000000000000000 x29 00000000fc0e4900
E/TC:03 00  x30 00000000fc01ae8c elr 00000000fc01c124
E/TC:03 00  sp_el0 00000000fc0e4900
E/TC:03 00 TEE load address @ 0xfc000000
E/TC:03 00 Core data-abort at address 0xfc09e74c .debug_info+649036 (alignment fault)
E/TC:03 00 Call stack:
E/TC:03 00  0x00000000fc01c124 caam_desc_pop at core/drivers/crypto/caam/caam_desc.c:88
E/TC:03 00  0x00000000fc01b2ac caam_jr_enqueue at core/drivers/crypto/caam/caam_jr.c:510
E/TC:03 00  0x00000000fc02247c caam_cipher_block at core/drivers/crypto/caam/cipher/caam_cipher.c:331
E/TC:03 00  0x00000000fc022970 do_update_cipher at core/drivers/crypto/caam/cipher/caam_cipher.c:976
E/TC:03 00  0x00000000fc01a290 cipher_update at core/drivers/crypto/crypto_api/cipher/cipher.c:144
E/TC:03 00  0x00000000fc03562c tee_fs_fek_crypt at core/tee/tee_fs_key_manager.c:118
E/TC:03 00  0x00000000fc033dbc verify_root at core/tee/fs_htree.c:549
E/TC:03 00  0x00000000fc031edc ree_fs_open_primitive at core/tee/tee_ree_fs.c:416
E/TC:03 00  0x00000000fc0345d0 tee_fs_dirfile_open at core/tee/fs_dirfile.c:122
E/TC:03 00  0x00000000fc0321cc open_dirh at core/tee/tee_ree_fs.c:530
E/TC:03 00  0x00000000fc032498 ree_fs_open at core/tee/tee_ree_fs.c:604
E/TC:03 00  0x00000000fc0363dc tadb_open at core/tee/tadb.c:214
E/TC:03 00  0x00000000fc036c44 tee_tadb_ta_open at core/tee/tadb.c:633
E/TC:03 00  0x00000000fc00578c secstor_ta_open at core/arch/arm/kernel/secstor_ta.c:19
E/TC:03 00  0x00000000fc026658 system_open_ta_binary at core/pta/system.c:259
E/TC:03 00  0x00000000fc005e24 pseudo_ta_enter_invoke_cmd at core/arch/arm/kernel/pseudo_ta.c:199
E/TC:03 00  0x00000000fc0250dc tee_ta_invoke_command at core/kernel/tee_ta_manager.c:761
E/TC:03 00  0x00000000fc02b398 syscall_invoke_ta_command at core/tee/tee_svc.c:885
E/TC:03 00  0x00000000fc0123bc tee_svc_do_call at core/arch/arm/tee/arch_svc_a64.S:141
E/TC:03 00  0x00000000fc00811c thread_svc_handler at core/arch/arm/kernel/thread.c:1378
E/TC:03 00  0x00000000fc0039e0 el0_svc at core/arch/arm/kernel/thread_a64.S:639

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
vingu-linaro pushed a commit to vingu-linaro/optee_os that referenced this pull request May 20, 2020
A squashed series of changes in stm32mp1 clock driver for
supporting SCMI server as a clock consumer. These changes
have not been upstream yet in OP-TEE OS. Below the details.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

### Commit message OP-TEE#1
plat-stm32mp1: clock: remove oscillators and PLLs from shared resources

Oscillators, PLL1 and PLL2 are not resources allocated upon platform
configuration, these are always under secure world control. This change
removes them fro the list of the shared resources.

Since these resource are always secure, there is no need to look up
clock tree when a leaf clock is registered as secure to know which
parent clock(s) is/are secure. This removes functions from
shared_resources.c and stm32mp1_clk.c.

stm32mp_register_clock_parents_secure() can be removed and all its
private dependencies.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#2
plat-stm32mp1: clock: fix mcu/axi parent clock

Correct MCU clock parent selector: MCU subsystem clock is derived
from clock  PLL3_P, not PLL3.

Correct AXI clock parent selector: AXI subsystem clock is derived
from clock  PLL2_P, not PLL2.

This change also renames MCU clock and AXI clock resources to
prevent confusion.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#3
plat-stm32mp1: clock: allow tree lookup for several system clocks

Oscillators, PLLs and some system clocks can be related straight to
a parent clock. Prior this change were only oscillators and few
clocks supported by this look up. This changes adds PLLs and other
system clocks. This enables for flexible use of clock tree exploration
when computing a clock frequency value.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#4
plat-stm32mp1: clock: handle always on clocks

Oscillators and PLLs are not gated on stm32mp_clk_enable/disable()
calls. This change allows function to blindly call clock gating function
on always on clocks. Gating these clock is out of the scope of this
change even if preferred for power consumption optimization.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#5
plat-stm32mp1: clock: add rtc as gateable clock

Add clock RTC as a clock one can access through the
stm32_util.h API function stm32_clock_*().

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#6
plat-stm32mp1: clock: enable some secure clocks at init

With this change some system clock are enabled by core at
boot time and have a reference counter synchronized with
the clock hardware state.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#7
plat-stm32mp1: factorize rtc clock gating bit position

For consistency, define macro RCC_BDCR_RTCCKEN_POS in stm32mp1_rcc.h
to factorize definition of the RTC clock gating resources.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#8
plat-stm32mp1: add mdma secure clock

Add support for MDMA secure clock.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#9
plat-stm32mp1: remove unused usb non-secure clock

Remove unused clocks USBO_CLK and USBPHY_K resources.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#10
plat-stm32mp1: clock: secure and non-secure gateable clocks

Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure upon RCC[TZEN] and RCC[MCKPROT] (MKP) or always accessible
from non-secure (N_S).

At init, lookup clock tree to ensure that parents of a secure clock
are registered a secure resources in the shared_resources.c driver.

Non-secure clock that OP-TEE expect to enable are enabled without
increase the clock refcount. For consistency, such clocks are not
disabled by core. Such clocks may be accessed by OP-TEE Core when
the non-secure world is not executing, for example at boot time
or could be when system is suspending/resuming.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#11
plat-stm32mp1: clock: fixup parent clock ids

Use _UNKNOWN_ID macro rather than 0xff for clocks parent IDs
that do not relate to a gateable clock.

Fix parent clock ID _HSE_KER_DIV2 that relates to clock
CK_HSE_KER_DIV2, not CK_HSE.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#12
plat-stm32mp1: clock: don't embed unused non-secure uart clock

Embed UART parent clock resource upon CFG_WITH_NSEC_UARTS=y.
This configuration switch was already used to embed or not
the non-secure UART clocks but not the resources used to
looks there ascendant clocks.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#13
plat-stm32mp1: shared resources: get shared clock controller state

stm32mp_nsec_can_access_clock() reports whether a clock is assigned
to the secure world only, or when it can be manipulated by the
non-secure world.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#14
plat-stm32mp1: shared resource: remove unused stm32mp_clock_is_*()

Remove unused functions stm32mp_clock_is_shareable(),
stm32mp_clock_is_shared() and stm32mp_clock_is_non_secure().

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
jenswi-linaro added a commit that referenced this pull request May 27, 2021
Adds checks in e32_relocate() that sym_tab is assigned a symbol table
before using it.

This fixes coverity scan:
CID 1501826 (#1 of 3): Explicit null dereferenced (FORWARD_NULL)
CID 1501826 (#2 of 3): Explicit null dereferenced (FORWARD_NULL)
CID 1501826 (#3 of 3): Explicit null dereferenced (FORWARD_NULL)

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
a-rybakov added a commit to a-rybakov/optee_os-1 that referenced this pull request Jun 3, 2021
Check only for (src|dst, sz) in tests/invoke.c

Signed-off-by: Anton Rybakov <a.rybakov@omp.ru>
jforissier pushed a commit that referenced this pull request Jun 7, 2021
Adds checks in e32_relocate() that sym_tab is assigned a symbol table
before using it.

This fixes coverity scan:
CID 1501826 (#1 of 3): Explicit null dereferenced (FORWARD_NULL)
CID 1501826 (#2 of 3): Explicit null dereferenced (FORWARD_NULL)
CID 1501826 (#3 of 3): Explicit null dereferenced (FORWARD_NULL)

Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
@klcib508 klcib508 mentioned this pull request Feb 22, 2022
gianlucascopelliti pushed a commit to AuthenticExecution/optee_os that referenced this pull request Dec 15, 2022
Integrate FreeRTOS as secure scheduler in OP-TEE OS.
@zzbios zzbios mentioned this pull request Feb 26, 2023
clementfaure added a commit to clementfaure/optee_os that referenced this pull request Nov 2, 2023
Use the job ring OP-TEE#3 on i.mx8dxl to avoid resource conflict with other
software stacks.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
clementfaure added a commit to clementfaure/optee_os that referenced this pull request Nov 2, 2023
Use the job ring OP-TEE#3 on i.mx8dxl to avoid resource conflict with other
software stacks.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
jforissier pushed a commit that referenced this pull request Nov 2, 2023
Use the job ring #3 on i.mx8dxl to avoid resource conflict with other
software stacks.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
This pull request was closed.
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3 participants