zephyr: fixup kv260_r5 DT memory until it can be fixed in Zephyr #29
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wmamills
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I have built the rpmsg_multi_services example and this seems OK. Assuming this works Ok I will change qemu_cortex_r5 in our sample also. This is a defferent situation. The qemu_cortex_r5 is suppose to be a generic R5 simulator so using 64MB of TCM & DDR is fine. It is also Ok to use QSPI flash and assume offset 0 is usable. However we are currently using qemu_cortex_r5 as a standin for the zcu102_r5. This is our problem and should be fixed. For now just do the same changes for qemu_cortex_r5 as we do for kv260_r5. Perhpas we can use an include file. I will look into it. |
We are currently using Zephyr v3.5.0. The memory definitions for kv260_r5 are inappropriate for general usage and for ours. (This is partially our doing so not throwing stones.) The current flash definition refers to the QSPI XIP area of the zynqmp. This is unlikely to be appropriate to use in the general case. The current usage also assumes use at offset 0 in the QSPI which is even less likely to be appropriate. It is OK zynqmp_r5 to define this (perhaps with the name of qspi-xip) but it should not be selected as the default for flash. Let people that needs this opt into it. For now we disable the zephyr,flash choice. This does not eliminate the memory report line but it at least shows a region size of 0. Likewise for the definition of RAM. Zynqmp_r5 defines 64MB of RAM starting at offset 0. This would be a mix of TCM and DDR depending on the R5 mode split vs lockstep mode. In lockstep, DDR would be used for anything >=256K. For split mode, DDR would be used for 64K to 128K-1 and for >=192K. Using DDR like this is dangerous if another OS is running on the A53s. Linux for example does not reserve this early DDR memory for use by the the R5(s). For now assume lockstep (only mode supported by Zephyr v3.5.0) and provide a new memory definition for combined TCM and use it for RAM. Put all these overrides in an include file so they are easy to undo when Zephyr upstream is fixed. We are using qemu_cortex_r5 as stand-in for zcu102_r5 for right now so do the same for that board. However once we have zcu102_r5 we should leave qemu_cortex_r5 alone as its purpose is a generic R5 target not a full zynqmp system. Signed-off-by: Bill Mills <bill.mills@linaro.org>
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I have pushed a new version that uses an include file and modifies qemu_cortex_r5 also. |
wmamills
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uLipe
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Oct 24, 2023
tnmysh
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Oct 26, 2023
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We are currently using Zephyr v3.5.0.
The memory definitions for kv260_r5 are inappropriate for general usage and for ours.
The current flash definition refers to the QSPI XIP area of the zynqmp. This is unlikely to be appropriate to use in the general case. The current usage also assume use at offset 0 in the QSPI which is even less likely to be appropriate. It is OK zynqmp_r5 to define this (perhaps with the name of qspi-xip) but it should not be selected as the default for flash. Let people that needs this opt into it.
For now we disable the zephyr,flash choice. This does not eliminate the memory report line but it at least shows a region size of 0.
Likewise for the definition of RAM. Zynqmp_r5 defines 64MB of RAM starting at offset 0. This would be a mix of TCM and DDR depending on the R5 mode split vs lockstep. In lockstep, DDR would be used for anything >=256K. For split mode DDR would be used for 64K to 128K-1 and for >=198K.
Using DDR like this is dangerous if another OS is running on the A53s. Linux for example does not reserve this early DDR memory for use by the the R5(s).
For now assume lockstep (only mode supported by Zephyr v3.5.0) as provide a new memory definition for combined TCM and use it for RAM.