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fmu-v5: Add support for ICM-42688-P #19306
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The select pin PF11 is SPI4_CS2 and a no connect on the other brands of V5. This should work fine. if it does not cause backfeeding. If it does cause a problem. Then the Sensor Set method used on V5X will be needed. Please verify with a scope that the CS pin is not backfeeding the ICM44688p while the VDD_3V3_SENSORS is off.
@davids5 |
It's PE3 here. https://github.com/PX4/PX4-Autopilot/blob/06181fedb9c9d3d33424651d31e25bf91a44063d/boards/px4/fmu-v5/src/spi.cpp#L45 |
It does cause backfeeding. |
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That is a problem. The CS needs to be low while the power is off or it can latch up the sensor. |
How do we do it? |
boards/px4/fmu-v5/src/manifest.c
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@@ -160,6 +160,7 @@ static px4_hw_mft_list_entry_t mft_lists[] = { | |||
{0x0000, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, | |||
{0x0105, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5 R:5 V:1 | |||
{0x0500, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5+ R:0 V:5 | |||
{0x0502, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5+ R:2 V:5 |
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{0x0502, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5+ R:2 V:5 | |
{0x0552, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5+ R:2 V:5 ICM42688P | |
{0x0562, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5+ Nano R:2 V:6 ICM42688P |
@@ -5,8 +5,14 @@ | |||
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board_adc start | |||
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# Internal SPI bus ICM-20602 | |||
icm20602 -s -R 2 -q start | |||
if ver hwtypecmp V552 |
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if ver hwtypecmp V552 V562
This will cover the
2 | 5 | CUAV V5+ ICM42688P |
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2 | 6 | CUAV V5Nano ICM42688P |
boards/px4/fmu-v5/src/spi.cpp
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initSPIConfigExternal(SPI::CS{GPIO::PortI, GPIO::Pin7}), | ||
initSPIConfigExternal(SPI::CS{GPIO::PortI, GPIO::Pin8}) | ||
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initSPIHWVersion(HW_VER_REV(0, 2), { |
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initSPIHWVersion(HW_VER_REV(0, 2), { | |
initSPIHWVersion(HW_VER_REV(5, 2), { |
A duplicate is needed for the Nano with InitSPIHWVersion(HW_VER_REV(6, 2), {
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While Appling power to the unit, please capture the PE3, VDD_3V3_SENSORS, and PC5, PB4 on a scope and post the images here.
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The channels are PE3, VDD_3V3_SENSORS, PC5, PB4 in sequence. Details are here:DSLogic-la-220315-100851.csv
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hmm this looks incorrect to me. Even the other CS line. What is the width if the PE3 off time? ---_---
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@davids5 What do you think there is a problem?
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@mxiaogit The signals do not look correct to me. I need to review the power up sequence in the code. Power should be off and all the node (CS, MOSI, MISO etc) to the sensors should be low until after power is applied. |
@mxiaogit - I found what I think is the root cause. It is probably systemic and came in when the SPI/I2C work was done by @bkueng. The initial condition out of reset for the sensors power needs be off, this was done in the stm32_boardinitialize and we get a built-in delay to when board_app_initialize is called. I do not have current V5+ HW and It would take quite a bit to instrument it. Since you already have the HW set up can you please pull in e367997 and re-test and post the same signals timing here. |
Never mind I missed the call to board_control_spi_sensors_power_configgpio();. I need to step through and make sure it is really setting it to off. |
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The code change is fine.
The change is no worse then the existing code.
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@davids5 I found some problems with our hardware and after fixing the problem, VDD_3V3_SENSORS is controllable. Here are the waveforms tested by e367997, in order of PE3(VDD_3V3_SENSORS_EN), VDD_3V3_SENSORS(IMU1_3V3), VDD_3V3_SENSORS(IMU2_3V3), PC5(SPI1_DRDY4_ICM20602), PB4(SPI1_ DRDY1_ICM20689). |
@mxiaogit - That looks more like I would expect. Do you check the timing on this version of the code with the fixed HW? What is the time from VDD_3V3_SENSORS_EN to VDD_3V3_SENSORS(IMU1_3V3) valid? Then from VDD_3V3_SENSORS(IMU1_3V3) to the first chip select or datardy going High (Zoom in a bit) |
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There needs to be a manifest entry for each rev/ver pair.
boards/px4/fmu-v5/src/manifest.c
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@@ -160,6 +160,8 @@ static px4_hw_mft_list_entry_t mft_lists[] = { | |||
{0x0000, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, | |||
{0x0105, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5 R:5 V:1 | |||
{0x0500, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5+ R:0 V:5 | |||
{0x0502, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5+ R:2 V:5 ICM42688P | |||
{0x0602, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, // Alias for CUAV V5nano R:2 V:6 ICM42688P |
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What about the entries for V552 and V562?
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According to the macro definition: define HW_VER_REV(v,r) ((uint32_t)((v) & 0xff) << 8) | ((uint32_t)(r) & 0xff), 0x0502 is V552, 0x0602 is V562.
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right! Would you mind adding and using the format from
https://github.com/PX4/PX4-Autopilot/blob/master/boards/px4/fmu-v5x/src/board_config.h#L182-L199
So this will no be confused again.
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I have modified. Please review.
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Let's Bring this in and can make the #define change later
@davids5 |
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@mxiaogit - thank you
@dagar - based on the voltage supply rise time and that this is digital interpretation: The digital value of the VDD_3V3_SENSORS is indicating VIH threshold (of the logic analyzer) not stable 3V3 VDD. Note in image #5 that the CS is leading VDD_3V3_SENSORS the voltage change. Therefore we may need to increase the delay from activating VDD_3V3_SENSORS_EN to initializing the CS,SPI, RDY lines. |
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