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WIP NXP Backports to release/1.14 #23071
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nxp/rt117x:Fix Pin IRQ nxp/rt117x:Support 4 i2c busses nxp/rt117x:Add px4io_serial support nxp/imxrt:Expand ToneAlarmInterface to GPT 3 & 4 px4_fmu-6xrt:Using imxrt_flexspi_nor_octal px4_fmu-6xrt:Entry is start px4_fmu-6xrt:Add Proper MTD px4_fmu-6xrt:Set I2C Buses px4_fmu-6xrt:Proper SPI usage px4_fmu-6xrt:Adjust memory Map to use the 2 MB px4_fmu-6xrt:Bring in ROMAPI px4_fmu-6xrt:Push FLASH to 200Mhz px4_fmu-6xrt:Use BOARD_I2C_LATEINIT px4_fmu-6xrt:Clock Config remove unused devices px4_fmu-6xrt:Remove EVK SDRAM IO px4_fmu-6xrt:Enable SE550 using HW_VER_REV_DRIVE px4_fmu-6xrt:Use MTD to mount FRAM on Flex SPI px4_fmu-6xrt:Manifest px4_fmu-6xrt:Restore board_peripheral_reset px4_fmu-6xrt:Set I2C buss Interna/Externa and startup nxp/rt117x:Set 6 I2C busses px4_fmu-6xrt:Correct Clock Sources and Freqency Settings px4_fmu-6xrt:Correct ADC Settings px4_fmu-6xrt:Tune FlexSPI config and sync header with debug variant Linker prep for rodata ahb partitioning px4_fmu-6xrt:FlexSPI prefetch partition split .text and .rodata Current config 1KB Prefetch .rodata 3KB Prefetch .text px4_fmu-6xrt:Run imxrt_flash_setup_prefetch_partition from ram with barriers px4_fmu-6xrt:Use All OCTL setting from FLASH g_flash_config SANS lookupTable px4_fmu-6xrt:Octal spi boot/debug problem bypass px4_fmu-6xrt:Add PWM test px4_fmu-6xrt:Fix clockconfig and USB vbus sense px4_fmu-6xrt: Use TCM px4_fmu-6xrt: Ethernet bringup imxrt: use unique_id register for board_identity px4_fmu-6xrt: update ITCM mapping, todo proper trap on pc hitting 0x0 px4_fmu-6xrt:correct rotation icm42688p onboard imu rt117x: Add SSARC HP RAM driver for memory dumps px4_fmu-6xrt: Enable hardfault_log px4_fmu-6xrt: Enable DMA pool px4_fmu-6xrt: fix uart mapping px4_fmu-6xrt: enable SocketCAN & DroneCAN px4_fmu-6xrt:Command line history TAB completion px4_fmu-6xrt:Fix pinning duplication px4_fmu-6xrt:Support conditional PHY address based on selected PHY px4_fmu-6xrt:Add Pull Downs on CTS, use GPIO for RTS px4_fmu-6xrt:Set TelemN TX Slew rate and Drive Strenth to max px4_fmu-6xrt::Set TELEM Buffers add HW HS px4_fmu-6xrt:Turn off DMA poll px4_fmu-6xrt:RC_SERIAL_PORT needed to be px4io to disable rc_input using TELEM2! px4_fmu-6xrt: bootloader (#22228) * imxrt:Add bootloader support * bootloader:imxrt clear BOOT_RTC_SIGNATURE * px4_fmu-6xrt:Add bootloader * px4_fmu-6xrt:bootloader removed ADC * px4_fmu-6xrt:bootloader base bootloader script off of script.ld * px4_fmu-6xrt:add _bootdelay_signature & change entry from 0x30000000 to 0x30040000 * px4_fmu-6xrt:hw_config Bootloader has to have 12 bytes px4_fmu-6xrt:Default to use LAN8742A PHY px4_fmu-v6xrt:VID Set to Drone Code board_reset:Enable ability to write RTC GP regs px4_fmu-6xrt:Fix CMP0079 error rt117x:micro_hal Add a PX4_MAKE_GPIO_PULLED_INPUT px4_fmu-v6xrt:Set CTS High before VDD_5V applided to ports to avoid radios fro entering bootloaders fmu-v6xrt: increase 5v down time fmu-v6xrt:Ready for Release DEBUGASSERTS off and Console 57600, Bootloder updated. imxrt:board_hw_rev_ver Rework for 3.893V Ref px4_fmu-v6xrt:Move ADC to Port3
icm42588p driver don't use a icm42688p when icm42686p is requested
…ts (eg px4_fmu-v6x_rover)
…o unaligned memory
A board can optionaly define RC_SERIAL_SWAP_USING_SINGLEWIRE If the board is wired board with TX to the input (Swapped) and the SoC does not support U[S]ART level RX-TX swapping to allow useing onewire to do the swap if and only if: RC_SERIAL_SWAP_USING_SINGLEWIRE is defined RC_SERIAL_SWAP_RXTX is defined TIOCSSWAP is defined and retuns !OK TIOCSSINGLEWIRE is defined
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@PetervdPerk-NXP - I have brought in the usdhc changes. I think it is ready to merge. Can you verify the overall functionality and that I did not miss anything. |
@dk7xe Please Fly this and compare to main |
@dagar is there a way to get this through full CI and the test HW platform? |
@davids5 i have just build the current main as well as pr-bp-release/1.14 for px4_fmu-v6xrt_default target. |
@davids5 did 4 tests with one of our testdrones Log(s) Test1 - https://logs.px4.io/plot_app?log=9feca61c-ceda-4914-8633-cbf27bfe8ac8 Observations Testdrone is a Holybro S500 frame with T-Motor MN3110-26 470kv and (lousy) 12" Props. 5S battery, UWB board connected to GPS2 port. Holybro canGPS connected to CAN1 running droneCAN. Ethernet port connected via T1ADAPT to NavQplus T1 port. 433MHz telemetry on TELEM1, KW45 BT radio on TELEM2. FETtec 4in1 45A ESC connected to AUX1-4 running DShot600. |
@davids5 all PR's related to 6X-RT bugfixes from https://github.com/PX4/PX4-Autopilot/pulls?page=1&q=author%3APetervdPerk-NXP from Oct 2023 onwards that were merged should be included. and maybe also some open ones. On stacks: we are running our own custom PX4 version based on PX4 main from 8dae990 with PX4_STACK_ADJUSTED(12000) to avoid issues with uXRC-DDS. |
I should have backported all rt6 commits. Of course all the commits from @PetervdPerk-NXP to PX4 since 10/2023 will not be backported. That is what the next release will have. Please list the shals for any commits you think I missed.
The commit you listed was a stopgap that has been reverted with 42e2e0c on this PR because the underling cause was fixed in NuttX ba18b09 If you are modifying this or any other branch. You should submit a PR with the fix so the testability is repeatable |
Agree. How to deal with the lpstack issue? May you increase it? I'm at the rc- model airfield. Prepared for testing right away. |
I think the low stack message may be a redherring. The error I saw was unexpected isr. It is in |
This is a WIP of backporting the 1170 to release/1.14