Backports to release/1.15

boards/px4/fmu-v6xrt/default.px4board

@@ -33,6 +33,7 @@ CONFIG_DRIVERS_OSD_MSP_OSD=y
 CONFIG_DRIVERS_POWER_MONITOR_INA226=y
 CONFIG_DRIVERS_POWER_MONITOR_INA228=y
 CONFIG_DRIVERS_POWER_MONITOR_INA238=y
+CONFIG_DRIVERS_POWER_MONITOR_PM_SELECTOR_AUTERION=y
 CONFIG_DRIVERS_PWM_OUT=y
 CONFIG_DRIVERS_PX4IO=y
 CONFIG_DRIVERS_RC_INPUT=y
@@ -84,6 +85,7 @@ CONFIG_SYSTEMCMDS_BSONDUMP=y
 CONFIG_SYSTEMCMDS_DMESG=y
 CONFIG_SYSTEMCMDS_DUMPFILE=y
 CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y
+CONFIG_SYSTEMCMDS_I2C_LAUNCHER=y
 CONFIG_SYSTEMCMDS_I2CDETECT=y
 CONFIG_SYSTEMCMDS_IO_BYPASS_CONTROL=y
 CONFIG_SYSTEMCMDS_LED_CONTROL=y

boards/px4/fmu-v6xrt/init/rc.board_defaults

@@ -12,9 +12,11 @@ param set-default MAV_2_RATE 100000
 param set-default MAV_2_REMOTE_PRT 14550
 param set-default MAV_2_UDP_PRT 14550
 
+# By disabling all 3 INA modules, we use the
+# i2c_launcher instead.
 param set-default SENS_EN_INA238 0
 param set-default SENS_EN_INA228 0
-param set-default SENS_EN_INA226 1
+param set-default SENS_EN_INA226 0
 
 safety_button start
 

boards/px4/fmu-v6xrt/init/rc.board_sensors

@@ -17,6 +17,7 @@
 #------------------------------------------------------------------------------
 
 set HAVE_PM2 yes
+set INA_CONFIGURED no
 
 if mft query -q -k MFT -s MFT_PM2 -v 0
 then
@@ -39,6 +40,8 @@ then
 	then
 		ina226 -X -b 2 -t 2 -k start
 	fi
+
+	set INA_CONFIGURED yes
 fi
 
 if param compare SENS_EN_INA228 1
@@ -49,6 +52,8 @@ then
 	then
 		ina228 -X -b 2 -t 2 -k start
 	fi
+
+	set INA_CONFIGURED yes
 fi
 
 if param compare SENS_EN_INA238 1
@@ -59,6 +64,25 @@ then
 	then
 		ina238 -X -b 2 -t 2 -k start
 	fi
+
+	set INA_CONFIGURED yes
+fi
+
+#Start Auterion Power Module selector for Skynode boards
+if ver hwbasecmp 009 010
+then
+	pm_selector_auterion start
+else
+	if [ $INA_CONFIGURED = no ]
+	then
+		# INA226, INA228, INA238 auto-start
+		i2c_launcher start -b 1
+		if [ $HAVE_PM2 = yes ]
+		then
+			i2c_launcher start -b 2
+		fi
+	fi
+fi
 fi
 
 # Internal SPI bus ICM42686p (hard-mounted)
@@ -88,4 +112,5 @@ fi
 
 bmp388 -X -b 2 start
 
+unset INA_CONFIGURED
 unset HAVE_PM2

boards/px4/fmu-v6xrt/nuttx-config/bootloader/defconfig

@@ -28,6 +28,7 @@ CONFIG_ARMV7M_ITCM=y
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_ARMV7M_USEBASEPRI=y
 CONFIG_ARM_MPU=y
+CONFIG_ARM_MPU_RESET=y
 CONFIG_BOARDCTL=y
 CONFIG_BOARDCTL_RESET=y
 CONFIG_BOARD_ASSERT_RESET_VALUE=0

boards/px4/fmu-v6xrt/nuttx-config/nsh/defconfig

@@ -29,6 +29,7 @@ CONFIG_ARMV7M_ITCM=y
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_ARMV7M_USEBASEPRI=y
 CONFIG_ARM_MPU=y
+CONFIG_ARM_MPU_RESET=y
 CONFIG_BOARDCTL_RESET=y
 CONFIG_BOARD_ASSERT_RESET_VALUE=0
 CONFIG_BOARD_BOOTLOADER_FIXUP=y
@@ -46,7 +47,10 @@ CONFIG_CDCACM_RXBUFSIZE=600
 CONFIG_CDCACM_TXBUFSIZE=12000
 CONFIG_CDCACM_VENDORID=0x3643
 CONFIG_CDCACM_VENDORSTR="Dronecode Project, Inc."
+CONFIG_DEBUG_ERROR=y
+CONFIG_DEBUG_FEATURES=y
 CONFIG_DEBUG_HARDFAULT_ALERT=y
+CONFIG_DEBUG_MEMFAULT=y
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_DEBUG_TCBINFO=y
 CONFIG_DEV_FIFO_SIZE=0
@@ -185,7 +189,6 @@ CONFIG_LPUART8_TXDMA=y
 CONFIG_MEMSET_64BIT=y
 CONFIG_MEMSET_OPTSPEED=y
 CONFIG_MMCSD=y
-CONFIG_MMCSD_MULTIBLOCK_LIMIT=1
 CONFIG_MMCSD_SDIO=y
 CONFIG_MTD=y
 CONFIG_MTD_BYTE_WRITE=y
@@ -258,7 +261,6 @@ CONFIG_SCHED_INSTRUMENTATION_SWITCH=y
 CONFIG_SCHED_LPWORK=y
 CONFIG_SCHED_LPWORKPRIORITY=50
 CONFIG_SCHED_LPWORKSTACKSIZE=2032
-CONFIG_SCHED_WAITPID=y
 CONFIG_SDIO_BLOCKSETUP=y
 CONFIG_SEM_PREALLOCHOLDERS=32
 CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y
@@ -277,6 +279,7 @@ CONFIG_SYSTEM_CLE=y
 CONFIG_SYSTEM_DHCPC_RENEW=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_SYSTEM_PING=y
+CONFIG_SYSTEM_SYSTEM=y
 CONFIG_TASK_NAME_SIZE=24
 CONFIG_USBDEV=y
 CONFIG_USBDEV_BUSPOWERED=y

boards/px4/fmu-v6xrt/src/board_config.h

@@ -455,6 +455,7 @@
 #define RC_SERIAL_SINGLEWIRE            1 // Suport Single wire wiring
 #define RC_SERIAL_SWAP_RXTX             1 // Set Swap (but not supported in HW) to use Single wire
 #define RC_SERIAL_SWAP_USING_SINGLEWIRE 1 // Set to use Single wire swap as HW does not support swap
+#define BOARD_SUPPORTS_RC_SERIAL_PORT_OUTPUT
 
 /* FLEXSPI4 */
 

boards/px4/fmu-v6xrt/src/imxrt_flexspi_nor_flash.c

@@ -104,9 +104,10 @@ const struct flexspi_nor_config_s g_flash_fast_config = {
 		.busyBitPolarity = 0u,
 		.lookupTable =
 		{
-			/* Read */// EEH+11H+32bit addr+20dummy cycles+ 4Bytes read data    //200Mhz 18 dummy=10+8
+			/* Read */// EEH+11H+32bit addr+20dummy cycles+ 4Bytes read data
+			/* Macronix manual says 20 dummy cycles @ 200Mhz, FlexSPI peripheral Operand value needs to be 2N in DDR mode hence 0x28 */
 			[0 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xEE, CMD_DDR, FLEXSPI_8PAD, 0x11),    //0x871187ee,
-			[0 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD, 0x20, DUMMY_DDR, FLEXSPI_8PAD, 0x04),//0xb3048b20,
+			[0 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD, 0x20, DUMMY_DDR, FLEXSPI_8PAD, 0x28),//0xb3288b20,
 			[0 + 2] = FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00), //0xa704,
 
 			/* Read status */

platforms/nuttx/src/bootloader/common/bl.c

@@ -294,7 +294,7 @@ void
 jump_to_app()
 {
 	const uint32_t *app_base = (const uint32_t *)APP_LOAD_ADDRESS;
-	const uint32_t *vec_base = (const uint32_t *)app_base + APP_VECTOR_OFFSET;
+	const uint32_t *vec_base = (const uint32_t *)((const uint32_t)app_base + APP_VECTOR_OFFSET);
 
 	/*
 	 * We refuse to program the first word of the app until the upload is marked

platforms/nuttx/src/bootloader/nxp/imxrt_common/main.c

@@ -16,6 +16,7 @@
 #include "imxrt_clockconfig.h"
 
 #include <nvic.h>
+#include <mpu.h>
 #include <lib/systick.h>
 #include <lib/flash_cache.h>
 
@@ -577,6 +578,21 @@ led_toggle(unsigned led)
 void
 arch_do_jump(const uint32_t *app_base)
 {
+	/* The MPU configuration after booting has ITCM set to MPU_RASR_AP_RORO
+	 * We add this overlaping region to allow the Application to copy code into
+	 * the ITCM when it is booted. With CONFIG_ARM_MPU_RESET defined. The mpu
+	 * init will clear any added regions (after the copy)
+	 */
+
+	mpu_configure_region(IMXRT_ITCM_BASE, 256 * 1024,
+			     /* Instruction access Enabled */
+			     MPU_RASR_AP_RWRW  | /* P:RW   U:RW                */
+			     MPU_RASR_TEX_NOR    /* Normal                     */
+			     /* Not Cacheable              */
+			     /* Not Bufferable             */
+			     /* Not Shareable              */
+			     /* No Subregion disable       */
+			    );
 
 	/* extract the stack and entrypoint from the app vector table and go */
 	uint32_t stacktop = app_base[APP_VECTOR_OFFSET_WORDS];

src/drivers/uavcan/uavcan_drivers/socketcan/driver/src/socketcan.cpp

@@ -218,12 +218,22 @@ uavcan::int16_t CanIface::receive(uavcan::CanFrame &out_frame, uavcan::Monotonic
 	if (_can_fd) {
 		struct canfd_frame *recv_frame = (struct canfd_frame *)&_recv_frame;
 		out_frame.id = recv_frame->can_id;
+
+		if (recv_frame->len > CANFD_MAX_DLEN) {
+			return -EFAULT;
+		}
+
 		out_frame.dlc = recv_frame->len;
 		memcpy(out_frame.data, &recv_frame->data, recv_frame->len);
 
 	} else {
 		struct can_frame *recv_frame = (struct can_frame *)&_recv_frame;
 		out_frame.id = recv_frame->can_id;
+
+		if (recv_frame->can_dlc > CAN_MAX_DLEN) {
+			return -EFAULT;
+		}
+
 		out_frame.dlc = recv_frame->can_dlc;
 		memcpy(out_frame.data, &recv_frame->data, recv_frame->can_dlc);
 	}