【AutoParallelism】Add 'Eager1 F1B" pipeline strategy #57605
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zhiqiu
approved these changes
Sep 27, 2023
| for op in block.ops: | ||
| if op.type == 'send_v2': | ||
| op._set_attr("dynamic_shape", False) | ||
| op._set_attr("use_calc_stream", True) |
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use_calc_stream should be false?
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When use_calc_stream is false, send_v2 will use the streams inphi::distributed::NCCLCommContext
Frida-a
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Oct 14, 2023
* delete sync operation in pipeline strategy * add Eager1F1B pipeline strategy
jiahy0825
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Oct 16, 2023
* delete sync operation in pipeline strategy * add Eager1F1B pipeline strategy
danleifeng
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Nov 14, 2023
* delete sync operation in pipeline strategy * add Eager1F1B pipeline strategy
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PR types
Performance optimization
PR changes
Others
Description
PCard-71568
本PR主要是增加了一种在pp策略下的子图编排策略，用来 overlap pp不同stage之间forward-job的send/recv和计算，提升大模型推训端到端性能。主要工作如下：
_overlap_send_recv函数，用于升级_insert_sync_for_fthenb_1f1b，去除借助c_sync_calc_stream和c_sync_comm_stream来同步程序的逻辑，但是该函数可能会增加显存峰值，所以增加enable_send_recv_overlap参数进行控制，并默认关闭。pipeline_scheduler_Eager1F1B的pipeline pass，在enable_send_recv_overlap==True的前提下，提升大模型执行速度，但是会增加显存峰值。综上：在显存不是瓶颈的情况下，开启
Eager1F1B能够单机下可获得1%的性能提升，多机下可获得2%~6%的提升(提升的幅度跟send/recv的通信耗时有关)，可以根据具体的模型使能该策略。相关论文On Optimizing the Communication of Model Parallelism