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OpenPiton Design Benchmark

OpenPiton Design Benchmark adapted from OpenPiton. All design benchmarks were generated using Tursi

Publication

OPDB paper early access: https://ieeexplore.ieee.org/document/9481916

Georgios Tziantzioulis, Ting-Jung Chang, Jonathan Balkind, Jinzheng Tu, Fei Gao and David Wentzlaff,
"OPDB: A Scalable and Modular Design Benchmark",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2021.3096794.

Find out more

Benchmark

The following table presents which modules from OpenPiton and other open-source projects are included on OPDB, the name of the top level module for each pickled module, and which attributes affect each module.

Module name Top module Has Macros X-dimension Y-dimension Topology L1-I L1-D L1.5 L2
chip chip ✔️ ✔️ ✔️ ✔️ ✔️ ✔️ ✔️ ✔️
chip_bridge chip_bridge
dynamic_node * ✔️
fpga_bridge_rcv_32 fpga_bridge_rcv_32
fpu fpu
ifu_esl sparc_ifu_esl
ifu_esl_counter sparc_ifu_esl_counter
ifu_esl_fsm sparc_ifu_esl_fsm
ifu_esl_htsm sparc_ifu_esl_htsm
ifu_esl_lfsr sparc_ifu_esl_lfsr
ifu_esl_rtsm sparc_ifu_esl_rtsm
ifu_esl_shiftreg sparc_ifu_esl_shiftreg
ifu_esl_stsm sparc_ifu_esl_stsm
l15 l15_wrap ✔️ ✔️ ✔️ ✔️
l2 l2 ✔️ ✔️ ✔️
MIAOW (GPGPU) neko ✔️
pico picorv32
sparc_core sparc_core ✔️ ✔️ ✔️
sparc_exu sparc_exu_wrap
sparc_ffu sparc_ffu_nospu_wrap ✔️
sparc_ifu sparc_ifu ✔️ ✔️
sparc_lsu lsu ✔️ ✔️
sparc_mul sparc_mul_top_nospu_wrap
sparc_tlu tlu_nospu_wrap
tile tile ✔️ ✔️ ✔️ ✔️ ✔️ ✔️
FFT fftmain
GNG gng

Dynamic node top module

The top module of dynamic node depends on the network topology:

Topology Top module
2dmesh dynamic_node_top_wrap
xbar dynamic_node_top_wrap_para

Core design instances

As evaluating and presenting hundreds of design instances is impractical, we suggest to OPDB user to focus on the set of design benchmarks that map to the Piton processor.

A list of the suggested pickled designs can be found here.

Pregenerated BLIF files for the suggested pickled designs can be found here.

Detailed information regarding the Piton processor can be found here

Configuration naming convention

<attr1_id>_<attr1_val1>_..._<attr1_valM>__...__<attrN_id>_<attrN_val1>_..._<attrN_valM>

Attribute Attribute ID Value 1 Value 2
L1 data cache L1D size associativity
L1 instruction cache L1I size associativity
L1.5 cache L15 size associativity
L2 cache L2 size associativity
Network topology NETWORK topology -
# tiles in X dimension X width -
# tiles in y dimension Y width -

Organization

+ modules/
 \
  + <module name>
  |\
  | + <configuration>
  | |\
  | | + <module name>.pickle.v
  | | + floorplan.json
  | |
  | + <configuration>
  ...
  |
  + <module name>

Configuration folder

Each configuration folder will contain a pickled file of verilog code and a floorplan json file. The floorplan json file will provide the top level module and additional information.

Floorplan and sdc files

Specific configurations include floorplan and sdc files. The current ones are:

Original codebases

Licenses

For details on the license of the MIAOW GPGPU see here

For details on the license of the OpenSPARC T1 core see here

The Ariane RISC-V CPU is licensed under the SolderPad Hardware License

The PicoRV32 core is licensed under the ISC license

The GNG core is licensed under LGPL 2.1

The FFT core is licensed under LGPL 3

The OpenPiton project is licensed under the following 3-clause BSD license:

Copyright (c) Princeton University
All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
    * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
    * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
    * Neither the name of Princeton University nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
    
THIS SOFTWARE IS PROVIDED BY PRINCETON UNIVERSITY "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL PRINCETON UNIVERSITY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.