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1.0.0
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@shtaxxx shtaxxx released this 17 Oct 15:00
· 7 commits to master since this release
1.0.0
7fd5703

Update

  • Zynq Ultrascale+ MPSoC support
  • (Breaking change) No python 2.x support

Test environment

Mac OSX 10.14

  • Python 3.7.0
  • Icarus Verilog 10.2
  • Pyverilog 1.1.2

Ubuntu 18.04.1

  • Python 3.6.6
  • Icarus Verilog 10.1
  • Pyverilog 1.1.2
Assets 2
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