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Allow circuits w/ control flow in O2 and O3 #10372
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Just a quick inline comment, I also think we should have some expansion of the test coverage here, places like: https://github.com/Qiskit/qiskit-terra/blob/main/test/python/compiler/test_transpiler.py#L1762, https://github.com/Qiskit/qiskit-terra/blob/main/test/python/compiler/test_transpiler.py#L1784, https://github.com/Qiskit/qiskit-terra/blob/main/test/python/compiler/test_transpiler.py#L1821, and https://github.com/Qiskit/qiskit-terra/blob/main/test/python/compiler/test_transpiler.py#L1531 would be simple enough to update the ddt decorator. But there are probably a few other control flow tests we should parameterize on multiple optimization levels with this PR.
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Thanks for the quick fix
Pull Request Test Coverage Report for Build 5621665928
💛 - Coveralls |
In CI we're seeing a reliable failure on windows when scipy is calling LAPACK. This appears to be unrelated to the change in this PR branch and is isolated to specific windows environments. This commit adds a skip condition to skip that one test to workaround the failure in CI. The wider issue with scipy compatibility on windows is being tracked in issue Qiskit#10345, when we have a conclusion to that and can reliably run this test we should remove this skip condition.
* Allow control flow in opt levels 2 and 3. * Add release note. * Enable testing for opt 2 and 3. * Remove guard on translation_method='synthesis'. * Fix test for synthesis guard. * Skip o3 qpy full path transpile test on windows In CI we're seeing a reliable failure on windows when scipy is calling LAPACK. This appears to be unrelated to the change in this PR branch and is isolated to specific windows environments. This commit adds a skip condition to skip that one test to workaround the failure in CI. The wider issue with scipy compatibility on windows is being tracked in issue Qiskit#10345, when we have a conclusion to that and can reliably run this test we should remove this skip condition. --------- Co-authored-by: Matthew Treinish <mtreinish@kortar.org>
Summary
Remove guards to restrict circuits with control flow from being transpiled at optimization levels 2 and 3.
Details and comments
Depends on:
SabreSwap
andSabreLayout
. #10366Resolves #9431
Resolves #9432